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- Foti L, English D, Hopkins R, Kinniment D, Treleaven P and Wang W Reduced-instruction set multi-microcomputer system Proceedings of the July 9-12, 1984, national computer conference and exposition, (69-76)
- Guting R and Wood D (1984). Finding Rectangle Intersections by Divide-and-Conquer, IEEE Transactions on Computers, 33:7, (671-675), Online publication date: 1-Jul-1984.
- Ja'Ja' J and Owens R (1984). VLSI Sorting with Reduced Hardware, IEEE Transactions on Computers, 33:7, (668-671), Online publication date: 1-Jul-1984.
- Adi W (1984). Fast Burst Error-Correction Scheme with Fire Code, IEEE Transactions on Computers, 33:7, (613-618), Online publication date: 1-Jul-1984.
- Wieclawski A and Perkowski M Optimization of negative gate networks realized in weinberger-LIKF layout in a boolean level silicon compiler Proceedings of the 21st Design Automation Conference, (703-704)
- Crawford J An electronic design interchange format Proceedings of the 21st Design Automation Conference, (683-685)
- Kors J and Israel M An interactive electrical graph extractor Proceedings of the 21st Design Automation Conference, (624-628)
- Wardle C, Watson C, Wilson C, Mudge J and Nelson B A declarative design approach for combining macrocells by directed placement and constructive routing Proceedings of the 21st Design Automation Conference, (594-601)
- Ousterhout J Switch-level delay models for digital MOS VLSI Proceedings of the 21st Design Automation Conference, (542-548)
- Glasser L and Hoyte L Delay and power optimization in VLSI circuits Proceedings of the 21st Design Automation Conference, (529-535)
- Meyer M, Agrawal P and Pfister R A VLSI FSM design system Proceedings of the 21st Design Automation Conference, (434-440)
- Milne G A model for hardware description and verification Proceedings of the 21st Design Automation Conference, (251-257)
- Hollaar L, Nelson B, Carter T and Lorie R The structure and operation of a relational database system in a cell-oriented integrated circuit design system Proceedings of the 21st Design Automation Conference, (117-125)
- Lursinsap C and Gajski D Cell compilation with constraints Proceedings of the 21st Design Automation Conference, (103-108)
- Powell P and Elmasry M The icewater language and interpreter Proceedings of the 21st Design Automation Conference, (98-102)
- Ng C A symbolic-interconnect router for custom IC design Proceedings of the 21st Design Automation Conference, (52-58)
- Samatham M and Pradhan D (1984). A multiprocessor network suitable for single-chip VLSI implementation, ACM SIGARCH Computer Architecture News, 12:3, (328-339), Online publication date: 1-Jun-1984.
- Philipson L (1984). VLSI based design principles for MIMD multiprocessor computers with distributed memory management, ACM SIGARCH Computer Architecture News, 12:3, (319-327), Online publication date: 1-Jun-1984.
- Fisher A (1984). Dictionary machines with a small number of processors, ACM SIGARCH Computer Architecture News, 12:3, (151-156), Online publication date: 1-Jun-1984.
- Shen J and Ferguson F (1984). The Design of Easily Testable VLSI Array Multipliers, IEEE Transactions on Computers, 33:6, (554-560), Online publication date: 1-Jun-1984.
- Tamir Y and Sequin C (1984). Design and Application of Self-Testing Comparators Implemented with MOS PLA's, IEEE Transactions on Computers, 33:6, (493-506), Online publication date: 1-Jun-1984.
- Wada K, Hagihara K and Tokura N (1984). Area-Time Optimal Fast Implementation of Several Functions in a VLSI Model, IEEE Transactions on Computers, 33:5, (455-462), Online publication date: 1-May-1984.
- Garcia-Molina H, Lipton R and Valdes J (1984). A Massive Memory Machine, IEEE Transactions on Computers, 33:5, (391-399), Online publication date: 1-May-1984.
- Bryant R (1984). A Switch-Level Model and Simulator for MOS Digital Systems, IEEE Transactions on Computers, 33:2, (160-177), Online publication date: 1-Feb-1984.
- White S, Strader N and Rhyne V (1984). A VLSI-Based I/O Formatting Device, IEEE Transactions on Computers, 33:2, (140-149), Online publication date: 1-Feb-1984.
- Johnson S Applicative programming and digital design Proceedings of the 11th ACM SIGACT-SIGPLAN symposium on Principles of programming languages, (218-227)
- Samatham M and Pradhan D A multiprocessor network suitable for single-chip VLSI implementation Proceedings of the 11th annual international symposium on Computer architecture, (328-339)
- Philipson L VLSI based design principles for MIMD multiprocessor computers with distributed memory management Proceedings of the 11th annual international symposium on Computer architecture, (319-327)
- Fisher A Dictionary machines with a small number of processors Proceedings of the 11th annual international symposium on Computer architecture, (151-156)
- Bayoumi M, Jullien G and Miller W A systolic (VLSI) array using RNS for digital signal processing applications Proceedings of the ACM 12th annual computer science conference on SIGCSE symposium, (115-120)
- Gordon D, Koren I and Silberman G (1984). Embedding Tree Structures in VLSI Hexagonal Arrays, IEEE Transactions on Computers, 33:1, (104-107), Online publication date: 1-Jan-1984.
- Baker B, Bhatt S and Leighton F An approximation algorithm for manhattan routing Proceedings of the fifteenth annual ACM symposium on Theory of computing, (477-486)
- Sipser M Borel sets and circuit complexity Proceedings of the fifteenth annual ACM symposium on Theory of computing, (61-69)
- Thompson C (1983). The VLSI Complexity of Sorting, IEEE Transactions on Computers, 32:12, (1171-1184), Online publication date: 1-Dec-1983.
- Liu P and Young T (1983). VLSI Array Design Under Constraint of Limited I/O Bandwidth, IEEE Transactions on Computers, 32:12, (1160-1170), Online publication date: 1-Dec-1983.
- Ja'Ja' J and Owens R (1983). An architecture for a VLSI FFT processor, Integration, the VLSI Journal, 1:4, (305-316), Online publication date: 1-Dec-1983.
- Halaas A (1983). A systolic VLSI matrix for a family of fundamental searching problems, Integration, the VLSI Journal, 1:4, (269-282), Online publication date: 1-Dec-1983.
- Danielsson P (1983). A Variable-Length Shift-Register, IEEE Transactions on Computers, 32:11, (1067-1069), Online publication date: 1-Nov-1983.
- Thompson C (1983). Fourier Transforms in VLSI, IEEE Transactions on Computers, 32:11, (1047-1057), Online publication date: 1-Nov-1983.
- Saluja K, Kinoshita K and Fujiwara H (1983). An Easily Testable Design of Programmable Logic Arrays for Multiple Faults, IEEE Transactions on Computers, 32:11, (1038-1046), Online publication date: 1-Nov-1983.
- Papachristou C (1983). Direct Implementation of Discrete and Residue-Based Functions Via Optimal Encoding, IEEE Transactions on Computers, 32:10, (961-968), Online publication date: 1-Oct-1983.
- Rosenberg A (1983). The Diogenes Approach to Testable Fault-Tolerant Arrays of Processors, IEEE Transactions on Computers, 32:10, (902-910), Online publication date: 1-Oct-1983.
- Alia G (1983). VLSI systolic arrays for band matrix multiplication, Integration, the VLSI Journal, 1:2-3, (233-249), Online publication date: 1-Oct-1983.
- Bergstra J and Klop J (1983). A proof rule for restoring logic circuits, Integration, the VLSI Journal, 1:2-3, (161-178), Online publication date: 1-Oct-1983.
- Milne G (1983). Circal, Integration, the VLSI Journal, 1:2-3, (121-160), Online publication date: 1-Oct-1983.
- Liesenberg H and Kinniment D (1983). An autolayout system for a hierarchical i.c. design environment, Integration, the VLSI Journal, 1:2-3, (107-119), Online publication date: 1-Oct-1983.
- Truong T, Reed I, Yeh C and Shao H (1983). A Parallel Architecture for Digital Filtering Using Fermat Number Transforms, IEEE Transactions on Computers, 32:9, (874-877), Online publication date: 1-Sep-1983.
- Schwab T and Yau S (1983). An Algebraic Model of Fault-Masking Logic Circuits, IEEE Transactions on Computers, 32:9, (809-825), Online publication date: 1-Sep-1983.
- Bongiovanni G (1983). Two VLSI Structures for the Discrete Fourier Transform, IEEE Transactions on Computers, 32:8, (750-754), Online publication date: 1-Aug-1983.
- Baudet G, Preparata F and Vuillemin J (1983). Area Time Optimal VLSI Circuits for Convolution, IEEE Transactions on Computers, 32:7, (684-688), Online publication date: 1-Jul-1983.
- Treleaven P (1983). The new generation of computer architecture, ACM SIGARCH Computer Architecture News, 11:3, (402-409), Online publication date: 30-Jun-1983.
- Giloi W and Behr P (1983). Hierarchical function distribution - a design principle for advanced multicomputer architectures, ACM SIGARCH Computer Architecture News, 11:3, (318-325), Online publication date: 30-Jun-1983.
- Bonuccelli M, Lodi E, Luccio F, Maestrini P and Pagli L (1983). A VLSI tree machine for relational data bases, ACM SIGARCH Computer Architecture News, 11:3, (67-73), Online publication date: 30-Jun-1983.
- Wagner R (1983). The Boolean Vector Machine [BVM], ACM SIGARCH Computer Architecture News, 11:3, (59-66), Online publication date: 30-Jun-1983.
- Fisher A, Kung H, Monier L and Dohi Y (1983). Architecture of the PSC-a programmable systolic chip, ACM SIGARCH Computer Architecture News, 11:3, (48-53), Online publication date: 30-Jun-1983.
- Wimer S and Sharfman N HOPLA-PLA optimization and synthesis Proceedings of the 20th Design Automation Conference, (790-794)
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- McGarity R and Siewiorek D Experiments with the SLIM Circuit Compactor Proceedings of the 20th Design Automation Conference, (740-746)
- Szymanski T and Van Wyk C Space efficient algorithms for VLSI artwork analysis Proceedings of the 20th Design Automation Conference, (734-739)
- Gupta A ACE Proceedings of the 20th Design Automation Conference, (721-725)
- LaPaugh A and Lipton R Total stuct-at-fault testing by circuit transformation Proceedings of the 20th Design Automation Conference, (713-716)
- Hill D Edisim and Edicap Proceedings of the 20th Design Automation Conference, (608-614)
- Haynie M Tutorial Proceedings of the 20th Design Automation Conference, (599-607)
- Metos J and Oldfield J Binary Decision Diagrams Proceedings of the 20th Design Automation Conference, (567-570)
- Martinez-Carballido J and Powers V PRONTO Proceedings of the 20th Design Automation Conference, (545-552)
- Micheli G and Sangiovanni-Vincentelli A PLEASURE Proceedings of the 20th Design Automation Conference, (530-537)
- Kowalski T and Thomas D The VLSI Design Automation Assistant Proceedings of the 20th Design Automation Conference, (479-483)
- Ramachandran V An improved switch-level simulator for MOS circuits Proceedings of the 20th Design Automation Conference, (293-299)
- Mayo R and Ousterhout J Pictures with parentheses Proceedings of the 20th Design Automation Conference, (270-276)
- Rubin F and Horstmann P A logic design front-end for improved engineering productivity Proceedings of the 20th Design Automation Conference, (239-245)
- Umrigar Z and Pitchumani V Formal verification of a real-time hardware design Proceedings of the 20th Design Automation Conference, (221-227)
- Barzilai Z, Huisman L, Silberman G, Tang D and Woo L Simulating pass transistor circuits using logic simulation machines Proceedings of the 20th Design Automation Conference, (157-163)
- Kedem G and Watanabe H Graph-optimization techniques for IC layout and compaction Proceedings of the 20th Design Automation Conference, (113-120)
- Treleaven P The new generation of computer architecture Proceedings of the 10th annual international symposium on Computer architecture, (402-409)
- Giloi W and Behr P Hierarchical function distribution - a design principle for advanced multicomputer architectures Proceedings of the 10th annual international symposium on Computer architecture, (318-325)
- Bonuccelli M, Lodi E, Luccio F, Maestrini P and Pagli L A VLSI tree machine for relational data bases Proceedings of the 10th annual international symposium on Computer architecture, (67-73)
- Wagner R The Boolean Vector Machine [BVM] Proceedings of the 10th annual international symposium on Computer architecture, (59-66)
- Fisher A, Kung H, Monier L and Dohi Y Architecture of the PSC-a programmable systolic chip Proceedings of the 10th annual international symposium on Computer architecture, (48-53)
- Garcia-Molina H (1983). Using semantic knowledge for transaction processing in a distributed database, ACM Transactions on Database Systems, 8:2, (186-213), Online publication date: 1-Jun-1983.
- Hambrusch S (1983). VLSI Algorithms for the Connected Component Problem, SIAM Journal on Computing, 12:2, (354-365), Online publication date: 1-May-1983.
- Huang C (1983). A Fully Parallel Mixed-Radix Conversion Algorithm for Residue Number Applications, IEEE Transactions on Computers, 32:4, (398-402), Online publication date: 1-Apr-1983.
- Miranker G, Tang L and Wong C (1983). A "zero-time" VLSI sorter, IBM Journal of Research and Development, 27:2, (140-148), Online publication date: 1-Mar-1983.
- Vuillemin J (1983). A Combinatorial Limit to the Computing Power of VLSI Circuits, IEEE Transactions on Computers, 32:3, (294-300), Online publication date: 1-Mar-1983.
- Wann D and Franklin M (1983). Asynchronous and Clocked Control Structures for VSLI Based Interconnection Networks, IEEE Transactions on Computers, 32:3, (284-293), Online publication date: 1-Mar-1983.
- Preparata F (1983). A Mesh-Connected Area-Time Optimal VLSI Multiplier of Large Integers, IEEE Transactions on Computers, 32:2, (194-198), Online publication date: 1-Feb-1983.
- Ousterhout J VLSI tools and architectures Proceedings of the 1983 computer science conference, (25-30)
- Pfister G Parallel processing, special-purpose hardware, and DA applications Proceedings of the 1983 computer science conference, (21-24)
- Banâtre J, Frison P and Quinton P (1983). A network for the detection of words in continuous speech, Acta Informatica, 18:4, (431-448), Online publication date: 1-Jan-1983.
- Kai Hwang and Yeng-Heng Cheng (1982). Partitioned Matrix Algorithms for VLSI Arithmetic Systems, IEEE Transactions on Computers, 31:12, (1215-1224), Online publication date: 1-Dec-1982.
- Yasuura H, Takagi N and Yajima S (1982). The Parallel Enumeration Sorting Scheme for VLSI, IEEE Transactions on Computers, 31:12, (1192-1201), Online publication date: 1-Dec-1982.
- Lim W (1982). HISDL—a structure description language, Communications of the ACM, 25:11, (823-830), Online publication date: 1-Nov-1982.
- Brent R and Goldschlager L (1982). Some Area-Time Tradeoffs for VLSI, SIAM Journal on Computing, 11:4, (737-747), Online publication date: 1-Nov-1982.
- Franklin M, Wann D and Thomas W (1982). Pin Limitations and Partitioning of VLSI Interconnection Networks, IEEE Transactions on Computers, 31:11, (1109-1116), Online publication date: 1-Nov-1982.
- Sun-Yuan Kung , Arun K, Gal-Ezer R and Bhaskar Rao D (1982). Wavefront Array Processor, IEEE Transactions on Computers, 31:11, (1054-1066), Online publication date: 1-Nov-1982.
- Uhr L (1982). Comparing Serial Computers, Arrays, and Networks Using Measures of "Active Resources", IEEE Transactions on Computers, 31:10, (1022-1025), Online publication date: 1-Oct-1982.
- Stefik M and Conway L (1982). Towards the Principled Engineering of Knowledge, AI Magazine, 3:3, (4-16), Online publication date: 1-Sep-1982.
- Mandrioli D (1982). On teaching theoretical foundations of Computer Science, ACM SIGACT News, 14:4, (58-69), Online publication date: 1-Sep-1982.
- Aleliunas R and Rosenberg A (1982). On Embedding Rectangular Grids in Square Grids, IEEE Transactions on Computers, 31:9, (907-913), Online publication date: 1-Sep-1982.
- Ottmann T, Rosenberg A and Stockmeyer L (1982). A Dictionary Machine (for VLSI), IEEE Transactions on Computers, 31:9, (892-897), Online publication date: 1-Sep-1982.
- Culik K and Pachl J Folding and unrolling systolic arrays (Preliminary Version) Proceedings of the first ACM SIGACT-SIGOPS symposium on Principles of distributed computing, (254-261)
- Magó G Data sharing in an FFP machine Proceedings of the 1982 ACM symposium on LISP and functional programming, (201-207)
- Strader N and Rhyne V (1982). A Canonical Bit-Sequential Multiplier, IEEE Transactions on Computers, 31:8, (791-795), Online publication date: 1-Aug-1982.
- Zyda M A contour display generation algorithm for VLSI implementation Proceedings of the 9th annual conference on Computer graphics and interactive techniques, (135-146)
- Zyda M (1982). A contour display generation algorithm for VLSI implementation, ACM SIGGRAPH Computer Graphics, 16:3, (135-146), Online publication date: 1-Jul-1982.
- Khakbaz J (1982). Totally Self-Checking Checker for 1-out-of-n Code Using Two-Rail Codes, IEEE Transactions on Computers, 31:7, (677-681), Online publication date: 1-Jul-1982.
- Trickey H (1982). Good Layouts for Pattern Recognizers, IEEE Transactions on Computers, 31:6, (514-520), Online publication date: 1-Jun-1982.
- Akl S (1982). A constant-time parallel algorithm for computing convex hulls, BIT, 22:2, (129-134), Online publication date: 1-Jun-1982.
- Atallah M and Kosaraju S Graph problems on a mesh-connected processor array (Preliminary Version) Proceedings of the fourteenth annual ACM symposium on Theory of computing, (345-353)
- Kissin G Measuring energy consumption in VLSI circuits Proceedings of the fourteenth annual ACM symposium on Theory of computing, (99-104)
- Leighton F A layout strategy for VLSI which is provably good (Extended Abstract) Proceedings of the fourteenth annual ACM symposium on Theory of computing, (85-98)
- Treleaven P and Hopkins R A recursive computer architecture for VLSI Proceedings of the 9th annual symposium on Computer Architecture, (229-238)
- Fussell D and Varman P Fault-tolerant wafer-scale architectures for VLSI Proceedings of the 9th annual symposium on Computer Architecture, (190-198)
- Dasgupta S and Olafsson M Towards a family of languages for the design and implementation of machine architectures Proceedings of the 9th annual symposium on Computer Architecture, (158-167)
- Franklin M and Wann D Asynchronous and clocked control structures for VLSI based interconnection networks Proceedings of the 9th annual symposium on Computer Architecture, (50-59)
- Chu K and Fu K VLSI architectures for high speed recognition of context-free languages and finite-state languages Proceedings of the 9th annual symposium on Computer Architecture, (43-49)
- Treleaven P and Hopkins R (1982). A recursive computer architecture for VLSI, ACM SIGARCH Computer Architecture News, 10:3, (229-238), Online publication date: 1-Apr-1982.
- Fussell D and Varman P (1982). Fault-tolerant wafer-scale architectures for VLSI, ACM SIGARCH Computer Architecture News, 10:3, (190-198), Online publication date: 1-Apr-1982.
- Dasgupta S and Olafsson M (1982). Towards a family of languages for the design and implementation of machine architectures, ACM SIGARCH Computer Architecture News, 10:3, (158-167), Online publication date: 1-Apr-1982.
- Franklin M and Wann D (1982). Asynchronous and clocked control structures for VLSI based interconnection networks, ACM SIGARCH Computer Architecture News, 10:3, (50-59), Online publication date: 1-Apr-1982.
- Chu K and Fu K (1982). VLSI architectures for high speed recognition of context-free languages and finite-state languages, ACM SIGARCH Computer Architecture News, 10:3, (43-49), Online publication date: 1-Apr-1982.
- Brent R and Kung H (1982). A Regular Layout for Parallel Adders, IEEE Transactions on Computers, 31:3, (260-264), Online publication date: 1-Mar-1982.
- Bochmann G (1982). Hardware Specification with Temporal Logic, IEEE Transactions on Computers, 31:3, (223-231), Online publication date: 1-Mar-1982.
- Welsch L (1982). Using electronic mail as a teaching tool, Communications of the ACM, 25:2, (105-108), Online publication date: 1-Feb-1982.
- Lipton R, Sedgewick R and Valdes J Programming aspects of VLSI Proceedings of the 9th ACM SIGPLAN-SIGACT symposium on Principles of programming languages, (57-65)
- Ousterhout J and Ungar D Measurements of a VLSI design Proceedings of the 19th Design Automation Conference, (903-908)
- Syed Z, Gamal A and Breuer M On routing for custom integrated circuits Proceedings of the 19th Design Automation Conference, (887-893)
- Leinwand S Logical correctness by construction Proceedings of the 19th Design Automation Conference, (825-831)
- Lelarasmee E and Sangiovanni-Vincentelli A Relax Proceedings of the 19th Design Automation Conference, (682-687)
- Mudge T, Rutenbar R, Lougheed R and Atkins D Cellular image processing techniques for VLSI circuit layout validation and routing Proceedings of the 19th Design Automation Conference, (537-543)
- Arnold M and Ousterhout J Lyra Proceedings of the 19th Design Automation Conference, (530-536)
- Rivest R The “PI” (placement and interconnect) system Proceedings of the 19th Design Automation Conference, (475-481)
- Lipton R, North S, Sedgewick R, Valdes J and Vijayan G ALI Proceedings of the 19th Design Automation Conference, (467-474)
- Hayes J A fault simulation methodology for VLSI Proceedings of the 19th Design Automation Conference, (393-399)
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- Kedem G The quad-CIF tree Proceedings of the 19th Design Automation Conference, (352-357)
- Adshead H Towards VLSI complexity Proceedings of the 19th Design Automation Conference, (339-344)
- Chuquillanqui S and Segovia T PAOLA Proceedings of the 19th Design Automation Conference, (300-306)
- Katz R A database approach for managing VLSI design data Proceedings of the 19th Design Automation Conference, (274-282)
- Heller W, Sorkin G and Maling K The planar package planner for system designers Proceedings of the 19th Design Automation Conference, (253-260)
- Seiler L A hardware assisted design rule check architecture Proceedings of the 19th Design Automation Conference, (232-238)
- Teel B and Wilde D A logic minimizer for VLSI PLA design Proceedings of the 19th Design Automation Conference, (156-162)
- Hachtel G, Newton A and Sangiovanni-Vincentelli A Techniques for programmable logic array folding Proceedings of the 19th Design Automation Conference, (147-155)
- Ishikawa C, Sakamura K and Maekawa M Adaptation and personalization of VLSI-based computer architecture Proceedings of the 14th annual workshop on Microprogramming, (51-61)
- Ishikawa C, Sakamura K and Maekawa M (1981). Adaptation and personalization of VLSI-based computer architecture, ACM SIGMICRO Newsletter, 12:4, (51-61), Online publication date: 1-Dec-1981.
- Seth S and Narayanaswamy K (1981). A Graph Model for Pattern-Sensitive Faults in Random Access Memories, IEEE Transactions on Computers, 30:12, (973-977), Online publication date: 1-Dec-1981.
- Sridhar T and Hayes J (1981). Design of Easily Testable Bit-Sliced Systems, IEEE Transactions on Computers, 30:11, (842-854), Online publication date: 1-Nov-1981.
- Penfield P AIDS, APL integrated-circuit design system Proceedings of the international conference on APL, (240-247)
- Penfield P (1981). AIDS, APL integrated-circuit design system, ACM SIGAPL APL Quote Quad, 12:1, (240-247), Online publication date: 1-Sep-1981.
- Kung H Use of VLSI in algebraic computation Proceedings of the fourth ACM symposium on Symbolic and algebraic computation, (218-222)
- Hayes A (1981). Stored State Asynchronous Sequential Circuits, IEEE Transactions on Computers, 30:8, (596-600), Online publication date: 1-Aug-1981.
- Sridhar T and Hayes J (1981). A Functional Approach to Testing Bit-Sliced Microprocessors, IEEE Transactions on Computers, 30:8, (563-571), Online publication date: 1-Aug-1981.
- Montoye R Area-time efficient addition in charge based technology Proceedings of the 18th Design Automation Conference, (862-872)
- Blank T, Stefik M and vanCleemput W A parallel bit map processor architecture for DA algorithms Proceedings of the 18th Design Automation Conference, (837-845)
- Martin G, Berrie J, Little T, Mackay D, McVean J, Tomsett D and Weston L CELTIC - solving the problems of LSI design with an integrated polycell DA system Proceedings of the 18th Design Automation Conference, (804-811)
- Bryant R MOSSIM Proceedings of the 18th Design Automation Conference, (786-790)
- Sherwood W A MOS modelling technique for 4-state true-value hierarchical logic simulation or Karnough knowledge Proceedings of the 18th Design Automation Conference, (775-785)
- Corbin L Custom VLSI electrical rule checking in an intelligent terminal Proceedings of the 18th Design Automation Conference, (696-701)
- Heller W Contrasts in physical design between LSI and VLSI Proceedings of the 18th Design Automation Conference, (676-683)
- Glasser L The analog behavior of digital integrated circuits Proceedings of the 18th Design Automation Conference, (603-612)
- Paillotin J Optimization of the PLA area Proceedings of the 18th Design Automation Conference, (406-410)
- Suwa I and Kubitz W A computer-aided-design system for segmented-folded PLA macro-cells Proceedings of the 18th Design Automation Conference, (398-405)
- Losleben P Current issues in government interest and involvement in CAD Proceedings of the 18th Design Automation Conference, (337-341)
- Goates G and Patil S ABLE Proceedings of the 18th Design Automation Conference, (322-329)
- Atkins D, Liu W and Ong S Overview of an Arithmetic Design System Proceedings of the 18th Design Automation Conference, (314-321)
- Franco D and Reed L The Cell Design System Proceedings of the 18th Design Automation Conference, (240-247)
- Eastman C Recent developments in representation in the science of design Proceedings of the 18th Design Automation Conference, (13-21)
- Koren I A reconfigurable and fault-tolerant VLSI multiprocessor array Proceedings of the 8th annual symposium on Computer Architecture, (425-442)
- Wah B and Ma Y MANIP-a parallel computer system for implementing branch and bound algorithms Proceedings of the 8th annual symposium on Computer Architecture, (239-262)
- Briggs F, Dubois M and Hwang K Throughput analysis and configuration design of a shared-resource multiprocessor system Proceedings of the 8th annual symposium on Computer Architecture, (67-79)
- Chazelle B and Monier L A model of computation for VLSI with related complexity results Proceedings of the thirteenth annual ACM symposium on Theory of computing, (318-325)
- Dolev D, Karplus K, Siegel A, Strong A and Ullman J Optimal wiring between rectangles Proceedings of the thirteenth annual ACM symposium on Theory of computing, (312-317)
- Yao A The entropic limitations on VLSI computations(Extended Abstract) Proceedings of the thirteenth annual ACM symposium on Theory of computing, (308-311)
- Paterson M, Ruzzo W and Snyder L Bounds on minimax edge length for complete binary trees Proceedings of the thirteenth annual ACM symposium on Theory of computing, (293-299)
- Heller A and Van Dam A Vertical and outboard migration Proceedings of the May 4-7, 1981, national computer conference, (69-74)
- Parker A and Wilner W Microprogramming Proceedings of the May 4-7, 1981, national computer conference, (63-68)
- Lawson H New directions for micro- and system architectures in the 1980s Proceedings of the May 4-7, 1981, national computer conference, (57-62)
- Dees W, Parmar K, Goyal A, Tsui R, Rathi B and Smith R A computer-aided VLSI layout system Proceedings of the May 4-7, 1981, national computer conference, (11-18)
- Hobson R Software sympathetic chip set design Proceedings of the May 4-7, 1981, national computer conference, (3-10)
- Preparata F and Vuillemin J (1981). The cube-connected cycles: a versatile network for parallel computation, Communications of the ACM, 24:5, (300-309), Online publication date: 1-May-1981.
- Franklin M (1981). VLSI Performance Comparison of Banyan and Crossbar Communications Networks, IEEE Transactions on Computers, 30:4, (283-291), Online publication date: 1-Apr-1981.
- Horowitz E and Zorat A (1981). The Binary Tree as an Interconnection Network, IEEE Transactions on Computers, 30:4, (247-253), Online publication date: 1-Apr-1981.
- Cragon H (1980). The economics of programmable system components, ACM SIGMICRO Newsletter, 11:3-4, (122-125), Online publication date: 1-Dec-1980.
- Cragon H The economics of programmable system components Proceedings of the 13th annual workshop on Microprogramming, (122-125)
- Steele G and Sussman G (1980). Design of a LISP-based microprocessor, Communications of the ACM, 23:11, (628-645), Online publication date: 1-Nov-1980.
- Hartenstein R (1980). KARL subset used as a hardware design algebra, ACM SIGDA Newsletter, 10:2, (2-8), Online publication date: 1-Aug-1980.
- Bentley J and Wood D (1980). An Optimal Worst Case Algorithm for Reporting Intersections of Rectangles, IEEE Transactions on Computers, 29:7, (571-577), Online publication date: 1-Jul-1980.
- McGrath E and Whitney T Design integrity and immunity checking Proceedings of the 17th Design Automation Conference, (263-268)
- Rosenberg L The evolution of design automation to meet the challanges of VLSI Proceedings of the 17th Design Automation Conference, (3-11)
- Foster M and Kung H Design of special-purpose VLSI chips Proceedings of the 7th annual symposium on Computer Architecture, (300-307)
- Brent R and Kung H The chip complexity of binary arithmetic Proceedings of the twelfth annual ACM symposium on Theory of computing, (190-200)
- Fischer M and Paterson M Optimal tree layout (Preliminary Version) Proceedings of the twelfth annual ACM symposium on Theory of computing, (177-189)
- Tompa M An optimal solution to a wire-routing problem (preliminary version) Proceedings of the twelfth annual ACM symposium on Theory of computing, (161-176)
- Patterson D and Sequin C (1980). Design Considerations for Single-Chip Computers of the Future, IEEE Transactions on Computers, 29:2, (108-116), Online publication date: 1-Feb-1980.
- Johannsen D Bristle Blocks Proceedings of the 16th Design Automation Conference, (310-313)
- Gray J Introduction to silicon compilation Proceedings of the 16th Design Automation Conference, (305-306)
- Patterson D, Fehr E and Séquin C Design considerations for the VLSI processor of X-TREE Proceedings of the 6th annual symposium on Computer architecture, (90-101)
- Fairbairn D and Rowson J ICARUS Proceedings of the 15th Design Automation Conference, (188-192)
Index Terms
- Introduction to VLSI Systems
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