An optimal solution to a wire-routing problem (preliminary version)

We propose a new approach to automatic wire routing of VLSI chips which is applicable to interconnection problem in uniform structures such as gate arrays, switchboxes, channels. Popularity of gate arrays technologies still remains high among VLSI chip ...

Existing floorplanning algorithms compact blocks to the left and bottom. Although the compaction obtains an optimal area, it may not be good to meet other objectives such as minimizing total wire length which is the first-order objective. It is not ...

In an automatic routing system for macro-cell layout the wiring area is decomposed into a number of smaller regions. These regions are routed separately by a detailed router such as a channel router or a switch-box router. The position of the pins at ...