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A model of computation for VLSI with related complexity results

Published: 11 May 1981 Publication History

Abstract

We propose a new model of computation for VLSI which is a refinement of previous models and makes the additional assumption that the time for propagating information is linear in the distance. Our approach is motivated by the failure of previous models to allow for realistic asymptotic analysis. While accommodating for basic laws of physics, this model tries to be most general and technology-independent. Thus, from a complexity viewpoint, it is especially suited for deriving lower bounds and trade-offs. We present new results for a number of problems including fan-in, addition, transitive functions, matrix multiplication, and sorting.

References

[1]
G.M. Baudet, On the Complexity of VLSI Circuits: A New Tool, INRIA 1981, to appear.
[2]
R.P. Brent and H.T. Kung, The Chip Complexity of Binary Arithmetic, proc. 12th Annual ACM Symposium on Theory of Computing, ACM, pp. 190-200, May 1980.
[3]
G.M. Baudet, F.P. Preparata and J. Vuillemin, Area-Time Optimal VLSI Circuits for Convolution, Rapport INRIA # 30, Rocquencourt France, 1980.
[4]
W.A. Clark, From Electron Mobility to Logical Structure: A View of Integrated Circuits, Computing Surveys, Vol.12, No 3, September 1980.
[5]
B.M. Chazelle and L.M. Monier, Towards More Realistic Models of Computation for VLSI, proc. of Caltech Conference on VLSI, January 1981.
[6]
H.T. Kung and C.E. Leiserson, Systolic Arrays for (VLSI), appeared in {MC80}.
[7]
C. Mead and L. Conway, Introduction to VLSI Systems, Addison-Wesley, 1980.
[8]
F.P. Preparata and J. Vuillemin, The Cube-Connected-Cycles: A Versatile Network for Parallel Computation, proc. 20th Annual Symposium on Foundations of Computer Science, Oct. 1979.
[9]
F.P. Preparata and J. Vuillemin, Area-Time Optimal VLSI Networks based on the Cube-Connect Cycles, Rapport IRIA # 13, Rocquencourt France, 1980.
[10]
J.E. Savage Area-Time Tradeoffs for Matrix Multiplication and Related Problems in VLSI Models, proc. 17th Annual Allerton Conference on Communications, Control and Computing, 1979.
[11]
C.L. Seitz, Self-timed VLSI Systems, proc. of Caltech Conf. on VLSI, 1979.
[12]
C.D. Thompson, Area-Time Complexity for VLSI, proc. 11th Annual ACM Symposium on Theory of Computing, ACM, pp. 81-88, May 1979.
[13]
C.D. Thompson, A Complexity Theory for VLSI, Ph.D. dissertation, Department of Computer Science, Carnegie-Mellon University, 1980.
[14]
C.D. Thompson, Fourier Transforms in VLSI, Memorandum No.UCB/ERL M80/51, University of California, Berkeley, October 1980.
[15]
J. Vuillemin, A Combinatorial Limit to the Computing Power of V.L.S.I. Circuits, proc. 21st Annual Symposium on Foundations of Computer Science, Oct. 1980.

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cover image ACM Conferences
STOC '81: Proceedings of the thirteenth annual ACM symposium on Theory of computing
May 1981
390 pages
ISBN:9781450373920
DOI:10.1145/800076
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 11 May 1981

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Cited By

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  • (2013)High throughput energy efficient parallel FFT architecture on FPGAs2013 IEEE High Performance Extreme Computing Conference (HPEC)10.1109/HPEC.2013.6670343(1-6)Online publication date: Sep-2013
  • (2007)Area‐time complexity on a vlsi model with boundary layout assumptionSystems and Computers in Japan10.1002/scj.469017060817:6(67-75)Online publication date: 21-Mar-2007
  • (2006)Silicon compilation of very high level languageIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.17098711:10(1227-1246)Online publication date: 1-Nov-2006
  • (2005)A survey of parallel computational geometry algorithmsParcella '8810.1007/3-540-50647-0_104(73-88)Online publication date: 2-Jun-2005
  • (2005)Optimal tradeoffs for addition on systolic arraysVLSI Algorithms and Architectures10.1007/3-540-16766-8_6(57-69)Online publication date: 1-Jun-2005
  • (2005)The VLSI revolution in theoretical circlesAutomata, Languages and Programming10.1007/3-540-13345-3_2(23-40)Online publication date: 28-May-2005
  • (2005)Effects of practical assumption in area complexity of VLSI computationRIMS Symposia on Software Science and Engineering10.1007/3-540-11980-9_20(128-146)Online publication date: 1-Jun-2005
  • (1997)An Optimal Multiplication Algorithm on Reconfigurable MeshIEEE Transactions on Parallel and Distributed Systems10.1109/71.5982788:5(521-532)Online publication date: 1-May-1997
  • (1993)2D grid architectures for the DFT and the 2D DFTJournal of VLSI signal processing systems for signal, image and video technology10.1007/BF018802725:1(57-74)Online publication date: 1-Jan-1993
  • (1992)Spatial machinesCommunications of the ACM10.1145/135239.13524235:10(60-73)Online publication date: 1-Oct-1992
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