Yoon et al., 2022 - Google Patents
A 4.5 Gb/s/pin transceiver with hybrid inter‐symbol interference and far‐end crosstalk equalization for next‐generation high‐bandwidth memory interfaceYoon et al., 2022
View PDF- Document ID
- 18404776469671588867
- Author
- Yoon K
- Park H
- Choi Y
- Sim J
- Choi J
- Kim C
- Publication year
- Publication venue
- Electronics Letters
External Links
Snippet
Abstract A 4.5 Gb/s/pin transceiver capable of eliminating the inter‐symbol interference (ISI) and far‐end crosstalk (FEXT) in a hybrid scheme with low power and small area for next‐ generation high‐bandwidth memory (HBM) interfaces is presented. Built around the …
- 239000004065 semiconductor 0 abstract description 4
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks ; Receiver end arrangements for processing baseband signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
- H04L25/08—Modifications for reducing interference; Modifications for reducing effects due to line faults; Receiver end arrangements for detecting or overcoming line faults
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
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