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A logic simulation machine

Authors:

Y. H. Levendel,

P. R. MenonAuthors Info & Claims

DAC '82: Proceedings of the 19th Design Automation Conference

Pages 65 - 73

Published: 01 January 1982 Publication History

Abstract

Special-purpose CAD hardware is increasingly being considered as a means to meet the challenge posed to conventional (software-based) CAD tools by the growing complexity of VLSI circuits. In this paper we describe the architecture of a logic simulation machine employing distributed and parallel processing. Our architecture can accommodate different levels of modeling ranging from simple gates to complex functions, and support timing analysis. We estimate that simulation implemented by the proposed special-purpose hardware will be between 10 and 60 times faster than currently used software algorithms running on general-purpose computers. With the available technology, a throughput of 1,000,000 gate evaluations/second can be achieved.

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Cited By

Willis JLi ZLin TMusgrave G(1995)Use of embedded scheduling to compile VHDL for effective parallel simulationProceedings of the conference on European design automation10.5555/224270.224355(400-405)Online publication date: 1-Dec-1995
https://dl.acm.org/doi/10.5555/224270.224355
Sasaki TKoike NOhmori KTomita K(1988)HAL; A block level hardware logic simulatorPapers on Twenty-five years of electronic design automation10.1145/62882.62958(625-630)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.1145/62882.62958
Hancock JDasGupta SThomas D(1986)Tutorial on parallel processing for design automation applications (tutorial session)Proceedings of the 23rd ACM/IEEE Design Automation Conference10.5555/318013.318025(69-77)Online publication date: 2-Jul-1986
https://dl.acm.org/doi/10.5555/318013.318025
Show More Cited By

Index Terms

A logic simulation machine
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design
2. Hardware
  1. Very large scale integration design

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cover image ACM Conferences

DAC '82: Proceedings of the 19th Design Automation Conference

January 1982

919 pages

ISBN:0897910206

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IEEE Press

Publication History

Published: 01 January 1982

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Willis JLi ZLin TMusgrave G(1995)Use of embedded scheduling to compile VHDL for effective parallel simulationProceedings of the conference on European design automation10.5555/224270.224355(400-405)Online publication date: 1-Dec-1995
https://dl.acm.org/doi/10.5555/224270.224355
Sasaki TKoike NOhmori KTomita K(1988)HAL; A block level hardware logic simulatorPapers on Twenty-five years of electronic design automation10.1145/62882.62958(625-630)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.1145/62882.62958
Hancock JDasGupta SThomas D(1986)Tutorial on parallel processing for design automation applications (tutorial session)Proceedings of the 23rd ACM/IEEE Design Automation Conference10.5555/318013.318025(69-77)Online publication date: 2-Jul-1986
https://dl.acm.org/doi/10.5555/318013.318025
Smith RThomas D(1986)Fundamentals of parallel logic simulationProceedings of the 23rd ACM/IEEE Design Automation Conference10.5555/318013.318016(2-12)Online publication date: 2-Jul-1986
https://dl.acm.org/doi/10.5555/318013.318016
Ashok VCostello RSadayappan POfek HO'Neill L(1985)Modeling switch-level simulation using data flowProceedings of the 22nd ACM/IEEE Design Automation Conference10.5555/317825.317957(637-644)Online publication date: 1-Jun-1985
https://dl.acm.org/doi/10.5555/317825.317957
Kane RSahni SLambert POfek HO'Neill LPistilli PLosleben PNash JShaklee DPreas BLerman H(1984)A systolic design rule checkerProceedings of the 21st Design Automation Conference10.5555/800033.800803(243-250)Online publication date: 25-Jun-1984
https://dl.acm.org/doi/10.5555/800033.800803
Ulrich ERadke COfek HShaklee DLosleben PNash JPistilli PLambert PPreas BLerman H(1983)A design verification methodology based on concurrent simulation and clock suppressionProceedings of the 20th Design Automation Conference10.5555/800032.800747(709-712)Online publication date: 27-Jun-1983
https://dl.acm.org/doi/10.5555/800032.800747
Druian RRadke COfek HShaklee DLosleben PNash JPistilli PLambert PPreas BLerman H(1983)Functional models for VLSI designProceedings of the 20th Design Automation Conference10.5555/800032.800715(506-514)Online publication date: 27-Jun-1983
https://dl.acm.org/doi/10.5555/800032.800715
Sasaki TKoike NOhmori KTomita KRadke COfek HShaklee DLosleben PNash JPistilli PLambert PPreas BLerman H(1983)HALProceedings of the 20th Design Automation Conference10.5555/800032.800656(150-156)Online publication date: 27-Jun-1983
https://dl.acm.org/doi/10.5555/800032.800656
Pfister GFrederick TCottrell L(1983)Parallel processing, special-purpose hardware, and DA applicationsProceedings of the 1983 computer science conference10.1145/800172.809675(21-24)Online publication date: 1-Jan-1983
https://dl.acm.org/doi/10.1145/800172.809675

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