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Logical Design of Digital SystemsJanuary 1975
- Author:
- Arthur D. Friedman
Abstract
No abstract available.
Cited By
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- Bernasconi A, Ciriani V and Cordone R An approximation algorithm for fully testable kEP-SOP networks Proceedings of the 17th ACM Great Lakes symposium on VLSI, (417-422)
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- Fallah F, Devadas S and Keutzer K OCCOM Proceedings of the 35th annual Design Automation Conference, (152-157)
- Fallah F, Devadas S and Keutzer K Functional vector generation for HDL models using linear programming and 3-satisfiability Proceedings of the 35th annual Design Automation Conference, (528-533)
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- Ferguson F and Shen J Extraction and simulation of realistic CMOS faults using inductive fault analysis Proceedings of the 1988 international conference on Test: new frontiers in testing, (475-484)
- Iyengar V, Rosen B and Spillinger I Delay test generation 2 Proceedings of the 1988 international conference on Test: new frontiers in testing, (867-876)
- Abramovici M, Krishnamurthy B, Mathews R, Rogers B, Schulz M, Seth S and Waicukauski J What is the path to fast fault simulation? Proceedings of the 1988 international conference on Test: new frontiers in testing, (183-192)
- Kirkland T and Mercer M (1988). Algorithms for Automatic Test-Pattern Generation, IEEE Design & Test, 5:3, (43-55), Online publication date: 1-May-1988.
- Gaede R, Ross D, Mercer M and Butler K CATAPULT Proceedings of the 25th ACM/IEEE Design Automation Conference, (597-600)
- Choi K, Hwang S and Blank T Incremental-in-time algorithm for digital simulation Proceedings of the 25th ACM/IEEE Design Automation Conference, (501-505)
- Abadir M and Reghbati H (1986). Functional Test Generation for Digital Circuits Described Using Binary Decision Diagrams, IEEE Transactions on Computers, 35:4, (375-379), Online publication date: 1-Apr-1986.
- Ahuja S and Reggia J Using abductive inferencing to derive complex error classifications for discrete sequential processes Proceedings of the 19th annual symposium on Simulation, (207-225)
- Mourad S, Hughes J and McCluskey E Stuck-at fault detection in parity trees Proceedings of 1986 ACM Fall joint computer conference, (836-840)
- Rogers W and Abraham J High level hierarchical fault simulation techniques Proceedings of the 1985 ACM thirteenth annual conference on Computer Science, (89-97)
- Shteingart S, Nagle A and Grason J RTG Proceedings of the 22nd ACM/IEEE Design Automation Conference, (803-807)
- Miller D and Muzio J (1984). Spectral Fault Signatures for Single Stuck-At Faults in Combinational Networks, IEEE Transactions on Computers, 33:8, (765-769), Online publication date: 1-Aug-1984.
- Melgara M, Paolini M, Roncella R and Morpurgo S CVT-FERT Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production, (250-256)
- Kinoshita K and Saluja K Built-in testing of memory using on-chip compact testing scheme Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production, (271-281)
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- Abramovici M, Levendel Y and Menon P (2019). A logic simulation machine, ACM SIGARCH Computer Architecture News, 10:3, (148-157), Online publication date: 1-Apr-1982.
- Abramovici M, Levendel Y and Menon P A logic simulation machine Proceedings of the 19th Design Automation Conference, (65-73)
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- Abramovici M, Levendel Y and Menon P A logic simulation machine Proceedings of the 9th annual symposium on Computer Architecture, (148-157)
- Agrawal V, Seth S and Agrawal P LSI product quality and fault coverage Proceedings of the 18th Design Automation Conference, (196-203)
- Abraham J and Gajski D (1981). Design of Testable Structures Defined by Simple Loops, IEEE Transactions on Computers, 30:11, (875-884), Online publication date: 1-Nov-1981.
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- Malek M and Bose A Functional simulation and fault diagnosis Proceedings of the 15th Design Automation Conference, (340-346)
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