CN111938543A - 具有最小面积单片式cmos图像传感器的相机系统 - Google Patents
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Abstract
本公开涉及在例如内窥镜的内腔内利用面积有限成像传感器来数字成像的方法、系统和计算机程序产品。
Description
相关申请交叉引用
本申请要求2012年7月26日递交的美国临时专利申请号No.61/676,289以及2013年3月15日递交的美国临时专利申请号No.61/790,590的优先权,通过引用的方式将其整体并入本文,包括但是不限制至下文特别明显的这些部分,参考的并入具有以下例外:如果以上参考申请的任何部分与本申请不一致,则本申请取代以上参考的申请。
背景技术
技术的进步已经为医疗用途的成像能力提供了进展。因为组成内窥镜的组件中的进展,因此已享有一些最有利的进展的一个领域可以是内窥镜外科手术。在例如关节镜检查和腹腔镜检查中使用的传统内窥镜设计为使得成像传感器放置在设备的近端,手持件单元内。在这样的配置中,内窥镜单元应当经由一组复杂的精确耦合的光学组件朝向传感器沿着其长度传以最小的损耗和失真输入射光。由于组件是昂贵的并且制造过程可以是劳动密集的,因此内窥镜单元的成本可以由光学器件占主要部分。此外,这种类型的范围可以是机械方面精致的并且相对较小的影响可以很容易损坏组件或者打乱其相对排列。
可能需要提供用于能够保持减少光环境中高质量视频流的内窥镜医疗用途的减小面积成像传感器的方法和系统。传感器的减小面积允许其被设置在内窥镜的远端,进而极大降低成本。这引起了无需维修或者消毒循环的单次使用的内窥镜的可能性。可替换地,它们可以以后被拆卸并且使得它们的一些组件回收利用。
如可以看到的,本公开提供了可以以文中将要公开的并且将由说明书中所讨论的和附图而进一步使能的有效和简练的方式做到这一点的方法和系统。
附图说明
参照以下附图描述本公开的非限制和非详尽实现,其中贯彻各个图相同的附图标记指代相同的部件,除非另作说明。参考下面的描述和附图本公开的优点可以变得更好理解,其中:
图1A示出了现有技术中通常的像素阵列的实现;
图1B示出了根据本公开的原理和教导的具有形成为光学黑色列的像素阵列的实现;
图1C示出了根据本公开的原理和教导的系统电路和互补系统硬件的示意;
图2示出了根据本公开的原理和教导的示例性像素阵列,其示出有源记录像素列和光学黑色像素列之间的关系;
图3示出了根据本公开的原理和教导的示例性像素阵列,其示出有源记录像素列和光学黑色像素列的降低数目之间的关系;
图4示出了根据本公开的原理和教导的根据一个实现的实例方法的硬件流程图;
图5示出了根据本公开的原理和教导的根据一个实现的实例方法的硬件流程图;
图6示出了根据本公开的原理和教导的根据一个实现的使用分区光系统的实例方法和硬件示意的流程图;
图7示出了根据本公开的原理和教导的根据一个实现的实例方法的流程图。
图8A示出了根据本公开的原理和教导的根据一个实现的实例方法的流程图;
图8B示出了根据本公开的原理和教导的根据一个实现的实例方法的流程图;
图9示出了根据一个实现的实例方法的流程图;
图10示出了根据本公开的原理和教导的根据一个实现的实例方法的硬件流程图;
图11A和图11B示出了根据本公开的原理和教导的具有用于生成三维图像的多个像素阵列的实现;
图12A和图12B分别示出建立在多个基板上的成像传感器的实现的立体图和侧视图,其中形成像素阵列的多个像素列位于第一基板上并且多个电路列位于第二基板上,还示出一列像素至其关联或者对应的电路列的电连接和电通信;以及
图13A和13B分别示出了具有用于生成三维图像的多个像素阵列的传感器的实现的立体图和侧视图,其中多个像素阵列和成像传感器被构建在多个基板上。
具体实现方式
本公开涉及用于提供先进的内窥镜的方法、系统和计算机程序产品以及它们在医疗过程期间的使用。在本公开的以下讨论中,参考形成本公开的一部分的附图,并且附图中可以通过示出本公开可以实践的具体实现的方式示出。可以理解的是可以利用的其它实现并且可以改变结构而不偏离本公开的范围。
关节镜检查和腹腔镜检查中使用的传统内窥镜设计为使得成像传感器放置在设备的近端,手持件单元内。在这样的配置中,内窥镜单元应当沿着其长度以最小的损耗和失真,经由一组复杂的精确耦合的光学组件,朝向传感器传输入射光。由于组件是昂贵的并且制造过程可以是劳动密集的,因此内窥镜单元的成本可以由光学器件关联的成本决定。
以上缺点的解决方案可以是将内窥镜自身内的成像传感器放置在内腔的远端,进而潜在地提供更大的光学简单性、坚固性和经济性,其可以在相关设备例如手机相机内得到普遍实现。然而这个方法的一个可接受的解决方案绝不是普通的,因为其引入了它自己的一套工程挑战,尤其可能是传感器应该适应在高度受限区域内的事实。
对传感器面积设置过分的约束可以导致更少和/或者更小的像素。因此,降低像素数直接影响空间分辨率。减小像素面积也可能减少可用信号容量和敏感性。降低信号容量降低了动态范围,即相机利用大范围亮度同时获取来自传感器的所有有用信息的能力。存在各种方法以延伸成像系统的动态范围超过像素自身。然而它们均具有某种不利(例如在分辨率或者帧速率中),并且它们可以引入或者加重在极端的情况下成为问题的不希望的伪影。可替换地,降低灵敏度导致是需要更大的光功率以给场景的较暗区域带来可接受的信号级。降低F数也可以补偿灵敏度的损失,但是以空间失真和焦点深度减小为代价。
在成像传感器技术中,由于CMOS成像传感器更易于集成和操作、优越的或者可比较的图像质量、更大的灵活性和较低的成本,CMOS成像传感器已在很大程度上取代在现代相机应用例如内窥镜检查中的常规CCD成像器。然而为了达到最佳的效果,CMOS传感器带来应该考虑的一定不利特性。
成像传感器可以包括转换图像信息成为数字数据所必须的电路,并且可以具有包括在传感器芯片自身上的各种层次的数字处理。数字处理的范围可以从用于纠错从放大器特性中变化生成的非理想CMOS传感器目的的基本算法至提供标准RGB彩色空间(芯片上相机)的视频数据的完整的图像信号处理(ISP)链条。
给定相机系统的传感器复杂性的希望程度可以由几个因素驱动,其中一个因素可以是成像传感器的可用物理空间。功能极小CMOS传感器将仅具有基本像素阵列加上一定程度上序列化和缓冲的电路以驱动芯片的模拟数据。操作和读出像素所需要的所有定时信号可以从外部提供。从外部供给控制信号的需求可以增加许多焊盘,其消耗大量可以更好地用于集聚光的基面板。因为需要电通信连接,因此其无需使得靠近像素阵列的最小功能等同于最小使用面积。
如果支持电路被远程放置并且如果第二级可以是距离传感器的明显距离,则变得更加希望在数字域中传输数据,因为可以使得其几乎不受噪声干扰和信号衰减影响。由于减少除了增加相机制造的复杂性和成本(之外还消耗空间)的传感器上焊盘的数量,因此可能存在强烈希望以减少导体的数量。尽管增加模数转换至传感器可以是必要的,但是增加的面可以被抵消至无需对与缓冲和传输模拟信号关联的信号恶化进行补偿的程度。在面积消耗的方面,考虑到CIS技术中可用的典型特征尺寸,优选的可以是经由图9中可见的一组控制寄存器和控制该寄存器的简单命令接口从而使得在芯片上生成的所有内部逻辑信号。
在高度受控照明环境中的具有减小象素计数的高清晰度图像可以通过光源处逐帧脉冲彩色切换结合高帧获取率和专门设计的单色传感器来实现。由于减小面积成像传感器的像素可以是色彩无关的,因此有效的空间分辨率可以比传统单传感器相机中它们的色彩(通常为贝尔模板过滤)相应物明显更高。由于少得多的入射光子被浪费,因此它们还可以具有更高的量子效率。此外,为了弄模糊与贝尔模板关联的彩色伪影,基于拜耳的空间色彩调制要求与单色情况相比所附的光学器件的MTF被降低。这对于可以利用彩色传感器实现的实际空间分辨率的具有不利影响。
这个特定公开还可以涉及用于内窥镜应用中的系统解决方案,其中成像传感器可以是在内窥镜的远端。为得到基于最小面积传感器的系统,存在如文中所描述的可以开发的超出明显减少像素计数的其它设计方面。特别是,芯片数字部分的面积应该随着至芯片(焊盘)的连接的数量而减少。该公开描述完成实现这样系统的目标的新颖方法。这涉及具有多个新颖特征的全定制CMOS成像传感器的设计。
本公开的实现可以包括或者利用专用或者通用计算机,其包括计算机硬件,诸如,例如,如以下更详细地讨论的一个或者多个处理器和系统存储器。本公开范围内的实现还可以包括用于携带或者存储计算机可执行指令和/或者数据结构的物理和其它计算机可读介质。这种计算机可读介质可以是可由通用或者专用计算机系统访问的任何可用介质。存储计算机可执行指令的计算机可读介质是计算机储存器介质(设备)。携带计算机可执行指令的计算机可读介质是传输介质。因此,通过举例而不是限制的方式,本公开的实现可以包括至少两种完全不同类型的计算机可读介质:计算机储存器介质(设备)和传输介质。
计算机存储介质(设备)包括RAM、ROM、EEPROM、CD-ROM、固态驱动器(″SSDs″)(例如,基于RAM)、闪速存储器,相变存储器(“PCM”),其它类型的存储器,其它光盘储存器,磁盘储存器或者其它磁储存器设备,或者可以用于存储计算机可执行指令或者数据结构形式的所希望程序代码装置并且可以由通用或者专用计算机访问的任何其它介质。
“网络”可以被定义为允许在计算机系统和/或模块和/或其他电子设备之间传输电子数据的一个或多个数据链路。当信息经由网络或者其它通信连接(电路、无线或者电路或者无线的组合)可以被传递或者提供至计算机时,计算机适当地将连接视为传输介质。传输介质可以包括网络和/或数据链路,其可以用以携带计算机可执行指令或者数据结构形式的所希望程序代码装置并且并且可以由通用或者专用计算机访问。以上的组合还应该包括在计算机可读介质的范围之内。
另外,计算机可执行指令或者数据结构形式的程序代码装置在到达各种计算机系统组件后可以从传输介质至计算机储存器介质(设备)自动传递(或反之亦然)。例如,经由网络或者数据链路接收的计算机可执行指令或数据结构可以在网络接口模块(例如,“NIC”)内在RAM中被缓冲并且然后最终被传递至计算机系统RAM和/或计算机系统处的较不易失性计算机储存器介质(设备)。RAM还可以包括固体驱动器(基于SSD或者PCIx的实时内存分层储存器,如FusionIO)。因此,应当理解的是计算机储存器介质(设备)可以包括在也(或者甚至主要)利用传输介质的计算机系统组件中。
计算机可执行指令包括例如指令和数据,其当在处理器处被执行时导致通用计算机、专用计算机或者专用处理设备执行一定功能或一组功能。计算机可执行指令可以是例如二进制、中间格式指令,例如汇编语言,或者甚至源代码。尽管主题已经以针对结构特征和/或方法动作的语言进行了描述,但是可以理解的是在附上的权利要求书中限定的主题不必限制至所描述的特征或者以上所描述的动作。相反,所描述的特征和动作被公开为实现权利要求的示例形式。
本领域的技术人员可以理解的是本公开可以利用许多类型计算机系统配置在网络计算环境中实践,算机系统配置包括个人计算机、台式计算机、膝上型计算机、消息处理器、手持式设备、手机、相机控制单元、多处理器系统、基于微处理器或者可编程消费电子产品、网络PC、小型计算机、大型计算机,移动电话,掌上电脑,平板电脑,寻呼机,路由器,交换机,各种存储设备等等。本公开还可以在分布式系统环境中实践,其中通过网络链接(由电路数据链路、无线数据链路或者电路和无线数据链路的组合)的本地和远程计算机系统两者均执行任务。在分布式系统环境中,程序模块可以位于本地和远程记忆存储设备中。
另外,在适当情况下,文中所描述的功能可以在一个或者多个硬件,软件、固件、数字组件或者类似组件中执行。例如,一个或多个专用集成电路(ASIC)和可编程门阵列(PGA)可以被编程以执行本文所描述的一个或多个系统和程序。某些术语贯彻下面的描述和权利要求书使用以指代特定的系统组件。如本领域技术人员可以理解的,组件可以由不同的名称指代。本文并不旨在以名称不同而不是功能对组件之间区别。
为了偏移校准的目的,成像传感器可以包括特殊用途,光学盲或光学黑(OB)的行(在阵列的顶部和/或底部)和列(向阵列的右侧和/或左侧)。在图1A中可以示出成像传感器101的示例布局,其具有记录区域中的像素105连同顶部和底部OB行109和左侧和右侧OB列107。对于OB钳位算法,OB行109通常用于监视模拟像素黑电平。OB行109还通常被数字算法用于取消列固定模式噪声或者FPN(CFPN)。在实施例中,保护环111可以围绕成像传感器101的周围。在另一方面,OB列107通常用于估计列偏移以作为一种抵消任何列噪声的装置。由于列噪声可能是时间的,因此偏移应当对于每一帧中的每一列重新计算。
可以通过对于OB钳位算法去除OB行109和使用OB列107代替OB行109而实现像素阵列尺寸的总体减少(见以下讨论)。在实现中,通过获取暗数据帧可以取消包括CFPN的所有FPN类型,进而消除了对专用CFPN纠错和其相关联的OB行109的需求。图1B示出了正是这样的成像传感器101和像素阵列105的实例,其中不存在OB行展示但是相反包括OB列107。
图1C可以是示出了示例计算设备100的框图。计算设备100可用于执行各种程序,如本文所讨论的那些。计算设备100可以用作服务器、客户端或者任何其它计算实体。计算设备100可以执行如文中所讨论的各种监视功能并且可以执行一个或者多个应用程序,例如文中所描述的应用程序。计算设备100可以是多种计算设备中的任何一个,例如台式计算机、笔记本电脑、服务器计算机、手持式计算机、平板计算机等。
计算设备100包括一个或者多个处理器102、一个或者多个存储器设备104、一个或者多个接口106、一个或者多个大容量储存器设备108、一个或者多个输入/输出(I/O)设备110以及显示设备130,所有这些都耦接至总线112。处理器102包括执行存储在存储器设备104和/或大容量储存器设备108中指令的一个或者多个处理器或控制器。处理器102还可以包括各种类型的计算机可读介质例如高速缓冲存储器。
存储器设备104包括各种计算机可读介质例如易失性存储器(例如,随机存取存储器(RAM)114)和/或非易失性存储器(例如,只读存储器(ROM)116)。存储器设备104也可以包括可重写的ROM例如闪速存储器。
大容量储存器设备108包括各种计算机可读介质例如,磁带,磁盘,光盘,固态存储器(例如,闪速存储器)等等。如图1C中所示,特定大容量储存器设备可以是硬盘驱动器124。各种驱动器也可包括在大容量储存器设备108中从而允许对各种计算机可读介质读取和/或写入。大容量储存器设备108包括可去除介质126和/或不可去除的介质。
I/O设备110包括各种设备,其允许数据和/或其它信息被输入到或从计算设备100中获取到。实例I/O设备110包括光标控制设备、键盘、辅助键盘、麦克风、监视器或者其它显示设备、扬声器、打印机、网络接口卡、调制解调器、透镜、CCD或者其它图像获取设备,等等。
显示设备130包括能够为计算设备100的一个或多个用户显示信息的任何类型的设备。显示设备130的实例包括监视器、显示终端、视频投影设备等等。
像素阵列135还可以被包括以及相对于系统内的其它电路可以远程操作。
接口106包括各种接口,其允许计算设备100与其它系统、设备或者计算环境进行交互作用。实例接口106可以包括任何数量的不同网络接口120,例如,局域网(LAN)、广域网(WAN)、无线网络以及互联网的接口。其它接口包括用户接口118和外围设备接口122。接口106也还可以包括一个或多个用户接口元件118。接口106还可以包括一个或者多个外围接口例如对于打印机的接口、定点设备(鼠标、轨迹板等)、键盘等等。
总线112允许处理器102、存储器设备104、接口106、大容量储存器设备108以及I/O设备110彼此通信以及耦接至总线112的其它设备或者组件。总线112代表一个或者多个多种类型的总线结构,例如系统总线、PCI总线、IEEE 1394总线、USB总线等等。
为了说明的目的,程序和其它可执行程序组件在文中示出为离散的块,尽管可以理解的是这样的程序和组件可以在不同的时间位于计算设备100的不同储存器组件中并且由处理器102可执行。可替换地,文中所描述的系统和程序可以在硬件或者硬件、软件和/或固件的组合中实现。例如,一个或者多个专用集成电路(ASIC)联机或者在系统的初始化之前可以被编程以执行一个或者多个文中所描述的系统和程序。
OB列的数目通常可以是100或更多,取决于空间限制等。可用的OB列越多,列偏移精确度越大。更大的精确度意味着更低的列噪声、后期纠错。通常,对于如图2中所示的每个列所有的可用物理OB将被读出。如果实现较小数量的物理像素,而不是具有所需数量的物理OB像素,(考虑到一定精确度目标),被实现的较小数量的物理像素在水平读出过程期间多次重新抽样,则可以达到阵列尺寸减小的进一步程度。这个方法在图3中示出。
存在于数字转换器的输出处的原始CMOS成像传感器数据可能是很不理想的。它通常情况可能是读出的像素的水平行的最佳顺序并不等同于阵列内的实际物理顺序。另外,原始数据通常显示还反映读出结构的性质的不希望的伪影,其在弱光和相应的高增益的情况中变得非常明显。这些读出伪影通常可以包括列FPN,其从逐列偏移中的变化中生成;以及时间列噪声,其由与水平读出过程相关联的电路复位造成。
CMOS传感器的另一个兴致属性可以是:一定程度的暗信号可以由像素内的光电二极管生成。从该电流所生成的积分信号的量取决于曝光时间和温度。由于暗信号可能无法与光信号区分,因此其中的改变转换为模拟域中信号基准中的改变。为了可使ADC的可用动态范围得到充分的利用,可能重要的是:对暗信号进行抽样和调整。图4示出了在CMOS传感器中这个通常是如何完成的。来自OB像素的数据可能是片上逻辑的平均并且与目标数字黑电平比较。为了使得黑电平尽可能靠近目标,对输入偏移电压进行连续调整。这可以被称为黑钳位或者OB钳位过程。
大多数的市售传感器包括片上逻辑以执黑钳位和数字噪声纠错。这个逻辑不必位于传感器上,然而并且为了开发具有最小面积传感器的相机系统,将这些纠错移至图像信号处理链(ISP)是有意义的。如果它们位于具有很多可用的逻辑门和RAM的FPGA或者ASIC中,由于纠错是更少资源限制的,因此这实际上对于整个系统的性能有净利益。
图5示出了如何将OB钳位逻辑移动离开传感器(连同传感器纠错算法)。在这种情况下,来自OB钳位逻辑的关于模拟调整的信息可以经由其命令接口通过指令被传递至传感器。
图6示出了实现已经在包括最小面积传感器的系统的背景下开发的ISP前端的实例。在此实例中传感器上存在两个数字转换器,其分别转换偶数和奇数列并且传递两个查分端口上的串行数据。
在解串行化之后,第一过程可以涉及重建每个端口的列成为适当顺序。接下来两个纠错块即处理黑钳位和列噪声纠错是数据路径专用的,也就是两条链将被分别处理。
黑钳位-图7中的流程图可以是如何在片上传统CMOS成像系统内通常操作OB钳位逻辑的实例。可能通常存在多个抽样并且对来自多个OB行的每帧做模拟调整,同时OB行像素存在于数字读出路径中。如前面所讨论的,对于最小面积传感器,OB像素的数目可以降低至必要的最低值,并且这可以通过消除OB行和使用列以纠错黑钳位以及列噪声来实现。图8A和8B中的流程图概述了实现这的一种方法。基本理念可以是累积对于整个帧所测得的、未纠错的列偏移的集合并且使用最终估计以进行黑钳位调整。同时,为了使得对单独列做出数字调整,每个单独列偏移估计可以供给给后续过程。
黑钳位电平的调整可以使用传感器上的DAC或电荷泵通过控制DC电压(V黑钳位)而完成。由于例如光电二极管中的暗电流,进入ADC的像素电压偏移四处移动,进而DAC需要通过估计数字域中的黑偏移而定期调整。
行为不正常的各个OB像素可以严重降低黑偏移测量的质量;进而处理它们是十分重要的。一个好方法可能是对每个OB像素取包括问题像素和其最邻近4个像素的一组5个像素的中值。最后列偏移估计将然后被认为是所有中值的平均值。应当做出一些准备以在开始和结束时不失去的统计资料,例如缓冲OB的整个抽样和裹住5个抽样。这需要流水线处理数据,导致延迟至少等于每行每个ADC通道的OB总数。
偶数通道的列偏移估计(假设两个ADC具有奇偶布置),行号r:
列偏移,其中NOB可以是每行OB像素的总数并且ui可以是OB像素i的中值(median),因此计算为:
μ4=mcdian[x0,x2,x4,x6,x8]
...
同样地,列偏移估计计数通道(确保两个ADC具有奇偶布置),行号r“
其中:
μ5=median[x1,x3,x5,x7,x9]
...
要获得总帧黑电平,一个好的实用方法可以通过累计所有列偏移以使用简单指数平滑法(SES)计算总黑电平而提供。使用SES的好处可以是:朝向帧的端部的行可以对最终黑估计具有较大影响,这对于发生在子帧时间尺度上黑偏移中的寻址变化可能是希望的。
在SES中,每当抽样可用时,可以递增地调整节运行估计。为方便起见,在被添加至先前估计之前,抽样可以由二进制数(2q)分割。为了将结果标准化,先前估计可以可以每次首先与(2q-1)/2q相乘。q的高值导致稳定情况中一段时间较大的统计精确度。Q的较低值可以使得纠错对快速变化反应更大,q应当作为可调参数。
kr=Lr(r=0)
其中,kr可以是行r之后的黑电平估计,并且Lr可以是对于每行r的列偏移估计。在阵列中的最后行已经增加之后,可以决定对黑钳位DAC做什么。
黑钳位算法将要求可以由可调整参数提供的目标黑电平。根据所观察到的黑色估计是否高于或者低于目标,所讨论的通道的传感器上的黑钳位DAC将被向上或者向下推送。只要黑电平可能靠近目标,推送的大小可以是例如的最小单位,即一个DAC计数。在黑钳位可能距离目标很远的情况下,可以作出较大比例的推送,参见图8A。该算法需要知道黑钳位DAC计数和传感器ADC计数之间对应关系的粗略校准和相对于输出黑电平的DAC调整的定向性。
列噪声纠错中“列噪声”是指像素的水平行的偏移中随机的时间变化。可能存在多个源,但是其可以被看作是每当可以读出像素行时复位模拟元件导致的复位噪声。它可能是时间的并且应该对于每帧的每个新列计算新的纠错。由于在ADC输入处的放大级可能是最终的模拟元件,因此可以有很好的理由怀疑:列噪声可以现象学地显得每个ADC通道不独立。因此,最佳的做法可能是独立地纠正每个ADC(通道)。
由于用于列偏移估计的OB像素的抽样可以与被施加纠错的(并且抽样统计是有限的)抽样是分开的,因此完全消除列噪声也许是不可能的。假设所有的噪声可以是高斯的,纠错后的列噪声可以近似等于存在于OB像素中的像素时间噪声引起的列偏移估算中的不确定性。
其中,σL,post可以是纠错后时间列噪声,σP可以是OB像素时间噪声并且NOB可以是OB像素的数量。列噪声纠错还引入空间列噪声分量,主要由于存在于OB像素内的像素FPN:
伪影可以后续在链中由FPN纠错消除。模拟已经指示:为了使时间列噪声不可见,幅度应该小于像素时间噪声的约1/10。该纠错指示每行需要100OB像素。
列噪声纠错应用至光学观测(清楚的)像素:
x′i=xi-L+B
其中L可以是对于当前列的列偏移估计,从“黑钳位”模块传输并且B可以是黑钳位目标电平。
完整列重组。这将涉及简单组合两个数据通道成为完整列。它们需要被交错为使得最终清楚像素顺序反映阵列中的正确顺序。
FPN纠错,CMOS图像传感器具有多个噪声源,噪声源的幅度和外观取决于物理条件的范围。没有相干分量的纯泊松或高斯时间噪声(例如光子散粒噪声或者源极跟随器1/f读噪声)看起来像噪声可以看起来一样自然。所有的其它可感知的噪声类型可以对于相同的幅度降低图像质量至更大的程度。空间噪声(FPN)可能是特别令人震惊并且CMOS传感器固有地具有至少两个源;像素FPN和列FPN。像素FPN可能主要是由于来自逐个像素(DSNU)的光电二极管漏电流(暗信号)中的变化。这个源可以是以指数方式依赖于结温(7)和并且线性地依赖于曝光时间。列FPN可以是读出结构的结果,读出结构中相同列内的像素通过公共模拟读出元件被引导。
通常,片上数字FPN纠错将涉及仅处理列FPN分量,需求每列一个偏移纠错寄存器。这样纠错的精确度可能通常是每列20比特左右,其转换成用于1920X 1080阵列约为5kB的RAM。迁移数字传感器纠错至ISP的一个好处可以是RAM的随时可用。这开创了取消任何行、列或者逐像素组件的全面FPN纠错的可能性。这可以通过简单指数平滑法(SES)而实现,指数平滑法中每个新的黑帧抽样可以用于调节每个物理像素基础上的运行偏移估计。
可编程数字增益。图6中的最后一块对应于可编程数字放大器。CMOS iSoC通常装配具有非常精细的增量的数字可编程增益级。这可能是有助于自动曝光过程,其通常调节增益和曝光时间。
数字放大器可以用于将传感器ADC的范围与ISP(例如,对于11比特ADC×2至12比特ISP)的范围对齐。少量的数字增益也可以被用于修剪数字列噪声的印记和FPN纠错,其在ADC的全部范围变得明显。
配置寄存器地址ROM的最小化。传统CMOS图像传感器包括用于控制传感器如何操作的许多可写寄存器。它们将通常包括DAC设置以调节偏置电压和电流、定时参数,以例如用于像素获取和读出周期,放大器偏移和增益等。通常的惯例可以分配一个特定的8比特或16比特的地址给通常包括8或者16比特数据的每个寄存器。
一个更节省空间的方法涉及组合大量的控制RAM成为单个、长寄存器。在极端情况下,所有参数可以被放置进单个寄存器,不需要地址ROM。然而由于写控制寄存器需要时间并且典型的视频应用涉及基于逐帧改变少量操作参数(例如曝光时间),因此这种解决方案可能不是很实际的。最实际的解决方案可以通过功能地连接相关的参数集合成为少量长寄存器来提供。具有比如10个寄存器(需要4个地址比特)相对一个寄存器而言的空间上的差异可以忽略不计。具体而言,以高速率(例如每帧)周期性地写入的所有参数一切属于唯一的寄存器(帧寄存器)是有意义的。这些参数包括曝光时间、收益、增量偏移调整和维持连续高品质视频所需的任何其它。如果如前面所描述地数字数据通路逻辑已经被迁移出芯片,则黑钳位电压调节数据也属于该寄存器,因此它也应该每帧都被修正。在实现中,在该配置阶段期间,寄存器可以被写入并且进而相对于总帧定时的帧寄存器写入的定时应当由相机仔细控制。
参数寄存器分组的其它实例可以包括模拟电流、模拟电压、像素定时、垂直定时、传感器命令(复位等)等。在图9中,寄存器的布置可以示出为具体最小面积传感器设计。“命令”寄存器可用于最高级别面向事件的1比特命令,例如芯片复位和其它寄存器下方示出的对于其它寄存器的负载。2线协议地址译码器决定哪些移位寄存器直接输入2线协议数据。为了下载“格式”寄存器,例如外部控制器发送具有与格式寄存器关联的地址的命令。这放置数据流进入格式寄存器移位寄存器。然后为了锁存数据,跟踪命令被发送至设置有特定“负载格式”比特的命令寄存器。可以理解的是,可以使用多个控制寄存器。控制寄存器可以是数字锁存器,其经由移位寄存器被加载。移位寄存器可以是任意长度的。在一个实施例中,多个控制寄存器中的大部分可以使用包括数十比特的移位寄存器被加载。在一个实施例中,移位寄存器可以使用串行的、2线协议而被加载。在一个实施例中,移位寄存器中的一个可以专用于帧到帧参数变化诸如,例如,积分时间和黑钳位偏移调整。
图10示出了用于内窥镜应用的最小面积传感器的实施例的整体框图,其中传感器可以包括入内窥镜单元的远端。
图11A和图11B分别示出了根据本公开的教导和原理具有用于生成三维图像的多个像素阵列的单片式传感器2900的实现的立体图和侧视图。这样的实现对于三维图像获取是希望的,其中两个像素阵列2902和2904可以在使用过程中被抵消。在另一个实现中,第一像素阵列2902和第二像素阵列2904可以是专用于接收电磁辐射的波长的预定范围,其中第一像素阵列专用于与第二像素阵列不同的电磁辐射的波长范围。
图12A和图12B分别示出建立在多个基板上的成像传感器3000的实现的立体图和侧视图。如图所示,形成像素阵列的多个像素列3004位于第一基板3002上并且多个电路列3008位于第二基板3006上。还在图中示出的是一列像素至其关联或者对应的列的电路的电连接和电通信。在一个实现中,或者可以是利用其像素阵列制造的并且支撑单个、单片式基板/芯片上电路的成像传感器可以具有与所有或者大部分支撑电路分开的像素阵列。本公开可使用利用三维堆叠技术被堆叠在一起的至少两个基板/芯片。两个基板/芯片的第一基板/芯片3002可以使用图像CMOS方法进行处理。第一基板/芯片3002可以包括专有的像素阵列或者由有限的电路包围的像素阵列。第二或者随后的基板/芯片3006可以使用任何方法进行处理,并且不必是来自图像CMOS方法。为了在或者基板/芯片上十分有限的空间或者面积中集成多种和多个功能,或者混合模式或者模拟方法,为了集成例如精确的模拟功能或者RF方法,为了实现无线功能或者MEMS(微机电系统),为了集成MEMS设备,第二基板/芯片3006可以是但是不限于高密度的数字处理。可以使用任何三维技术,将图像CMOS基板/芯片3002与第二或者后续基板/芯片3006堆叠。第二基板/芯片3006可以支持大多或者大部分电路,其否则将在第一图像CMOS芯片3002(如果在单片基板/芯片上实现)中实现为外围电路并且进而增加了整个系统的面积同时保持像素阵列的尺寸不变,并且因此在最大可能程度说被优化。两个基板/芯片之间的电连接可以通过3003和3005的互连实现,其可以是线接合,碰撞和/或TSV(硅穿孔)。
图13A和13B分别示出了用于生成三维图像的多个像素阵列的传感器3100的实现的立体图和侧视图。三维成像传感器可以被构建在多个基板上并且可以包括多个像素阵列和其它关联电路,其中形成第一像素阵列的多个像素列3104a和形成第二像素阵列的多个像素列3104b分别位于相应的3102a和3102b,并且多个电路列3108a和3108b都位于分开基板3106上。还示出的是像素列至关联或者电路对应列之间的电连接和通信。
可以理解的是,本公开的教导和原理可以在可重复使用设备平台、有限使用设备平台、重新仿真(re-posable)使用设备平台或者单次使用/一次性设备平台中使用,而不偏离本公开的范围。可以理解的是,在可重复使用设备平台中,最终用户负责设备的清洁和灭菌。在有限使用设备平台中,在变得不可操作前设备可以被使用一些特定的次数。典型的新设备利用需要最终用户在附加用途之前清洁和灭菌的附加用途无菌交付。在重新仿真(re-posable)使用设备平台中,第三方可以重新处理设备(例如,清洁、打包和灭菌),用于附加用途的单次使用设备以比新单元更低的成本使用。在单次使用/一次性设备平台中,设备提供对操作室的灭菌并且在被布置前仅能使用一次。
在封闭光环境中使用的内窥镜的实施例可以包括:内窥镜主体,其提供手持结构;内腔,其由主体第一端处的内腔基座附接;内腔的尖端部,其与内腔基座相对;透镜,其可以设置在尖端部的最远端部;成像传感器,其可以靠近内腔的尖端部设置,包括用于感测电磁辐射的像素阵列,其中,像素阵列可以具有有源像素和光学黑色像素以用于纠错来自所述像素阵列的输出;其中光学黑色像素可被组织在与像素阵列内有源像素邻近的列中;传递端口,其用于传递由像素阵列生成的数据;数字转换器,其转换模拟像素抽样成数字数值;黑钳位电路,其提供对由像素阵列生成的数据的偏移控制;可以存储在用于控制黑钳位电路的存储器内的过程;电连接,其可以提供成像传感器和图像信号处理电路之间的电通信,图像信号处理电路可以远离内窥镜主体和控制单元内的成像传感器设置。
环境光线不足的环境中用于数字成像的系统实施例可以包括:成像传感器,其用于感测电磁辐射,其中所述成像传感器可进一步包括:像素阵列,其具有有源像素及光学黑色像素以纠错来自所述像素阵列的输出;其中光学黑色像素可被组织在与像素阵列内有源像素邻近的列中;传递端口,其用于传递由像素阵列生成的数据;数字转换器,其转换模拟像素抽样成数字数值;黑钳位电路,其提供对由像素阵列生成的数据的偏移控制;可以存储在用于控制黑钳位电路的系统的存储器内的过程;内窥镜,其用于接近环境光线不足的环境;手持件,其附接至所述内窥镜并且其中所述内窥镜可以由操作手持件而操作;控制单元,其包括处理器并且其中所述控制单元可以与成像传感器电通信;以及电连接手持件和控制单元的连接线缆。
此外,本公开的教导和原理可以包括电磁能的任何和所有的波长,其包括可见光和非可见光光谱,例如红外(IR)、紫外线(UV)和X射线。
前面的描述是为了说明和描述的目的而展示。其并不旨在详尽地或限制本公开至精确形式的公开。许多修改和变化根据上述教导是可能的。此外,应该指出的是,前述替换实施的任何或者全部可以用于所希望的任何组合以形成本公开的其它混合实施。
此外,尽管本公开的具体实施已经描述和示出,但是本公开并不限制至所描述和示出的部件的具体形式或者布置。本公开的范围可以由此处所附上的权利要求、此处和不同申请中递交的任何其它权利要求及其等同物而限定。
Claims (71)
1.一种在封闭光环境中使用的内窥镜设备,包括:
内窥镜主体,其包括:
手持结构;
内腔,其通过所述主体的第一末端的处的内腔基座而被附接;
所述内腔的尖端部,其与所述主体的所述内腔基座相对;
透镜,其设置在所述尖端部的最远端部;
CMOS成像传感器,其靠近所述内腔的所述尖端部设置,其中所述CMOS成像传感器包括:
像素阵列,其用于感测电磁辐射,其中所述像素阵列包括有源像素和光学黑色像素,其中所述光学黑色像素组织在多个列中并且不包括与所述像素阵列内的所述有源像素邻近的任何光学黑色行;
传递端口,其用于传输由所述像素阵列生成的数据;
数字转换器,其将模拟像素数据转换成为数字数据;
黑钳位电路,其提供对由所述像素阵列生成的数据的偏移控制,其中通过对于光学黑钳位算法去除所述光学黑色行并且使用所述光学黑色列代替所述光学黑色行来实现所述像素阵列的尺寸的总体减少,其中所述光学黑色像素的列组织在所述成像传感器的右侧和左侧上;
电连接,其提供在所述成像传感器和远离所述成像传感器设置的图像信号处理电路之间的电通信。
2.根据权利要求1所述的内窥镜设备,进一步包括长寄存器,其中所述长寄存器包括用于控制所述像素阵列的曝光时间和所述像素阵列的增益的控制参数项目。
3.根据权利要求1所述的内窥镜设备,进一步包括长寄存器,所述长寄存器包括用于控制所述像素阵列的增量偏移调整或者所述像素阵列的曝光时间的控制参数项目。
4.根据权利要求1所述的内窥镜设备,进一步包括长寄存器,所述长寄存器包括用于控制所述像素阵列的增量偏移调整或者所述像素阵列的增益的控制参数项目。
5.根据权利要求1所述的内窥镜设备,进一步包括长寄存器,所述长寄存器包括用于控制增量偏移调整和所述像素阵列的曝光时间或者所述像素阵列的增益的控制参数项目。
6.根据权利要求1所述的内窥镜设备,进一步包括长寄存器,所述长寄存器包括用于控制所述像素阵列的增量偏移调整和所述像素阵列的曝光时间的控制参数项目。
7.根据权利要求1所述的内窥镜设备,进一步包括长寄存器,所述长寄存器包括用于通过调整模拟电流、模拟电压、像素定时、垂直定时、传感器复位和传感器初始化中的任意一个来控制像素阵列的所述操作的多个控制参数项目。
8.根据权利要求1所述的内窥镜设备,其中所述有源像素和所述光学黑色像素校准来自所述像素阵列的输出。
9.根据权利要求1所述的内窥镜设备,其中所述光学黑色像素组织在与所述像素阵列内的所述有源像素邻近的列中。
10.根据权利要求1所述的内窥镜设备,其中,所述CMOS成像传感器包括单个数字转换器。
11.根据权利要求1所述的内窥镜设备,其中,所述CMOS成像传感器包括多个数字转换器。
12.根据权利要求1所述的内窥镜设备,其中,所述CMOS成像传感器包括单个输出端口。
13.根据权利要求1所述的内窥镜设备,其中,所述CMOS成像传感器包括多个输出端口。
14.根据权利要求9所述的内窥镜设备,其中,对所述光学黑色像素的列多次抽样以降低光学黑色列的数目。
15.根据权利要求1所述的内窥镜设备,其中所述光学黑色像素组织在与所述像素阵列内的所述有源像素邻近的列中。
16.根据权利要求15所述的内窥镜设备,其中,所述成像传感器的右侧上的光学黑色列中的一列被多次抽样。
17.根据权利要求15所述的内窥镜设备,其中,所述成像传感器的左侧上的光学黑色列中的一列被多次抽样。
18.根据权利要求15所述的内窥镜设备,其中,所述成像传感器的右侧上的光学黑色列中的一列被多次抽样,并且所述成像传感器的左侧上的光学黑色列中的一列被多次抽样。
19.根据权利要求15所述的内窥镜设备,其中,所述成像传感器的右侧上的多个光学黑色列被多次抽样。
20.根据权利要求15所述的内窥镜设备,其中,所述成像传感器的左侧上的多个光学黑色列被多次抽样。
21.根据权利要求15所述的内窥镜设备,其中,所述成像传感器的右侧上的多个光学黑色列被多次抽样,并且所述成像传感器的左侧上的多个光学黑色列被多次抽样。
22.根据权利要求1所述的内窥镜设备,其中,所述黑钳位电路相对于所述成像传感器被远程定位。
23.根据权利要求22所述的内窥镜设备,其中,所述设备还包括命令接口以控制所述黑钳位电路。
24.根据权利要求1所述的内窥镜设备,其中,所述黑钳位电路感测由数模转换器生成的电压。
25.根据权利要求1所述的内窥镜设备,其中,所述黑钳位电路感测由电荷泵生成的电压。
26.根据权利要求1所述的内窥镜设备,其中,所述成像传感器纠错的一部分相对于所述成像传感器被远程定位。
27.根据权利要求1所述的内窥镜设备,其中,所有的成像传感器纠错相对于所述成像传感器被远程定位。
28.根据权利要求1所述的内窥镜设备,进一步包括多个控制寄存器,其中所述控制寄存器是经由移位寄存器加载的数字锁存器。
29.根据权利要求28所述的内窥镜设备,其中,所述移位寄存器是任意长度的。
30.根据权利要求28所述的内窥镜设备,其中,所述多个控制寄存器中的大多数是使用包括数十比特的移位寄存器被加载的。
31.根据权利要求28所述的内窥镜设备,其中,所述多个控制寄存器中的大多数是使用包括数百比特的移位寄存器被加载的。
32.根据权利要求28所述的内窥镜设备,其中,所述多个控制寄存器中的大多数是使用包括数千比特的移位寄存器被加载的。
33.根据权利要求28所述的内窥镜设备,其中,所述移位寄存器是使用串行的2线协议被加载的。
34.根据权利要求28所述的内窥镜设备,其中,所述移位寄存器中的一个移位寄存器专用于帧到帧参数改变。
35.根据权利要求1所述的内窥镜设备,其中,所述成像传感器包括多个像素阵列,其中多个像素阵列用于创建三维图像。
36.根据权利要求1所述的内窥镜设备,其中,所述成像传感器还包括:包括所述像素阵列的第一基板和包括用于所述像素阵列的支持电路的第二基板,其中包括所述支持电路的所述第二基板远离包括所述像素阵列的第一基板被定位。
37.根据权利要求36所述的内窥镜设备,其中,所述第一基板相对于所述第二基板垂直对齐。
38.根据权利要求1所述的内窥镜设备,其中所述光学黑色像素组织在与所述像素阵列内的所述有源像素邻近的列中,其中所述光学黑色像素的列被多次抽样以计算列偏移。
39.根据权利要求1所述的内窥镜设备,其中所述光学黑色像素组织在与所述像素阵列内的所述有源像素相邻的多个列和多个行中。
40.根据权利要求39所述的内窥镜设备,其中,所述光学黑色行中的大多数从所述像素阵列中被移除,使得仅有所述光学黑色行中的少数是具有功能的。
41.根据权利要求1所述的内窥镜设备,其中所述光学黑色像素组织在与所述像素阵列内的所述有源像素邻近的多个列中,其中多个列用于计算所述黑钳位电路的基线黑电平和由所述图像信号处理器执行的黑钳位计算。
42.根据权利要求41所述的内窥镜设备,其中,所述黑钳位计算用于在数字转换器之前控制电压偏移,并且所述黑钳位计算使用多个列偏移利用简单指数平滑法(SES)确定数据整个帧内的总偏移。
43.根据权利要求1所述的内窥镜设备,其中,所述设备还包括存储在存储器中的二维帧数据以用于抵消由图像传感器生成的固定模式噪声。
44.根据权利要求43所述的内窥镜设备,其中,所述二维帧数据是从暗帧捕获中得到的。
45.根据权利要求44所述的内窥镜设备,其中,通过不对发射器施加脉冲来有助于所述暗帧捕获。
46.根据权利要求44所述的内窥镜设备,其中,通过所述暗帧捕获的简单指数平滑法来计算所述像素偏移。
47.一种用于在环境光线不足的环境中数字成像的系统,包括:
用于感测电磁辐射的CMOS成像传感器,其中所述CMOS成像传感器包括:
像素阵列,其用于感测电磁辐射,其中所述像素阵列包括有源像素和光学黑色像素,其中所述光学黑色像素组织在多个列中并且不包括与所述像素阵列内的所述有源像素邻近的任何光学黑色行;
传递端口,其用于传输由所述像素阵列生成的数据;
数字转换器,其将模拟像素抽样转换成数字数值;
黑钳位电路,其提供对由所述像素阵列生成的数据的偏移控制,其中通过对于光学黑钳位算法去除所述光学黑色行并且使用所述光学黑色列代替所述光学黑色行来实现所述像素阵列的尺寸的总体减少,其中所述光学黑色像素的列组织在所述成像传感器的右侧和左侧上;
内窥镜,其用于接近环境光线不足的环境;
手持件,其附接至所述内窥镜,其中,能够通过所述手持件的操作来操作所述内窥镜;
包括处理器的控制单元,其中,所述控制单元能够与成像传感器电通信;以及
连接线缆,其电连接所述手持件和所述控制单元。
48.根据权利要求47所述的系统,其中,所述像素阵列包括用于校准来自所述像素阵列的输出的光学黑色像素和有源像素。
49.根据权利要求48所述的系统,其中,所述光学黑色像素组织在与所述像素阵列内的有源像素邻近的列中。
50.根据权利要求47所述的系统,进一步包括能够远离所述像素阵列而被定位的黑钳位控制过程。
51.根据权利要求47所述的系统,进一步包括用于处理能够由所述像素阵列创建的图像数据的可编程门阵列。
52.根据权利要求47所述的系统,进一步包括少于50个的光学黑色像素列,使得其能够在所述系统的操作内被再抽样以提供精确性。
53.根据权利要求48所述的系统,进一步包括光学黑色像素列,所述光学黑色像素列均匀设置在所述有源像素列的相对侧。
54.根据权利要求48所述的系统,进一步包括光学黑色像素列,所述光学黑色像素列不均匀地设置在所述有源像素列的相对侧。
55.根据权利要求48所述的系统,进一步包括黑钳位控制过程,所述黑钳位控制过程对由光学黑色像素接收的数据取平均值并且将所述平均值和存储在所述系统内的存储器内的预定目标值比较。
56.根据权利要求47所述的系统,进一步包括用于累加整个帧的所测量未纠错列偏移的集合的存储器。
57.根据权利要求47所述的系统,进一步包括用于控制电压以补偿暗电流的数模转换电路。
58.根据权利要求47所述的系统,进一步包括用于控制电压以补偿暗电流的电荷泵电路。
59.根据权利要求47所述的系统,进一步包括多个寄存器。
60.根据权利要求47所述的系统,进一步包括命令寄存器,所述命令寄存器用于高级别事件的1比特命令,如芯片复位和其它寄存器的负载。
61.根据权利要求47所述的系统,进一步包括设置在内窥镜内相对于所述手持件的远端部处的成像传感器。
62.根据权利要求47所述的系统,进一步包括设置在所述手持件内的成像传感器。
63.根据权利要求47所述的系统,进一步包括发射器,用于发射通过光纤从所述发射器传输至所述内窥镜的尖端的电磁辐射的脉冲。
64.根据权利要求47所述的系统,进一步包括缆线,所述缆线包括:用于将来自光发射器的电磁辐射传输至内窥镜的光纤以及用于提供从所述控制单元到所述成像传感器的电子通信的导电线。
65.根据权利要求47所述的系统,进一步包括设置在所述控制单元内并且与光发射器和所述成像传感器电通信的控制器。
66.根据权利要求47所述的系统,进一步包括设置在手持件内并且与光发射器和所述成像传感器电通信的成像传感器。
67.根据权利要求47所述的系统,进一步包括与发射器耦接的成像传感器。
68.根据权利要求47所述的系统,进一步包括远程处理算法,以通过使用每个列中的光学黑色像素集合减去所测量的列平均值来纠错列噪声。
69.根据权利要求47所述的系统,进一步包括用于传输像素数据的多个传递端口。
70.根据权利要求47所述的系统,进一步包括多个数字转换器。
71.根据权利要求47所述的系统,进一步包括相对于所述像素阵列的远程定位的数字转换器。
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BR112015001369A2 (pt) | 2017-07-04 |
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