A small, light weight, RISC CPU soft core
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Updated
Oct 15, 2024 - Verilog
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risc-cpu
Here are 8 public repositories matching this topic...
16-bit MIPS Processor from scratch in VHDL
asic
cpu
fpga
mips
processor
vhdl
mips-assembly
risc
hdl
pipeline-processor
soft-core
risc-cpu
custom-cpu
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Jan 24, 2024 - VHDL
14-bit CPU implementation in Logisim. This is a 14-bit RISC CPU logisim implementation. All files are included in this single repository.
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Dec 30, 2021 - C++
A 32-bit single cycle RISC CPU based on Harvard architecture with no cache or pipeline, by having very simple and reduced instruction set it can be used for educational purpose.
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Jun 22, 2022 - Verilog
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