John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

PaddlePaddle High Performance Deep Learning Inference Engine for Mobile and Edge (飞桨高性能深度学习端侧推理引擎）

Digital logic design tool and simulator

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

Build your hardware, easily!

A FPGA friendly 32 bit RISC-V CPU implementation

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Scots Army Knife for electronics

Open source FPGA-based NIC and platform for in-network compute

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Scala based HDL

Must-have verilog systemverilog modules

❄️ Visual editor for open FPGA boards

A modern hardware definition language and toolchain based on Python

HDL libraries and projects

Machine learning on FPGAs using HLS

SERV - The SErial RISC-V CPU