research-article

Accelerating Multimedia with Enhanced Microprocessors

Author:

Ruby B. LeeAuthors Info & Claims

IEEE Micro, Volume 15, Issue 2

Pages 22 - 32

https://doi.org/10.1109/40.372347

Published: 01 April 1995 Publication History

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Abstract

This article defines multimedia, and motivates the use of multimedia benchmarks in the design of general-purpose computers and general-purpose microprocessors. It describes a minimalistic set of multimedia instructions introduced into PA-RISC microprocessors that allow sophisticated SIMD-MIMD parallelism to be implemented, with insignificant changes to the underlying microprocessor. This enabled for the first time, a video decoder implemented in software to attain MPEG video and audio decompression and playback at realtime rates of 30 frames per second, on an entry-level workstation.Unlike previous approaches, no special DSP, coprocessor or functional unit was added to the microprocessor. The multimedia instructions include parallel subword add, subtract, average, shift_left_and_add andshift_right_and_add instructions. Signed, and a novel form of unsigned saturation, is also supported. These general-purpose parallel subword instructions are useful for accelerating a variety of multimedia programs.

References

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1. Computer systems organization
2. Information systems
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Published In

IEEE Micro Volume 15, Issue 2

April 1995

83 pages

ISSN:0272-1732

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IEEE Computer Society Press

Washington, DC, United States

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Published: 01 April 1995

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Jolfaei AWu XMuthukkumarasamy V(2016)On the Security of Permutation-Only Image Encryption SchemesIEEE Transactions on Information Forensics and Security10.1109/TIFS.2015.248917811:2(235-246)Online publication date: 1-Feb-2016
https://dl.acm.org/doi/10.1109/TIFS.2015.2489178
Castrillon JThiele LSchorr LSheng WJuurlink BAlvarez-Mesa MPohl AJessenberger RReyes VLeupers RNebel WAtienza D(2015)Multi/many-core programmingProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition10.5555/2755753.2757208(1708-1717)Online publication date: 9-Mar-2015
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Anderson AMalik AGregg D(2015)Automatic Vectorization of Interleaved Data RevisitedACM Transactions on Architecture and Code Optimization10.1145/283873512:4(1-25)Online publication date: 8-Dec-2015
https://dl.acm.org/doi/10.1145/2838735
Chi Ching Chi Alvarez-Mesa MBross BJuurlink BSchierl T(2015)SIMD Acceleration for HEVC DecodingIEEE Transactions on Circuits and Systems for Video Technology10.1109/TCSVT.2014.236441325:5(841-855)Online publication date: 1-May-2015
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Själander MLarsson-Edefors P(2009)Multiplication acceleration through twin precisionIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200210717:9(1233-1246)Online publication date: 1-Sep-2009
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Elbirt A(2008)Accelerated AES implementations via generalized instruction set extensionsJournal of Computer Security10.5555/1370694.137069516:3(265-288)Online publication date: 1-Aug-2008
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Berekovic MNiggemeier T(2008)A distributed, simultaneously multi-threaded (SMT) processor with clustered scheduling windows for scalable DSP performanceJournal of Signal Processing Systems10.1007/s11265-007-0138-650:2(201-229)Online publication date: 1-Feb-2008
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Bereković MNiggemeier T(2006)A scalable, multi-thread, multi-issue array processor architecture for DSP applications based on extended tomasulo schemeProceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation10.1007/11796435_30(289-298)Online publication date: 17-Jul-2006
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UltraSparc I: A Four-Issue Processor Supporting Multimedia

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