IEEE Micro

This <italic>IEEE Micro</italic> Special Issue on Top Picks includes 12 outstanding papers selected from those published in 2023 computer architecture conferences. When we were prepping and putting together all the articles in this special issue, another ...

It is our pleasure to introduce the <italic>IEEE Micro</italic> Special Issue on Top Picks from the 2023 Computer Architecture Conferences. This special issue includes 12 articles chosen by a selection committee (SC) as being the most significant research ...

The addition of domain-specific hardware accelerators and general-purpose processors that support vector and scalar models makes modern computers undoubtedly heterogeneous. However, existing programming models and runtime systems target using the most ...

Decoupled vector runahead (DVR) exploits massive amounts of memory-level parallelism to improve the performance of applications that feature indirect memory accesses by dynamically inferring loop bounds at runtime, recognizing striding loads, and ...

Understanding what applications spend time on and why is critical for effective performance optimization. Unfortunately, current state-of-the-art performance analysis tools are generally unable to provide this information. The fundamental reason is that ...

The lack of publicly available cloud services has been a recurring problem in architecture and systems. Although open source benchmarks exist, they do not capture the complexity of cloud services. Application cloning is a promising approach, however, ...

The unabating growth of the memory needs of emerging data center applications has exacerbated the scalability bottleneck of virtual memory. However, reducing the overhead of address translation will remain onerous until the physical memory contiguity ...

This article introduces mosaic pages, which increase translation lookaside buffer (TLB) reach by compressing multiple, discrete translations into one TLB entry. Mosaic leverages virtual contiguity for locality, but does not use physical contiguity. Mosaic ...

Memory isolation is a critical property for system reliability, security, and safety. We demonstrate RowPress, a dynamic random-access memory (DRAM) read disturbance phenomenon different from the well-known RowHammer. RowPress induces bitflips by keeping ...

Hardware-assisted fault isolation (HFI) is a minimal extension to current processors that supports secure, flexible, and efficient in-process isolation. HFI addresses the limitations of existing software-based fault isolation (SFI) systems, including ...

Although online reinforcement learning (RL) has shown promise for microarchitecture decision making, processor vendors are still reluctant to adopt it. There are two main reasons that make RL-based solutions unattractive. First, they have high complexity ...

Although smell is arguably the most visceral of senses, olfactory computing has been barely explored in the mainstream. We argue that this is a good time to explore olfactory computing as driver applications are emerging, sensors are dramatically better, ...

To meet the increasingly demanding compute requirements of modern workloads, systems on chip (SoCs) must provide an accelerator-rich hardware architecture and software programming interface. However, scalability remains a first-order concern, as ...

SCALO is the first distributed brain–computer interface (BCI) consisting of multiple wireless-networked implants placed on different brain regions. SCALO unlocks new treatment options for debilitating neurological disorders and new research into brainwide ...

In previous parts of this series, I analyzed.

In its earliest prototypes, GitHub CoPilot stood apart from other tools. It demonstrated a remarkable ability to accelerate the work of intermediate coders by 20% to 40%, mainly with standardized languages like Python. This is a significant productivity ...