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ISLPED 2009: San Fancisco, CA, USA
- Jörg Henkel, Ali Keshavarzi, Naehyuck Chang, Tahir Ghani:
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009. ACM 2009, ISBN 978-1-60558-684-7
Keynote address 1
- Percy V. Gilbert:
Advances in process technology & IBM collaborative ecosystem for leadership power performance SOC designs. 1-2
Sub-threshold circuits
- David Bol, Dina Kamel, Denis Flandre
, Jean-Didier Legat:
Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic. 3-8 - Vita Pi-Ho Hu
Design and analysis of ultra-thin-body SOI based subthreshold SRAM. 9-14 - Jeremy R. Tolbert, Xin Zhao, Sung Kyu Lim
Slew-aware clock tree design for reliable subthreshold circuits. 15-20 - David Bol, Denis Flandre
Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits. 21-26 - Sudhanshu Khanna, Benton H. Calhoun:
Serial sub-threshold circuits for ultra-low-power systems. 27-32
Managing process variability
- Domenik Helms, Kai Hylla, Wolfgang Nebel:
Hybrid logical-statistical simulation with thermal and IR-drop mapping for degradation and variation prediction. 33-38 - Xiaoming Chen, Yu Wang
Variation-aware supply voltage assignment for minimizing circuit degradation and leakage. 39-44 - Amlan Ghosh, Rahul M. Rao, Richard B. Brown:
A centralized supply voltage and local body bias-based compensation approach to mitigate within-die process variation. 45-50 - Koichi Hamamoto, Masanori Hashimoto
Tuning-friendly body bias clustering for compensating random variability in subthreshold circuits. 51-56 - Michael J. Anderson, Azadeh Davoodi, Jungseob Lee, Abhishek A. Sinkar, Nam Sung Kim:
Statistical static timing analysis considering leakage variability in power gated designs. 57-62
Energy-efficient analog subsystems
- Jiwei Fan, Xin Zhou, Liyu Yang, Alex Chien-Lin Huang:
A low power high noise immunity boost DC-DC converter using the differential difference amplifiers. 63-68 - Hui Shao, Chi-Ying Tsui
A single inductor dual input dual output DC-DC converter with hybrid supplies for solar energy harvesting applications. 69-74 - Hussain A. Alzaher, Noman Tasadduq:
A CMOS low power current-mode polyphase filter. 75-80 - P. V. Ratna Kumar, Kaushik Bhattacharyya, Tamal Das, Pradip Mandal:
Improvement of power efficiency in switched capacitor DC-DC converter by shoot-through current elimination. 81-86 - Tadashi Yasufuku, Koichi Ishida, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai, Ken Takeuchi:
Inductor design of 20-V boost converter for low power 3D solid state drive with NAND flash memories. 87-92
Dynamic thermal management
- Chung-Hsiang Lin, Chia-Lin Yang
PPT: joint performance/power/thermal management of DRAM memory for multi-core systems. 93-98 - Raid Zuhair Ayoub, Tajana Simunic Rosing:
Predict and act: dynamic thermal management for multi-core processors. 99-104 - Thidapat Chantem, Xiaobo Sharon Hu
Online work maximization under a peak temperature constraint. 105-110 - Pedro Chaparro, José González, Qiong Cai, Greg Chrysler:
Dynamic thermal management using thin-film thermoelectric cooling. 111-116
Design contest
- Steven C. Jocke, Jonathan F. Bolus, Stuart N. Wooters, Travis N. Blalock, Benton H. Calhoun:
A 2.6 µW sub-threshold mixed-signal ECG SoC. 117-118 - Ki Chul Chun, Pulkit Jain, Chris H. Kim:
A 0.9V, 65nm logic-compatible embedded DRAM with > 1ms data retention time and 53% less static power than a power-gated SRAM. 119-120
Power optimization
- Nam Sung Kim, Jun Seomun, Abhishek A. Sinkar, Jungseob Lee, Tae Hee Han
Frequency and yield optimization using power gates in power-constrained designs. 121-126 - Andrea Calimera
NBTI-aware power gating for concurrent leakage and aging optimization. 127-132 - Matthew M. Ziegler, Victor V. Zyuban, George Gristede, Milena Vratonjic, Joshua Friedrich:
The opportunity cost of low power design: a case study in circuit tuning. 133-138 - Jason Cong, Bin Liu, Zhiru Zhang
Behavior-level observability don't-cares and application to low-power behavioral synthesis. 139-144
Special session 1: green data centers
- Ehsan Pakbaznia, Massoud Pedram:
Minimizing data center cooling and server power costs. 145-150 - Thomas F. Wenisch:
Thinking outside the box: power management at the system level & beyond. 151-152 - John B. Carter:
A look inside IBM's green data center research. 153-154 - Cullen E. Bash:
Sustainable IT ecosystems and data centers. 155-156
Keynote address 2
- Kevin Zhang:
Circuit design in nano-scale CMOS era: opportunities & challenges. 157-158
Micro-architecture techniques
- Jianwei Dai, Lei Wang:
Way-tagged cache: an energy-efficient L2 cache architecture under write-through policy. 159-164 - Mrinmoy Ghosh, Emre Özer, Simon Ford, Stuart Biles
Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches. 165-170 - Hui Zeng, Ju-Young Jung, Kanad Ghose, Dmitry Ponomarev:
Energy-efficient renaming with register versioning. 171-176 - Noriko Takagi, Hiroshi Sasaki, Masaaki Kondo, Hiroshi Nakamura
Cooperative shared resource access control for low-power chip multiprocessors. 177-182 - Hui Zeng, Matt T. Yourst, Kanad Ghose:
An energy-efficient checkpointing mechanism for out of order commit processor. 183-188
Variation-aware and adaptive power management
- Abhishek A. Sinkar, Nam Sung Kim:
Analyzing potential power reduction with adaptive voltage positioning optimized for multicore processors. 189-194 - Debabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy:
Significance driven computation: a voltage-scalable, variation-aware, quality-tuning motion estimator. 195-200 - Jungseob Lee, Nam Sung Kim:
Optimizing total power of many-core processors considering voltage scaling limit and process variations. 201-206 - Alyssa Bonnoit, Sebastian Herbert, Diana Marculescu
Integrating dynamic voltage/frequency scaling and adaptive body biasing using test-time voltage selection. 207-212
Digital low-power potpourri
- Mackenzie R. Scott, Rajeevan Amirtharajah
Pulse width modulation for reduced peak power full-swing on-chip interconnect. 213-218 - Daeyeon Kim, Yoonmyung Lee
Low power circuit design based on heterojunction tunneling transistors (HETTs). 219-224 - Fady Abouzeid
A 45nm CMOS 0.35v-optimized standard cell library for ultra-low power applications. 225-230 - Thorlindur Thorolfsson, Nariman Moezzi Madani, Paul D. Franzon
A low power 3D integrated FFT engine using hypercube memory division. 231-236 - Wei Xu, Jibang Liu, Tong Zhang:
Data manipulation techniques to reduce phase change memory write energy. 237-242
Energy-aware client-server computing
- Gaurav Dhiman, Giacomo Marchetti, Tajana Rosing:
vGreen: a system for energy efficient computing in virtualized environments. 243-248 - Sushu Zhang, Karam S. Chatha, Goran Konjevod
Near optimal battery-aware energy management. 249-254 - Xia Zhao, Yao Guo
Transaction-based adaptive dynamic voltage scaling for interactive applications. 255-260 - Justin Meza, Mehul A. Shah, Parthasarathy Ranganathan, Mike Fitzner, Judson Veazey:
Tracking the power in an enterprise decision support system. 261-266 - Karthik Kumar, Yamini Nimmagadda, Yung-Hsiang Lu:
Ranking servers based on energy savings for computation offloading. 267-272
Special session 2: green computing
- Kiyoo Itoh:
Leakage- and variability-conscious circuit designs for the 0.5-v nanoscale CMOS era. 273-274 - Al Fazio:
Non volatile memories to enable system power scaling. 275-276 - Suman Datta:
Low voltage tunnel transistor architecture and its viability for energy efficient logic applications. 277-278
Poster session
- Flavio Carbognani, Luca Henzen:
Cross-over current suppressing latch compared to state-of-the-art for low-power low-frequency applications with resonant clocking. 279-282 - Sherief Reda, Aung Si, R. Iris Bahar
Reducing the leakage and timing variability of 2D ICcs using 3D ICs. 283-286 - Ge Chen, Saeid Nooshabadi, Steven G. Duvall:
An optimization strategy for low energy and high performance for the on-chip interconnect signalling. 287-290 - Zheng Li, Jie Wu, Li Shang, Alan Rolf Mickelson, Manish Vachharajani, Dejan Filipovic
A high-performance low-power nanophotonic on-chip network. 291-294 - Guangyu Sun, Xiaoxia Wu, Yuan Xie:
Exploration of 3D stacked L2 cache design for high performance and efficient thermal control. 295-298 - Shu-Yi Wong, Chunhong Chen, Q. M. Jonathan Wu:
Power-management-based Chien search for low power BCH decoder. 299-302 - Veera Papirla, Aarul Jain, Chaitali Chakrabarti:
Low power robust signal processing. 303-306 - Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke:
Enabling ultra low voltage system operation by tolerating on-chip cache failures. 307-310 - Jiana Lou, Xiaobo Wu:
Design of multi-mode 4-switch buck-boost controller. 311-314 - Aida Todri
Electromigration study of power-gated grids. 315-318 - Dominic Maurath, Charalambos M. Andreou, Yiannos Manoli:
A novel 0.5 V 15 µW 1.3 MHz temperature-compensated analog PWM-controller for switch-mode converters. 323-326 - Joseph Nayfach-Battilana, Jose Renau:
SOI, interconnect, package, and mainboard thermal characterization. 327-330 - Yousra Alkabani, Farinaz Koushanfar
N-version temperature-aware scheduling and binding. 331-334 - Seungrok Jung, Jungsoo Kim, Sangkwon Na, Chong-Min Kyung:
Energy-aware instruction-set customization for real-time embedded multiprocessor systems. 335-338 - Mian Dong, Yung-Seok Kevin Choi, Lin Zhong:
Power-saving color transformation of mobile graphical user interfaces on OLED-based displays. 339-342 - Jongmin Lee, Soontae Kim:
An energy-delay efficient 2-level data cache architecture for embedded system. 343-346 - Se Hun Kim, Saibal Mukhopadhyay, Wayne H. Wolf:
Experimental analysis of sequence dependence on energy saving for error tolerant image processing. 347-350 - Yuwen Sun, Shimeng Huang, Joseph Oresko, John Krais
A programmable implementation of neural signal processing on a smartdust for brain-computer interfaces. 351-354 - Sonali Chouhan, M. Balakrishnan, Ranjan Bose:
An experimental validation of system level design space exploration methodology for energy efficient sensor nodes. 355-358
Panel
- Soheil Modirzadeh, Brian Fuller, Sandeep Mirchandani, Jon McDonald, Ran Avinun, Camille Kokozaki:
It is all about power analysis, exploration and trade-offs. 359-360
Keynote address 3
- Mojy Chian:
Challenges and opportunities in low-power design enablement. 361-362
Keynote address 4
- Yankin Tanurhan:
Dealing with disaggregation in ever-changing world of semiconductors. 363-364
Low-power platforms and circuits
- Joo-Young Kim, Seungjin Lee, Jinwook Oh, Minsu Kim, Hoi-Jun Yoo:
A 60fps 496mW multi-object recognition processor with workload-aware dynamic power management. 365-370 - Michael J. Lyons, David M. Brooks:
The design of a bloom filter hardware accelerator for ultra low power systems. 371-376 - Anita Lungu, Pradip Bose, Alper Buyuktosunoglu, Daniel J. Sorin:
Dynamic power gating with quality guarantees. 377-382 - Madhu Saravana Sibi Govindan, Stephen W. Keckler, Doug Burger:
End-to-end validation of architectural power models. 383-388 - Satendra Kumar Maurya, Lawrence T. Clark:
Low power fast and dense longest prefix match content addressable memory for IP routers. 389-394 - Guihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li:
MicroFix: exploiting path-grained timing adaptability for improving power-performance efficiency. 395-400
Energy-efficient wireless systems
- Hang Yu, Lin Zhong, Ashutosh Sabharwal:
Adaptive RF chain management for energy-efficient spatial-multiplexing MIMO transmission. 401-406 - Jinsik Kim, Pai H. Chou:
Remote progressive firmware update for flash-based networked embedded systems. 407-412 - Clemens Moser, Jian-Jia Chen
Power management in energy harvesting embedded systems with discrete service levels. 413-418 - Zainul Charbiwala, Younghun Kim, Sadaf Zahedi, Jonathan Friedman, Mani B. Srivastava:
Energy efficient sampling for event detection in wireless sensor networks. 419-424
Embedded tutorial 1
- Kaushik Roy:
Ultra low voltage CMOS. 425-426
Embedded tutorial 2
- Norman P. Jouppi, Yuan Xie:
Emerging technologies and their impact on system design. 427-428
Embedded tutorial 3
- Suman Datta, Vijaykrishnan Narayanan:
Green transistors to green architectures. 429-430
Embedded tutorial 4
- Vijay Raghunathan:
Green at the micro-scale: towards self-powered embedded systems. 431-432
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