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Green transistors to green architectures

Published: 19 August 2009 Publication History

Abstract

This talk will highlight different generations of energy-efficient device architectures that enable aggressive supply voltage reduction. First, we will discuss the impact of the introduction of a new gate stack with high-K dielectrics and the use of multigate control structures. Next, we will show that incorporation of ultra-high mobility compound (III-V) semiconductors along with corresponding changes in the device channel structure enables supply voltage reduction to below 500mV. Further reduction in the supply voltage to below 250mV range can be achieved through abrupt turn-on exploiting the phenomena of inter-band tunneling in novel vertical transistor architectures. The second part of this talk will focus on new challenges and opportunities in designing circuits and architectures using these emerging device architectures

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  1. Green transistors to green architectures

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    cover image ACM Conferences
    ISLPED '09: Proceedings of the 2009 ACM/IEEE international symposium on Low power electronics and design
    August 2009
    452 pages
    ISBN:9781605586847
    DOI:10.1145/1594233

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 19 August 2009

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    1. design
    2. performance
    3. transistor

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    ISLPED '09 Paper Acceptance Rate 72 of 208 submissions, 35%;
    Overall Acceptance Rate 398 of 1,159 submissions, 34%

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