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8. IDT 2013: Marrakesh, Morocco
- 8th International Design and Test Symposium, IDT 2013, Marrakesh, Morocco, 16-18 December, 2013. IEEE 2013
- Carlos Ivan Castro Marquez, Marius Strum, Jiang Chau Wang
:
Functional verification of complete sequential behaviors: A formal treatment of discrepancies between system-level and RTL descriptions. 1-6 - Abdelhay Haqiq
Verification of multi decisional reactive agent using SMV model checker. 1-6 - Marco Desogus, Matteo Sonza Reorda
Validation and robustness assessment of an automotive system. 1-6 - Sayed Taha Muhammad, Magdy A. El-Moursy, Ali A. El-Moursy, Amr M. Refaat:
Traffic-based virtual channel activation for low-power NoC. 1-6 - Hemanta Kumar Mondal
Energy efficient on-chip wireless interconnects with sleepy transceivers. 1-6 - Rabab Ezz-Eldin, Magdy A. El-Moursy, Hesham F. A. Hamed:
High throughput asynchronous NoC switch for high process variation. 1-4 - Hamid Mushtaq, Zaid Al-Ars, Koen Bertels:
Accurate and efficient identification of worst-case execution time for multicore processors: A survey. 1-6 - Hakim Zimouche, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre:
A BIST method for TSVs pre-bond test. 1-6 - Stelios Neophytou
On the impact of fault list partitioning in parallel implementations for dynamic test compaction considering multicore systems. 1-6 - Khaled Khalifa, Haytham Fawzy, Sameh El-Ashry, Khaled Salah:
Memory controller architectures: A comparative study. 1-6 - Mathias Soeken, Rolf Drechsler
Grammar-based program generation based on model finding. 1-5 - Rameez Asif
Evaluation of the angle of arrival based techniques. 1-3 - Kelvin O. O. Anoh, E. Elkazmi, R. A. Abd-Alhameed, O. Madubuko, Mohammed S. Bin-Melha, Steve M. R. Jones, T. Ghazaany:
Improved multi-antenna system capacity using beamformer weights. 1-4 - F. I. Onah, M. O. Ezeja, Cosmas I. Ani:
Resource reservation technique for handover calls using integrated modeling technique. 1-6 - A. Atojoko, Mohammed S. Bin-Melha, E. Elkazmi, Muhammad Usman
Liquid level monitoring using passive RFID tags. 1-5 - Rameez Asif
Performance evaluation of ZF and MMSE equalizers for wavelets V-Blast. 1-4 - Zheng Wang, Renlin Li, Anupam Chattopadhyay:
Opportunistic redundancy for improving reliability of embedded processors. 1-6 - Ibrahim Mezzah
Assertion based on-line fault detection applied on UHF RFID tag. 1-5 - Davide Sabena, Matteo Sonza Reorda
On the evaluation of soft-errors detection techniques for GPGPUs. 1-6 - Abdellah Benali, Mohsine Bouya
Through glass via thermomechanical analysis: Geometrical parameters effect on thermal stress. 1-5 - Innocent Agbo, Seyab Khan, Said Hamdioui:
BTI impact on SRAM sense amplifier. 1-6 - Ludovico Orlando Russo, Giuseppe Airo Farulla, Marco Indaco, Stefano Rosa
Blurring prediction in monocular SLAM. 1-6 - Khaled Salah
A TSV-based architecture for AC-DC converters. 1-4 - Hassen Aziza, Marc Bocquet, Mathieu Moreau
Single-ended sense amplifier robustness evaluation for OxRRAM technology. 1-5 - Udo Schwalke, Frank Wessely, Tillmann Krauss:
Simulation and experimental verification: Dopant-free Si-nanowire CMOS technology on silicon-on-insulator material. 1-6 - Hasan Saeed Mir
On the design of a high-performance digital radar system. 1-6 - Jose Pedro Cardoso, José Machado da Silva
Design tradeoffs for voltage controlled crystal oscillators with built-in calibration mechanisms. 1-6 - Ibrahim Abdelghany, Wajeb Saab
Energy-efficient truncated multipliers with scaling. 1-6 - Khaled Salah
Performance comparison between air-gap based coaxial TSV and conventional circular TSV in 3D-ICs. 1-3 - Sohaib Majzoub
Reducing random-dopant fluctuation impact on core-speed and power variability in many-core platforms. 1-6 - Amin Zafarian, Iraj Kalali Fard, Abbas Golmakani, Jalil Shirazi
A 0.4V 790μw CMOS low noise amplifier in sub-threshold region at 1.5GHz. 1-6 - Baker Mohammad
Automated flow for generating CMOS custom memory bit map between logical and physical implementation. 1-6 - Waleed El-Halwagy, Mohamed Dessouky, Hassan El-Ghitani:
Analysis and design of analog-based voltage controlled oscillator linearization technique. 1-6 - Hamid Mushtaq, Zaid Al-Ars, Koen Bertels:
Fault tolerance on multicore processors using deterministic multithreading. 1-6 - Sezer Gören
Enabling difference-based dynamic partial self reconfiguration for large differences. 1-6 - Shahzad Ahmad Butt, Luciano Lavagno:
Design space exploration and synthesis for digital signal processing algorithms from Simulink models. 1-6 - Kasem Khalil
A low propagation delay dispersion comparator for low cost level-crossing ADCs. 1-5 - Omar Samir, Moustafa Kassem, Mohammed Sameh, Sarah Aly, Mohamed R. M. Rizk
A novel approach for functional verification of memory protocol standard. 1-3 - Ghada H. Ibrahim, Amr N. Hafez, Ahmed Hussien Khalil:
A simple digital detection scheme for demodulating QPSK signals in super-regenerative receiver architecture. 1-4 - Saloni, Manish Goswami, B. R. Singh:
A 5-bit 1.5 GS/s ADC using reduced comparator architecture. 1-3 - Surajit Kumar Roy, Chandan Giri
Optimizing test architecture of 3D stacked ICs for partial stack/complete stack using hard SoCs. 1-3 - Surajit Kumar Roy, Joy Sankar Sengupta, Chandan Giri
Power constraints test scheduling of 3D stacked ICs. 1-6 - Ali Siblini, Elias Baaklini, Hassan Sbeity, Ahmad Fadlallah
Efficient FPGA implementation of H.264 CAVLC entropy decoder. 1-3 - Kamalika Datta, Indranil Sengupta, Hafizur Rahaman
An evolutionary approach to reversible logic synthesis using output permutation. 1-6 - A. Bengueddach, B. Senouci, Smaïl Niar, Bouziane Beldjilali:
Energy consumption in reconfigurable mpsoc architecture: Two-level caches optimization oriented approach. 1-6 - Hani H. Saleh
The optimum Booth radix for low power integer multipliers. 1-4 - Paolo Bernardi
A functional test algorithm for the register forwarding and pipeline interlocking unit in pipelined microprocessors. 1-6 - Montassar Ben Saad, Ahmed Jedidi
Compilation optimization exploration for thermal dissipation reduction in embedded systems. 1-3 - Ahmed Nassar, Fadi J. Kurdahi
Architectural support for runtime verification on ccNUMA multiprocessors. 1-6 - Jaber Hassan J. Al Yamani, Farid Boussaïd
Experimental evaluation of latency coding for gas recognition. 1-4 - Seyab Khan, Mottaqiallah Taouil, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor:
Impact of partial resistive defects and Bias Temperature Instability on SRAM decoder reliablity. 1-6 - Mehdi Neggazi, Latifa Hamami, Abbes Amira:
A multi-scale analysis and compressive sensing based energy aware fall detection system. 1-3 - Ehab S. Awad, Theodora Rezk, Ahmed Abou-Auf:
Silicon CMOS interdigitated-MSM photodetector and self-mixer for low-cost crash-avoidance Ladar system. 1-3 - Stefano Di Carlo
SAFE: A self adaptive frame enhancer FPGA-based IP-core for real-time space applications. 1-6 - Stefano Di Carlo
ZipStream: Improving dependability in dynamic partial reconfiguration. 1-6 - Fouad Sahraoui, Fakhreddine Ghaffari, Mohamed El Amine Benkhelifa, Bertrand Granado:
An efficient BER-based reliability method for SRAM-based FPGA. 1-6 - Basant K. Mohanty
Systolic architecture for hardware implementation of two-dimensional non-separable filter-bank. 1-6 - Quang-Hai Khuat, Quang-Hoa Le, Daniel Chillet
Spatio-temporal scheduling for 3D reconfigurable & multiprocessor architecture. 1-6 - Mottaqiallah Taouil, Mihai Lefter, Said Hamdioui:
Exploring test opportunities for memory and interconnects in 3D ICs. 1-6 - Pranab Roy, Mahua Raha Patra, Hafizur Rahaman
Novel designs of digital detection analyzer for intelligent detection and analysis in digital microfluidic biochips. 1-6 - Omar Hammami, Xinyu Li:
NOCBENCH: NOC synthesis benchmarks. 1-5 - Omar Hammami:
NOC synthesis vs ITRS predictions: The challenges of linear programming based synthesis. 1-3 - Rameez Asif
Performance of different wavelet families using DWT and DWPT-channel equalization using ZF and MMSE. 1-6 - Ogbonnaya O. Anoh, R. A. Abd-Alhameed, Steve M. R. Jones, Jim M. Noras, Yousif A. Dama
Comparison of orthogonal and biorthogonal wavelets for multicarrier systems. 1-4 - Huthaifa A. Obeidat
Indoor localization using received signal strength. 1-6 - Omar Hammami, Xinyu Li:
NOC based MPSOC directory based cache coherency with OCP-IP protocol. 1-3 - Nadjia Anane, Mohamed Anane:
FPGA implementation of the m-ary modular exponentiation. 1-2 - Yasmin Halawani, Baker Mohammad
Memristor for energy efficient wireless sensor node. 1-2 - Hamad Marzouqi, Mahmoud Al-Qutayri
RSD based Karatsuba multiplier for ECC processors. 1-2 - Omar Abdelmalek, David Hély
An UHF RFID emulation platform with fault injection and real time monitoring capabilities. 1-2 - Ioannis Voyiatzis, Costas Efstathiou, Cleo Sgouropoulou
Transparent testing for intra-word memory faults. 1-2 - Christopher Preschern, Nermin Kajtazovic, Andrea Höller, Christian Steger, Christian Kreiner:
Verifying generic IEC 61508 CPU self-tests with fault injection. 1-2 - Hani H. Saleh
Universal fused floating-point dot-product unit (UFDP). 1-2 - Ioannis Voyiatzis, Stelios Neophytou
Test set embedding into accumulator-generated sequences targeting hard-to-detect faults. 1-2 - Mohamed Anane, Nadjia Anane:
High radix montgomery modular multiplication on FPGA. 1-2
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