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ACM Great Lakes Symposium on VLSI 2018: Chicago, IL, USA
- Deming Chen, Houman Homayoun, Baris Taskin:
Proceedings of the 2018 on Great Lakes Symposium on VLSI, GLSVLSI 2018, Chicago, IL, USA, May 23-25, 2018. ACM 2018
Keynote & Invited Talks
- Wade Shen:
DARPA's Data Driven Discovery of Models (D3M) and Software Defined Hardware (SDH) Programs. 1 - Nikil D. Dutt
:
Self-Awareness for Heterogeneous MPSoCs: A Case Study using Adaptive, Reflective Middleware. 3 - Matthew J. Casto:
Hardware Assurance: Trojans, Counterfeits, and Security in an Interconnected World. 5 - Xiaobo Sharon Hu:
A Cross-Layer Perspective for Energy Efficient Processing: - From beyond-CMOS Devices to Deep Learning. 7
Session 1: Emerging Computing, and Post-CMOS Technologies
- Arman Roohi, Ramtin Zand
Logic-Encrypted Synthesis for Energy-Harvesting-Powered Spintronic-Embedded Datapath Design. 9-14 - Ramtin Zand
Low-Energy Deep Belief Networks Using Intrinsic Sigmoidal Spintronic-based Probabilistic Neurons. 15-20 - Pai-Shun Ting, John P. Hayes:
Maxflow: Minimizing Latency in Hybrid Stochastic-Binary Systems. 21-26 - Kaship Sheikh, Lan Wei:
Methodology to Capture Statistical Effect of Process Imperfections on Glitch Suppression in CNFET Circuits and to Improve by Using Approximate Circuits. 27-32 - Ramin Rezaeizadeh Rookerd, Somayeh Sadeghi Kohan, Zainalabedin Navabi:
Performance and Energy Enhancement through an Online Single/Multi Level Mode Switching Cache Architecture. 33-38
Session 2: Secure Design of Multi-Core and Cryptographic Systems
- Johanna Sepúlveda, Felix Wilgerodt, Michael Pehl:
SEPUFSoC: Using PUFs for Memory Integrity and Authentication in Multi-Processors System-on-Chip. 39-44 - Sadia Moriam, Elke Franz, Paul Walther, Akash Kumar, Thorsten Strufe, Gerhard P. Fettweis:
Protecting Communication in Many-Core Systems against Active Attackers. 45-50 - Kyle Loyka, He Zhou, Sunil P. Khatri:
A Homomorphic Encryption Scheme Based on Affine Transforms. 51-56 - Qutaiba Alasad, Jiann-Shiun Yuan, Jie Lin
Resilient AES Against Side-Channel Attack Using All-Spin Logic. 57-62
Session 3: Interconnects and Manycore Management
- Mahdi Nikdast, Gabriela Nicolescu, Jelena Trajkovic
DeEPeR: Enhancing Performance and Reliability in Chip-Scale Optical Interconnection Networks. 63-68 - Tanmay Shinde, Suryanarayanan Subramaniam, Padmanabh Deshmukh, M. Meraj Ahmed, Mark A. Indovina, Amlan Ganguly:
A 0.24pJ/bit, 16Gbps OOK Transmitter Circuit in 45-nm CMOS for Inter and Intra-Chip Wireless Interconnects. 69-74 - Mohamad Hammam Alsafrjalani, Tosiron Adegbija:
TaSaT: Thermal-Aware Scheduling and Tuning Algorithm for Heterogeneous and Configurable Embedded Systems. 75-80 - Mahdi Tala
Interfacing 3D-stacked Electronic and Optical NoCs with Mixed CMOS-ECL Bridges: a Realistic Preliminary Assessment. 81-86
Session 4: Low Power Variation Aware Circuit Design
- Konstantinos Maragos, George Lentaris, Ioannis Stratakos, Dimitrios Soudris
A Framework Exploiting Process Variability to Improve Energy Efficiency in FPGA Applications. 87-92 - Sneh Saurabh
Assessing the Impact of Temperature and Supply Voltage Variations in Near-threshold Circuits using an Analytical Model. 93-98 - Merritt Miller, Carrie Segal, David McCarthy, Aditya Dalakoti, Prashansa Mukim, Forrest Brewer
Impolite High Speed Interfaces with Asynchronous Pulse Logic. 99-104 - Wentao Dai, Peiye Liu, Weiwei Shan:
Short-path Padding Method for Timing Error Resilient Circuits based on Transmission Gates Insertion. 105-110
Session 5: The World of Neural Networks
- Amir Erfan Eshratifar, Massoud Pedram:
Energy and Performance Efficient Computation Offloading for Deep Neural Networks in a Mobile Cloud Computing Environment. 111-116 - Ayush Mittal, Saideep Tiku
Adapting Convolutional Neural Networks for Indoor Localization with Smart Mobile Devices. 117-122 - Chuanhao Zhuge, Xinheng Liu, Xiaofan Zhang, Sudeep Gummadi, Jinjun Xiong
Face Recognition with Hybrid Efficient Convolution Algorithms on FPGAs. 123-128 - Colin Shea, Adam Page, Tinoosh Mohsenin:
SCALENet: A SCalable Low power AccELerator for Real-time Embedded Deep Neural Networks. 129-134
Session 6: New Solutions for Classic IP Protection Challenges
- Suyuan Chen, Ranga Vemuri
Improving the Security of Split Manufacturing Using a Novel BEOL Signal Selection Method. 135-140 - Tian Wang, Xiaoxin Cui, Dunshan Yu, Omid Aramoon, Timothy Dunlap, Gang Qu, Xiaole Cui:
A Novel Polymorphic Gate Based Circuit Fingerprinting Technique. 141-146 - Kaveh Shamsi, Meng Li, David Z. Pan, Yier Jin
Cross-Lock: Dense Layout-Level Interconnect Locking using Cross-bar Architectures. 147-152 - Shervin Roshanisefat, Hadi Mardani Kamali, Avesta Sasan:
SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware. 153-158
Session 7: Machine Learning and HW Accelerators
- Sandeep Rasoori, Venkatesh Akella:
Scalable Hardware Accelerator for Mini-Batch Gradient Descent. 159-164 - Lahir Marni, Morteza Hosseini, Tinoosh Mohsenin:
MC3A: Markov Chain Monte Carlo ManyCore Accelerator. 165-170 - Chunhua Xiao, Yuhua Xie, Lei Zhang
AEAS - Towards High Energy-efficiency Design for OpenSSL Encryption Acceleration through HW/SW Co-design. 171-176 - Qian Wang, Mingze Gao, Gang Qu:
A Machine Learning Attack Resistant Dual-mode PUF. 177-182
Session 8: Scalable Simulation: Parallel and Approximate Computing
- Chun-Xun Lin, Tsung-Wei Huang, Ting Yu, Martin D. F. Wong
A Distributed Power Grid Analysis Framework from Sequential Stream Graph. 183-188 - Mingye Song, Zhezhao Xu, Wei Xue, Wenjian Yu:
A Distributed Parallel Random Walk Algorithm for Large-Scale Capacitance Extraction and Simulation. 189-194 - Justine Bonnot, Karol Desnos, Maxime Pelcat, Daniel Ménard:
A Fast and Fuzzy Functional Simulator of Inexact Arithmetic Operators for Approximate Computing Systems. 195-200 - Yukai Chen
Battery-aware Design Exploration of Scheduling Policies for Multi-sensor Devices. 201-206
Session 9: Test and Fault Tolerance
- Fanchao Wang, Hanbin Zhu, Pranjay Popli, Yao Xiao, Paul Bogdan, Shahin Nazarian:
Accelerating Coverage Directed Test Generation for Functional Verification: A Neural Network-based Framework. 207-212 - Hadi Ahmadi Balef, Hamed Fatemi, Kees Goossens, José Pineda de Gyvez:
Effective In-Situ Chip Health Monitoring with Selective Monitor Insertion Along Timing Paths. 213-218 - Abhishek Das, Nur A. Touba:
Low Complexity Burst Error Correcting Codes to Correct MBUs in SRAMs. 219-224 - Yejia Di, Liang Shi, Congming Gao, Qiao Li
Loss is Gain: Shortening Data for Lifetime Improvement on Low-Cost ECC Enabled Consumer-Level Flash Memory. 225-230 - Wei Liu, Zhigang Wei, Wei Du:
A Novel Fault-Tolerant Last-Level Cache to Improve Reliability at Near-Threshold Voltage. 231-236
Session 10: Memory Architectures
- Suhit Pai, Newton Singh
AB-Aware: Application Behavior Aware Management of Shared Last Level Caches. 237-242 - Palash Das, Hemangee K. Kapoor:
Towards Near-Data Processing of Compare Operations in 3D-Stacked Memory. 243-248 - Ashwini A. Kulkarni
Utility Aware Snoozy Caches for Energy Efficient Chip Multi-Processors. 249-254 - Myungsuk Kim, Youngsun Song, Myoungsoo Jung, Jihong Kim:
SARO: A State-Aware Reliability Optimization Technique for High Density NAND Flash Memory. 255-260
Session 11: Modern Routing: from Timing, Reliability to Machine Learning
- Peishan Tu, Chak-Wa Pui, Evangeline F. Y. Young:
Simultaneous Timing Driven Tree Surgery in Routing with Machine Learning-based Acceleration. 261-266 - Xiaotao Jia, Jing Wang, Yici Cai, Qiang Zhou:
Electromigration Design Rule aware Global and Detailed Routing Algorithm. 267-272 - Jackson Melchert, Boyu Zhang, Azadeh Davoodi:
A Comparative Study of Local Net Modeling Using Machine Learning. 273-278 - Kiwon Yoon, Daijoon Hyun, Youngsoo Shin:
Fast Timing Analysis of Non-Tree Clock Network with Shorted Wires. 279-284
Special Session 1: Powering Heterogeneous IoT Systems: Design for Efficiency, Security and Sustainability
- Longfei Wang, Selçuk Köse
Reliable On-Chip Voltage Regulation for Sustainable and Compact IoT and Heterogeneous Computing Systems. 285-290 - Sandhya Koteshwara, Keshab K. Parhi
Low-Energy Architectures of Linear Classifiers for IoT Applications using Incremental Precision and Multi-Level Classification. 291-296 - Sudip K. Mazumder:
Towards A Universal Power Manager for Multi-Source Energy Scavenging and Storage. 297-298 - Inna Partin-Vaisband:
Efficient Wireless Power Transfer for Heterogeneous Adaptive IoT Systems. 299-304
Special Session 2: Emergence of Silicon Photonics in High-Performance Computing: How can the VLSI Community Contribute
- Meisam Bahadori, Keren Bergman:
Low-Power Optical Interconnects based on Resonant Silicon Photonic Devices: Recent Advances and Challenges. 305-310 - Davide Bertozzi, Marco Gavanelli
Wavelength-Routed Optical Networks-on-Chip: Design Methods and Tools to Bridge the Gap Between Logic Topologies and Physical Ones in 3D Architectures. 311-316 - Sudeep Pasricha, Sai Vineel Reddy Chittamuru
Cross-Layer Thermal Reliability Management in Silicon Photonic Networks-on-Chip. 317-322 - Felipe Gohring de Magalhaes, Mahdi Nikdast, Yule Xiong, Fabiano Hessel, Odile Liboiron-Ladouceur
Silicon Photonic Interconnects: Minimizing the Controller Latency. 323-328
Special Session 3: Circuits and Systems for Autonomous IoT Devices
- Emre Salman, Milutin Stanacevic, Samir Ranjan Das, Petar M. Djuric
Leveraging RF Power for Intelligent Tag Networks. 329-334 - Kenji Aono, Hassene Hasni, Owen Pochettino, Nizar Lajnef, Shantanu Chakrabartty:
Quasi-self-powered Infrastructural Internet of Things: The Mackinac Bridge Case Study. 335-340 - Mauricio Pereira, Dylan Burns, Daniel Orfeo, Robert Farrel, Dryver Huston, Tian Xia:
New GPR System Integration with Augmented Reality Based Positioning. 341-346 - Abdelrahman G. Qoutb
MTJ Magnetization Switching Mechanisms for IoT Applications. 347-352 - Caiwen Ding
Structured Weight Matrices-Based Hardware Accelerators in Deep Neural Networks: FPGAs and ASICs. 353-358
Special Session 4: Implementing and Benchmarking Post-Quantum Cryptography in Hardware
- Kris Gaj:
Challenges and Rewards of Implementing and Benchmarking Post-Quantum Cryptography in Hardware. 359-364 - Ayesha Khalid, Tobias Oder, Felipe Valencia
Physical Protection of Lattice-Based Cryptography: Challenges and Solutions. 365-370 - Wen Wang, Jakub Szefer, Ruben Niederhagen:
Post-Quantum Cryptography on FPGAs: The Niederreiter Cryptosystem: Extended Abstract. 371
Special Session 5: Artificial Intelligence at the Edge
- Angel Yanguas-Gil:
Going Small: Using the Insect Brain as a Model System for Edge Processing Applications. 373-378 - Gangotree Chakma
Energy and Area Efficiency in Neuromorphic Computing for Resource Constrained Devices. 379-383 - Eric Herrmann, Rashmi Jha:
Gate-Controlled Memristors and their Applications in Neuromorphic Architectures. 385-390 - Vivek Parmar
Design Exploration of IoT centric Neural Inference Accelerators. 391-396
Special Session 6: Stochastic and Approximate Computing for Emerging Learning and Communication Systems
- Shaahin Angizi
Leveraging Spintronic Devices for Efficient Approximate Logic and Stochastic Neural Networks. 397-402 - You Wang, Yue Zhang, Youguang Zhang, Weisheng Zhao, Hao Cai, Lirida A. B. Naviner
Design Space Exploration of Magnetic Tunnel Junction based Stochastic Computing in Deep Learning. 403-408 - Kaining Han, Junchao Wang, Warren J. Gross:
Bit-Wise Iterative Decoding of Polar Codes using Stochastic Computing. 409-414
Poster Session 1
- Mahmoud Masadeh
Comparative Study of Approximate Multipliers. 415-418 - Anup Das
Dataflow-Based Mapping of Spiking Neural Networks on Neuromorphic Hardware. 419-422 - Peipei Yin, Chenghua Wang, Weiqiang Liu, Fabrizio Lombardi:
Design of Dynamic Range Approximate Logarithmic Multipliers. 423-426 - Shuangnan Liu, Francis C. M. Lau
Investigation and Optimization of Pin Multiplexing in High-Level Synthesis. 427-430 - Hassan Afzali-Kusha, Omid Akbari
Energy Consumption and Lifetime Improvement of Coarse-Grained Reconfigurable Architectures Targeting Low-Power Error-Tolerant Applications. 431-434 - Yuming Cheng, Chao Wang, Yangyang Zhao, Xianglan Chen, Xuehai Zhou, Xi Li:
MuDBN: An Energy-Efficient and High-Performance Multi-FPGA Accelerator for Deep Belief Networks. 435-438 - Mu-Tien Chang, I. Stephen Choi, Dimin Niu, Hongzhong Zheng:
Performance Impact of Emerging Memory Technologies on Big Data Applications: A Latency-Programmable System Emulation Approach. 439-442 - Ali Jafari, Morteza Hosseini, Adwaya Kulkarni, Chintan Patel, Tinoosh Mohsenin:
BiNMAC: Binarized neural Network Manycore ACcelerator. 443-446 - Chia-Cheng Wu, Tung-Yuan Lee, Yung-An Lai, Hsin-Pei Wang, De-Xuan Ji, Yan-Ping Chang, Teng-Chia Wang, Chin-Heng Liu, Chun-Yao Wang, Yung-Chih Chen:
A Hybrid Approach to Equivalent Fault Identification for Verification Environment Qualification. 447-450 - Qi Xu, Song Chen, Bei Yu, Feng Wu:
Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC. 451-454 - Naghmeh Karimi, Sylvain Guilley, Jean-Luc Danger:
Impact of Aging on Template Attacks. 455-458 - Hadi Mardani Kamali, Avesta Sasan:
MUCH-SWIFT: A High-Throughput Multi-Core HW/SW Co-design K-means Clustering Architecture. 459-462
Poster Session 2
- Congming Gao, Liang Shi, Yejia Di, Qiao Li
An Efficient Cache Management Scheme for Capacitor Equipped Solid State Drives. 463-466 - Bozhi Liu, Kemeng Chen, Minjun Seo, Janet Meiling Wang, Roman Lysecky:
Evaluation of the Complexity of Automated Trace Alignment using Novel Power Obfuscation Methods. 467-470 - Jae-hyeon Sung, Kwang-sub Yoon:
A CMOS Low Power 4th-Order Delta-Sigma Modulator with One Reconfigurable Amplifier. 471-474 - Edwin Hsing-Mean Sha, Hailiang Dong, Weiwen Jiang, Qingfeng Zhuge, Xianzhang Chen
On the Design of Reliable Heterogeneous Systems via Checkpoint Placement and Core Assignment. 475-478 - Buse Ustaoglu, Sebastian Huhn, Daniel Große
SAT-Lancer: A Hardware SAT-Solver for Self-Verification. 479-482 - Joel Mandebi Mbongue, Danielle Tchuinkou Kwadjo, Christophe Bobda:
FLexiTASK: A Flexible FPGA Overlay for Efficient Multitasking. 483-486 - Sumanta Pyne:
An Architectural Support for Reduction of In-rush Current in Systems with Instruction Controlled Power Gating. 487-490 - Sara Vinco, Enrico Macii, Massimo Poncino:
Optimal Topology-Aware PV Panel Floorplanning with Hybrid Orientation. 491-494 - Sai Manoj Pudukotai Dinakarrao
ADDHard: Arrhythmia Detection with Digital Hardware by Learning ECG Signal. 495-498 - Lake Bu, Michel A. Kinsy:
Hardening AES Hardware Implementations Against Fault and Error Inject Attacks. 499-502 - Konstantin Shkurko, Tim Grant, Erik Brunvand, Daniel M. Kopta, Josef B. Spjut, Elena Vasiou, Ian Mallett
SimTRaX: Simulation Infrastructure for Exploring Thousands of Cores. 503-506 - Aliyar Attaran, Tyler David Sheaves
Static Design of Spin Transfer Torques Magnetic Look Up Tables for ASIC Designs. 507-510
Keynote & Invited Talks
- David B. Pellerin:
Innovating at Cloud Speed for IoT, AI, and Semiconductor Design. 511
Special Session 5: Artificial Intelligence at the Edge
- Mohammad Reza Mahmoodi, Dmitri B. Strukov:
Mixed-Signal POp/J Computing with Nonvolatile Memories. 513
Panels
- Avesta Sasan, Qi Zhu, Yanzhi Wang, Jae-sun Seo, Tinoosh Mohsenin:
Low Power and Trusted Machine Learning. 515 - Ioannis Savidis, Swarup Bhunia, Gang Qu, Matthew J. Casto, Jeremy Muldavin:
Securing the Systems of the Future - Techniques for a Shifting Attack Space. 517
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