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WO2020206810A1 - 双面显示面板及其制备方法 - Google Patents

双面显示面板及其制备方法 Download PDF

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Publication number
WO2020206810A1
WO2020206810A1 PCT/CN2019/087350 CN2019087350W WO2020206810A1 WO 2020206810 A1 WO2020206810 A1 WO 2020206810A1 CN 2019087350 W CN2019087350 W CN 2019087350W WO 2020206810 A1 WO2020206810 A1 WO 2020206810A1
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WO
WIPO (PCT)
Prior art keywords
layer
emitting
light
double
display panel
Prior art date
Application number
PCT/CN2019/087350
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English (en)
French (fr)
Inventor
唐甲
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US16/617,322 priority Critical patent/US11271062B2/en
Publication of WO2020206810A1 publication Critical patent/WO2020206810A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/128—Active-matrix OLED [AMOLED] displays comprising two independent displays, e.g. for emitting information from two major sides of the display
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/302—Details of OLEDs of OLED structures
    • H10K2102/3023—Direction of light emission
    • H10K2102/3031—Two-side emission, e.g. transparent OLEDs [TOLED]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

Definitions

  • the invention relates to the field of display technology, in particular to a double-sided display panel and a preparation method thereof.
  • AMOLED Active-matrix organic light-emitting diode, active-matrix organic light-emitting diode
  • display panels are mainly divided into bottom-emitting and top-emitting display panels.
  • the display panel has glass as a substrate and flexible substrate products (not yet mature).
  • AMOLED double-sided display backplane technology mainly two array backplanes, which are displayed separately after back-to-back bonding.
  • OLED organic light emitting diode
  • OLED double-sided displays came into being.
  • OLED double-sided displays can also extend the screen space, quickly switch and process multiple display screens, which are huge in advertising and portable electronic products. Application space.
  • the current general OLED double-sided display design is to realize double-sided display after two OLED backplanes are pasted together back to back.
  • this design requires two independent OLED panels, resulting in a thicker display, more complex structure and process, and higher production costs, which does not meet the requirements of lightness and high cost performance that consumers expect.
  • the present invention provides a double-sided display panel and a preparation method thereof, so as to solve the problem of the existing double-sided display panel. Because two independent OLED backplanes are used for bonding to realize double-sided display, the thickness of the double-sided display panel is Technical problems such as thicker, complex structure and process.
  • the present invention provides a double-sided display panel.
  • the double-sided display panel defines a top light-emitting area and a bottom light-emitting area alternately distributed in sequence.
  • the double-sided display panel includes a base substrate, a thin film transistor array, and a first OLED to emit light.
  • the thin film transistor array is disposed on the base substrate;
  • the first OLED light emitting layer is disposed on the thin film transistor array and is located on the Top light emitting area;
  • the second OLED light emitting layer is disposed on the thin film transistor array and located in the bottom light emitting area;
  • the color filter layer is disposed on the base substrate and located at The bottom light-emitting area;
  • the storage capacitor is disposed between the second OLED light-emitting layer and the base substrate, and is located in the bottom light-emitting area, the storage capacitor includes a first transparent electrode layer and a first transparent electrode layer disposed oppositely Two transparent electrode layers; wherein, the thin film transistor array is located in the top emission area, and one thin film transistor simultaneously controls a top emission sub-pixel and a bottom emission sub-pixel.
  • the first transparent electrode layer is disposed between the thin film transistor array and the base substrate, and the second transparent electrode layer is disposed between the first transparent electrode layer and the base substrate. Between the second OLED light-emitting layers.
  • the thin film transistor array includes an active layer, a gate, and a source/drain layer.
  • the source/drain layer is a two-layer composite film structure.
  • a protective layer is provided on the color filter layer, and the protective layer covers the color filter layer.
  • the first OLED light-emitting layer includes a top-emitting anode, a first OLED organic functional layer, and a top-emitting cathode that are sequentially arranged.
  • the second OLED light-emitting layer includes a bottom-emitting anode, a second OLED organic functional layer, and a bottom-emitting cathode that are sequentially arranged.
  • the present invention also provides a double-sided display panel.
  • the double-sided display panel defines a top light-emitting area and a bottom light-emitting area alternately distributed in sequence.
  • the double-sided display panel includes a base substrate, a thin film transistor array, and a first OLED.
  • the storage capacitor includes a first transparent electrode layer and a second transparent electrode layer disposed oppositely.
  • the first transparent electrode layer is disposed between the thin film transistor array and the base substrate, and the second transparent electrode layer is disposed between the first transparent electrode layer and the base substrate. Between the second OLED light-emitting layers.
  • the double-sided display panel further includes a color filter layer, and the color filter layer is disposed on the base substrate and located in the bottom emission area.
  • a protective layer is provided on the color filter layer, and the protective layer covers the color filter layer.
  • the thin film transistor array includes an active layer, a gate, and a source/drain layer.
  • the source/drain layer is a two-layer composite film structure.
  • the first OLED light-emitting layer includes a top-emitting anode, a first OLED organic functional layer, and a top-emitting cathode that are sequentially arranged.
  • the second OLED light-emitting layer includes a bottom-emitting anode, a second OLED organic functional layer, and a bottom-emitting cathode that are sequentially arranged.
  • the present invention also provides a method for manufacturing a double-sided display panel, including:
  • the thin film transistor array is located in the top emitting area, and the thin film transistor array includes an active layer, a gate electrode, and a source and drain layer;
  • the preparation method before the S20, the preparation method includes:
  • a protective layer is formed on the color filter layer.
  • the S20 includes:
  • the S30 includes:
  • the S40 includes:
  • the beneficial effects of the present invention are: realizing double-sided synchronous display through an OLED backplane, reducing the overall thickness of the OLED double-sided display panel, simplifying the process, and saving manufacturing costs.
  • FIG. 1 is a schematic structural diagram of a double-sided display panel according to the first embodiment of the present invention
  • FIG. 2 is a flowchart of the steps of a method for manufacturing a double-sided display panel according to the first embodiment of the present invention
  • 3 to 13 are schematic diagrams of the structure in the manufacturing process of the double-sided display panel according to the first embodiment of the present invention.
  • the present invention is aimed at the existing double-sided display panel. Because two independent OLED backplanes are used for bonding to realize double-sided display, the double-sided display panel has technical problems such as thicker thickness, complicated structure and process. This embodiment can solve this defect.
  • the present invention provides a double-sided display panel.
  • the double-sided display panel defines a top light-emitting area and a bottom light-emitting area.
  • the double-sided display panel includes a base substrate and a thin film transistor array disposed on the base substrate , The first OLED light-emitting layer and the second OLED light-emitting layer arranged on the thin film transistor array.
  • the first OLED light-emitting layer is located in the top light-emitting area
  • the second OLED light-emitting layer is located in the bottom light-emitting area
  • the top light-emitting area and the bottom light-emitting area are alternately distributed on the double-sided display panel,
  • the first OLED light-emitting layer and the second OLED light-emitting layer are alternately arranged.
  • the thin film transistor array is located in the top light-emitting area. Since the devices in the thin film transistor array are made of metal, and metal has light-shielding properties, the second OLED light-emitting layer located in the bottom light-emitting area needs to pass through the bottom thin film transistor Array light emission, the first OLED light emitting layer in the top light emitting area does not need to pass through the bottom thin film transistor array to directly emit light, so the thin film transistor array is arranged in the top light emitting area, thereby increasing the bottom light emitting area Opening rate.
  • the thin film transistor array includes a plurality of thin film transistors distributed in an array, and the thin film transistor includes a source electrode, a drain electrode, a gate electrode, and an active layer.
  • One thin film transistor simultaneously controls one top-emitting sub-pixel and one bottom-emitting sub-pixel, that is, one top-emitting sub-pixel and one bottom-emitting sub-pixel share one thin-film transistor, and the anode signals of the two sub-pixels are the same, When the thin film transistor is working, the corresponding top-emitting sub-pixel and the bottom-emitting sub-pixel are controlled to be turned on or off at the same time.
  • the double-sided display panel will be described in detail below in conjunction with specific embodiments.
  • the double-sided display panel 100 defines a top light-emitting area AA1 and a bottom light-emitting area AA2.
  • the double-sided display panel 100 includes a base substrate 10, a color filter layer 20, a storage capacitor 30, and a light-shielding area.
  • the top light-emitting area AA1 and the bottom light-emitting area AA2 are alternately distributed in sequence, and only a structural diagram of the top light-emitting area AA1 and the bottom light-emitting area AA2 is drawn for illustration.
  • the first OLED light-emitting layer 60 and the second OLED light-emitting layer 70 are both disposed on the thin film transistor array, and the first OLED light-emitting layer 60 is disposed on the top-emitting area AA1 and is a top-emitting OLED device
  • the second OLED light emitting layer 70 is disposed in the bottom light emitting area AA2, and is a bottom light emitting OLED device.
  • the first OLED light-emitting layer 60 includes a top light-emitting anode 61, a first OLED organic functional layer 62, and a top light-emitting cathode 63 that are sequentially arranged
  • the second OLED light-emitting layer 70 includes a bottom light-emitting anode 71, a second OLED organic functional layer 72 and bottom emission cathode 73.
  • the thin film transistor array is disposed on the base substrate 10, the thin film transistor array is disposed on the top emitting area AA1, and the thin film transistor array includes an active layer 51 and a gate electrode disposed on the active layer 51. 52. The source and drain layer 53 disposed on the gate layer.
  • the storage capacitor 30 is disposed in the bottom light-emitting area AA2, the storage capacitor 30 is disposed between the second OLED light-emitting layer 70 and the base substrate 10, and is disposed on the second OLED light-emitting layer 70 Directly below.
  • the storage capacitor 30 includes a first transparent electrode layer 31 and a second transparent electrode layer 32 disposed oppositely, and the first transparent electrode layer 31 is disposed between the thin film transistor array and the base substrate 10.
  • the second transparent electrode layer 32 is disposed between the first transparent electrode layer 31 and the second OLED light-emitting layer 70.
  • the capacitor uses metal materials as the capacitor electrodes, and the bottom-emitting area and the capacitor area are usually staggered. This is because the bottom of the second OLED light-emitting layer 70 in the bottom-emitting area AA2 must not be blocked by non-transparent materials.
  • both electrode layers of the storage capacitor 30 in this embodiment are made of transparent materials, so that the bottom light-emitting area can be disposed on the capacitor area.
  • the color filter layer 20 is disposed on the base substrate 10, and the color filter layer is disposed on the bottom emission area AA2, and the color filter layer 20 includes Red, green and blue blocking blocks.
  • a protective layer 801 is disposed on the color filter layer 20, and the protective layer 801 covers the color filter layer 20.
  • the first transparent electrode layer 31 is disposed on the protective layer 801
  • the light shielding layer 40 is disposed on the first transparent electrode layer 31, and the light shielding layer 40 is disposed in the top emitting area AA1
  • the light-shielding layer 40 is arranged directly below the thin film transistor array, and is used to block the light at the bottom and prevent the light from the bottom from irradiating the thin film transistor array and affecting the thin film transistor device.
  • the light shielding layer 40 is provided with a buffer layer 802, the active layer 51 is provided on the buffer layer 802, the gate 52 is provided with an interlayer insulating layer 803, and the interlayer insulating layer 803 is provided There are a plurality of first via holes for barely exposing the two end surfaces of the active layer 51 or part of the surface of the light shielding layer 40, and the source and drain layer 53 passes through the first via holes and the The source layer may be electrically connected to the light shielding layer 40.
  • the second transparent electrode layer 32 is arranged in the same layer as the source and drain layer 53 of the thin film transistor array, the source and drain layer 53 is arranged on the interlayer insulating layer 803, and the source and drain layer 53 is Two-layer composite film structure, the source and drain layers 53 are ITO (Indium A tin oxide (indium tin oxide) film layer and a metal film layer, the ITO film layer and the second transparent electrode layer 32 are provided in the same layer.
  • ITO Indium A tin oxide (indium tin oxide) film layer and a metal film layer
  • the source-drain layer 53 is provided with a passivation layer 805, and the passivation layer 805 is provided with a second via hole for exposing the source or drain on the source-drain layer 53, so The top-emitting anode 61 and the bottom-emitting anode 71 are electrically connected to the source or drain through the second via hole.
  • the top emitting anode 61 is disposed on the passivation layer 805, and the top emitting anode 61 has a three-layer composite film structure, including a bottom ITO film layer, an intermediate metal film layer, and a top ITO film layer arranged in sequence, The part of the bottom ITO film layer in the bottom light emitting area AA2 serves as the bottom light emitting anode 71 of the second OLED light emitting layer 70.
  • the bottom light-emitting anode 71 and the top light-emitting anode 61 are provided with a pixel definition layer 806, and a plurality of pixel definition regions are provided on the pixel definition layer 806 to accommodate the first OLED light-emitting layer 60 and the Some devices of the second OLED light-emitting layer 70, such as the first OLED organic functional layer 62 and the second OLED organic functional layer 72.
  • the first OLED light-emitting layer 60 is an independent red, green, and blue light-emitting material. In other embodiments, it may be a white light-emitting material, but it is necessary to arrange a color on the first OLED light-emitting layer 60. Filter, and its corresponding bonding and packaging.
  • the second OLED light-emitting layer 70 is a white light-emitting material.
  • the second OLED light-emitting layer 70 can be vapor-deposited into independent red, green, and blue light-emitting materials, and the base substrate 10 needs to be The upper color filter layer 20 is removed.
  • this embodiment also provides a method for manufacturing the above-mentioned double-sided display panel, including:
  • the base substrate 10 is a glass substrate, and may also be other transparent materials.
  • red, green, and blue blocks are coated on the base substrate 10, and patterning is performed to emit light on the bottom of the base substrate 10.
  • a color filter layer 20 is formed in the area AA2, and then a protective layer 801 is formed on the color filter layer 20.
  • the first ITO film layer 31' and the first metal film layer 40' are sequentially coated on the protective layer 801, and then the first metal film layer 40' After coating the photoresist 90 on the top, using the first halftone mask to expose, develop and etch the first ITO film layer 31' and the first metal film layer 40', the photoresist 90 is peeled off, The patterned first transparent electrode layer 31 and the light shielding layer 40 are formed.
  • a thin film transistor array is formed on the light shielding layer, the thin film transistor array is located in the top emitting area AA1, and the thin film transistor array includes an active layer 51, a gate 52, and a source. Drain layer 53;
  • a buffer layer 802 is prepared on the light shielding layer 40, and then an active layer 51 is prepared on the buffer layer, and then a gate insulating layer material and a metal material are sequentially coated on the active layer 51, and then The gate insulating layer material and the metal material are patterned to form a gate insulating layer 804 and a gate 52, and the active layer 51 is not covered by the gate insulating layer 804 and the gate 52 Conduction treatment of the part;
  • the material of the active layer 51 is indium gallium zinc oxide, or other oxide materials
  • a patterned interlayer insulating layer 803 is formed on the buffer layer 802.
  • the interlayer insulating layer 803 is provided with first via holes to expose the surfaces of the two ends of the active layer 51 or the light shielding layer 40 Part of the surface
  • a second ITO film layer 32' and a second metal film layer 53' are sequentially coated on the interlayer insulating layer 803, and a second halftone mask is used to treat the second ITO film layer 32' and the first
  • a second transparent electrode layer 32 is formed in the bottom light-emitting area AA2, and a two-layer composite film structure of the source and drain layers is formed in the top light-emitting area AA1 53.
  • the first transparent electrode layer 31 and the second transparent electrode layer 32 form a storage capacitor 30.
  • a passivation layer 805 is formed on the source and drain layer 53, and a second via is provided on the passivation layer 805 for exposing the source or drain of the source and drain layer 53;
  • the bottom ITO film layer 71', the middle metal film layer 61', and the top ITO film layer 62' are sequentially coated on the passivation layer 805, and then the bottom ITO film layer 71 is applied with a third halftone mask.
  • the middle metal film layer 61' and the top ITO film layer 62' undergo the same photomask process, forming a bottom light-emitting anode 71 above the storage capacitor, and forming a three-layer composite film above the thin film transistor Layer structure top emitting anode 61;
  • a pixel defining layer 806 is formed on the bottom emitting anode 71 and the top emitting anode 61, and then a second OLED organic functional layer 72 and a bottom emitting cathode 73 are formed on the bottom emitting anode 71, and finally A first OLED organic functional layer 62 and a top emission cathode 63 are formed on the top emission anode 61.

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Abstract

一种双面显示面板（100）包括衬底基板（10）、薄膜晶体管阵列、位于顶发光区域（AA1）的第一OLED发光层（60）、以及位于底发光区域（AA2）的第二OLED发光层（70），薄膜晶体管阵列位于顶发光区域（AA1），一个薄膜晶体管同时控制一个顶发光子像素和一个底发光子像素。通过一张OLED背板实现双面同步显示，能够减轻OLED双面显示面板的整体厚度、简化工艺过程，进而节约制造成本。

Description

双面显示面板及其制备方法 技术领域
本发明涉及显示技术领域，尤其涉及一种双面显示面板及其制备方法。
 背景技术
AMOLED（Active-matrix organic light-emitting diode，主动矩阵有机发光二极体）显示面板主要分为底发光和顶发光两种，显示面板有玻璃为基底，也有柔性基底产品（尚不成熟）。而AMOLED双面显示背板技术报道较少，主要是两张array 背板，背靠背贴合后，各自显示。
OLED (organic light emitting diode，有机发光二极管)显示器具有自发光、驱动电压低、发光效率高、响应时间短、对比度高、宽视角、使用温度范围广，可实现柔性显示与大面积全色显示等诸多优点，被业界公认为是最有发展潜力的显示器。
随着显示技术的发展，消费者除了要求显示器具备反应速度快、分辨率高、画质细腻的特点外，也追求功能及显示模式上的突破。因此，OLED双面显示器应运而生，OLED双面显示器除了具备普通OLED显示器的各种特性外，还可以延伸画面空间，快速切换与处理多个显示画面，在广告宣传与便携式电子产品中有巨大的应用空间。
目前一般的OLED双面显示器的设计，是将两张OLED背板背对背贴合在一起后，实现双面显示。然而，这种设计需要两个独立的OLED面板，导致显示器的厚度较厚、结构和工艺较为复杂，制作成本较高，不符合消费者期望的轻薄与高性价比的要求。
 技术问题
本发明提供一种双面显示面板及其制备方法，以解决现有的双面显示面板，由于采用两个独立的OLED背板进行贴合，来实现双面显示，导致双面显示面板的厚度较厚、结构和工艺复杂等技术问题。
 技术解决方案
为解决上述问题，本发明提供的技术方案如下：
本发明提供一种双面显示面板，所述双面显示面板上定义有依次交替分布的顶发光区域和底发光区域，所述双面显示面板包括衬底基板、薄膜晶体管阵列、第一OLED发光层、第二OLED发光层、彩色滤光层、以及存储电容；所述薄膜晶体管阵列设置于所述衬底基板上；所述第一OLED发光层设置于所述薄膜晶体管阵列上且位于所述顶发光区域；所述第二OLED发光层设置于所述薄膜晶体管阵列上且位于所述底发光区域；所述彩色滤光层所述彩色滤光层设置于所述衬底基板上且位于所述底发光区域；所述存储电容设置于所述第二OLED发光层和所述衬底基板之间，且位于所述底发光区域，所述存储电容包括相对设置的第一透明电极层和第二透明电极层；其中，所述薄膜晶体管阵列位于所述顶发光区域，一个薄膜晶体管同时控制一个顶发光子像素和一个底发光子像素。
在本发明的一种实施例中，所述第一透明电极层设置于所述薄膜晶体管阵列与所述衬底基板之间，所述第二透明电极层设置于所述第一透明电极层与所述第二OLED发光层之间。
在本发明的一种实施例中，所述薄膜晶体管阵列包括有源层、栅极、源漏极层，所述源漏极层为两层复合膜层结构。
在本发明的一种实施例中，所述彩色滤光层上设置有保护层，所述保护层覆盖所述彩色滤光层。
在本发明的一种实施例中，所述第一OLED发光层包括依次设置的顶发光阳极、第一OLED有机功能层、以及顶发光阴极。
在本发明的一种实施例中，所述第二OLED发光层包括依次设置的底发光阳极、第二OLED有机功能层、以及底发光阴极。
本发明还提供一种双面显示面板，所述双面显示面板上定义有依次交替分布的顶发光区域和底发光区域，所述双面显示面板包括衬底基板、薄膜晶体管阵列、第一OLED发光层、第二OLED发光层、以及存储电容；所述薄膜晶体管阵列设置于所述衬底基板上；所述第一OLED发光层设置于所述薄膜晶体管阵列上且位于所述顶发光区域；所述第二OLED发光层设置于所述薄膜晶体管阵列上且位于所述底发光区域；所述存储电容设置于所述第二OLED发光层和所述衬底基板之间，且位于所述底发光区域；其中，所述薄膜晶体管阵列位于所述顶发光区域，一个薄膜晶体管同时控制一个顶发光子像素和一个底发光子像素。
在本发明的一种实施例中，所述存储电容包括相对设置的第一透明电极层和第二透明电极层。
在本发明的一种实施例中，所述第一透明电极层设置于所述薄膜晶体管阵列与所述衬底基板之间，所述第二透明电极层设置于所述第一透明电极层与所述第二OLED发光层之间。
在本发明的一种实施例中，所述双面显示面板还包括彩色滤光层，所述彩色滤光层设置于所述衬底基板上且位于所述底发光区域。
在本发明的一种实施例中，所述彩色滤光层上设置有保护层，所述保护层覆盖所述彩色滤光层。
在本发明的一种实施例中，所述薄膜晶体管阵列包括有源层、栅极、源漏极层，所述源漏极层为两层复合膜层结构。
在本发明的一种实施例中，所述第一OLED发光层包括依次设置的顶发光阳极、第一OLED有机功能层、以及顶发光阴极。
在本发明的一种实施例中，所述第二OLED发光层包括依次设置的底发光阳极、第二OLED有机功能层、以及底发光阴极。
本发明还提供一种双面显示面板的制备方法，包括：
S10，提供一衬底基板，定义出依次交替分布的顶发光区域和底发光区域；
S20，在所述衬底基板上形成第一透明电极层和遮光层，所述遮光层位于顶发光区域；
S30，在所述遮光层上形成薄膜晶体管阵列，所述薄膜晶体管阵列位于所述顶发光区域，所述薄膜晶体管阵列包括有源层、栅极、源漏极层；
S40，在所述薄膜晶体管上形成位于所述顶发光区域的第一OLED发光层以及位于所述底发光区域的第二OLED发光层。
在本发明的一种实施例中，在所述S20之前，所述制备方法包括：
在所述衬底基板上形成彩色滤光层，所述彩色滤光层位于所述底发光区域；
在所述彩色滤光层上形成保护层。
在本发明的一种实施例中，所述S20包括：
S201，在所述保护层上依次涂布第一ITO膜层和第一金属膜层；
S202，利用第一半色调掩模板对所述第一ITO膜层和所述第一金属膜层进行同一光罩制程后，在所述底发光区域形成存储电容的第一透明电极层，以及在所述顶发光区域形成遮光层。
在本发明的一种实施例中，所述S30包括：
S301，在所述遮光层上依次形成缓冲层、所述有源层、栅极绝缘层、所述栅极、以及层间绝缘层；
S302，在所述层间绝缘层上依次涂布第二ITO膜层和第二金属膜层；
S303，利用第二半色调掩模板对所述第二ITO膜层和所述第二金属膜层进行同一光罩制程后，在所述底发光区域形成所述存储电容的第二透明电极层，以及在所述顶发光区域形成两层复合膜层结构的所述源漏极层。
在本发明的一种实施例中，所述S40包括：
S401，在所述源漏极层上形成钝化层；
S402，在所述钝化层上依次涂布底层          ITO膜层、中间金属膜层、以及顶层ITO膜层；
S403，利用第三半色调掩模板对所述底层          ITO膜层、所述中间金属膜层、以及所述顶层ITO膜层进行同一光罩制程，在所述存储电容上方形成底发光阳极，以及在所述薄膜晶体管上方形成三层复合膜层结构的顶发光阳极；
S404，在所述底发光阳极和所述顶发光阳极上形成像素定义层；
S405，在所述底发光阳极上形成第二OLED有机功能层和底发光阴极；
S406，在所述顶发光阳极上形成第一OLED有机功能层和顶发光阴极。
 有益效果
本发明的有益效果为：通过一张OLED背板实现双面同步显示，能够减轻OLED双面显示面板的整体厚度、简化工艺过程，进而节约制造成本。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明的实施例一的双面显示面板的结构示意图；
图2为本发明的实施例一的双面显示面板的制备方法的步骤流程图；
图3~图13为本发明实施例一的双面显示面板的制备过程中的结构示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是用以相同标号表示。
本发明针对现有的双面显示面板，由于采用两个独立的OLED背板进行贴合，来实现双面显示，导致双面显示面板的厚度较厚、结构和工艺复杂等技术问题。本实施例能够解决该缺陷。
本发明提供一种双面显示面板，所述双面显示面板上定义有顶发光区域和底发光区域，所述双面显示面板包括衬底基板、设置于所述衬底基板上的薄膜晶体管阵列、设置于所述薄膜晶体管阵列上的第一OLED发光层和第二OLED发光层。
所述第一OLED发光层位于所述顶发光区域，所述第二OLED发光层位于所述底发光区域，所述顶发光区域和所述底发光区域在所述双面显示面板上交替分布，对应地，所述第一OLED发光层和第二OLED发光层交替排列。
所述薄膜晶体管阵列位于所述顶发光区域，由于所述薄膜晶体管阵列中的器件由金属制备，而金属具有遮光性，位于所述底发光区域的第二OLED发光层需要穿过底层的薄膜晶体管阵列发光，所述顶发光区域的第一OLED发光层不需穿过底层的薄膜晶体管阵列直接发光，因此将所述薄膜晶体管阵列设置于所述顶发光区域，从而增大所述底发光区域的开口率。
所述薄膜晶体管阵列包括多个阵列分布的薄膜晶体管，所述薄膜晶体管包括源极、漏极、栅极、以及有源层。一个所述薄膜晶体管同时控制一个顶发光子像素和一个底发光子像素，即一个所述顶发光子像素和一个所述底发光子像素共用一个薄膜晶体管，两个该子像素的阳极信号相同，当该薄膜晶体管工作时，控制对应的所述顶发光子像素和所述底发光子像素同时打开或关闭。
下面结合具体实施例，对所述双面显示面板进行详细说明。
如图1所示，所述双面显示面板100上定义有顶发光区域AA1和底发光区域AA2，所述双面显示面板100包括衬底基板10、彩色滤光层20、存储电容30、遮光层40、薄膜晶体管阵列、第一OLED发光层60、以及第二OLED发光层70。
其中，顶发光区域AA1和底发光区域AA2依次交替分布，图中只画出一个顶发光区域AA1和底发光区域AA2的结构图进行示意。
所述第一OLED发光层60和所述第二OLED发光层70均设置于所述薄膜晶体管阵列上，所述第一OLED发光层60设置于所述顶发光区域AA1，为顶发光型OLED器件，所述第二OLED发光层70设置于所述底发光区域AA2，为底发光型OLED器件。
所述第一OLED发光层60包括依次设置的顶发光阳极61、第一OLED有机功能层62、以及顶发光阴极63，所述第二OLED发光层70包括依次设置的底发光阳极71、第二OLED有机功能层72、以及底发光阴极73。
所述薄膜晶体管阵列设置于所述衬底基板10上，所述薄膜晶体管阵列设置于所述顶发光区域AA1，所述薄膜晶体管阵列包括有源层51、设置于有源层51上的栅极52、设置于所述栅极层上的源漏极层53。
所述存储电容30设置于所述底发光区域AA2，所述存储电容30设置于所述第二OLED发光层70与所述衬底基板10之间,且设置于所述第二OLED发光层70的正下方。
所述存储电容30包括相对设置的第一透明电极层31和第二透明电极层32，所述第一透明电极层31设置于所述薄膜晶体管阵列与所述衬底基板10之间，所述第二透明电极层32设置于所述第一透明电极层31与所述第二OLED发光层70之间。
传统的底发光背板，电容是采用金属材料作为电容两极，底发光区和电容区通常错开设置，这是由于底发光区AA2的第二OLED发光层70的底部要求不能有非透明材质遮挡，为了提高本实施例中的开口率，本实施例中的存储电容30的两个电极层均采用透明材料制备，进而使得底发光区能够设置在电容区之上。
具体地，在本实施例中，所述彩色滤光层20设置于所述衬底基板10上，且所述彩色滤光层设置于所述底发光区域AA2，所述彩色滤光层20包括红、绿、蓝色阻块。所述彩色滤光层20上设置有保护层801，所述保护层801覆盖所述彩色滤光层20。
所述第一透明电极层31设置于所述保护层801上，所述遮光层40设置于所述第一透明电极层31上，且所述遮光层40设置于所述顶发光区域AA1内，所述遮光层40正对于所述薄膜晶体管阵列的下方设置，用于遮挡底部的光线，避免底部的光线照射到所述薄膜晶体管阵列上，对薄膜晶体管器件造成影响。
所述遮光层40上设置有缓冲层802，所述有源层51设置于所述缓冲层802上，所述栅极52上设置有层间绝缘层803，所述层间绝缘层803上设置有多个第一过孔，以用以裸露出所述有源层51的两端表面或所述遮光层40的部分表面，所述源漏极层53通过该第一过孔与所述有源层或与所述遮光层40电性连接。
所述第二透明电极层32与所述薄膜晶体管阵列的源漏极层53同层设置，所述源漏极层53设置于所述层间绝缘层803上，所述源漏极层53为两层复合膜层结构，所述源漏极层53从下至上依次为ITO（Indium tin oxide，氧化铟锡）膜层和金属膜层，该ITO膜层与所述第二透明电极层32同层设置。
所述源漏极层53上设置有钝化层805，所述钝化层805上设置有第二过孔，以用于裸露出所述源漏极层53上的源极或漏极，所述顶发光阳极61和所述底发光阳极71通过该第二过孔与所述源极或漏极电性连接。
所述顶发光阳极61设置于所述钝化层805上，所述顶发光阳极61为三层复合膜层结构，包括依次设置的底层ITO膜层、中间金属膜层、以及顶层ITO膜层，所述底层ITO膜层在所述底发光区域AA2的部分作为所述第二OLED发光层70的底发光阳极71。
所述底发光阳极71和所述顶发光阳极61上设置有像素定义层806，所述像素定义层806上设置有多个像素定义区域，用以容纳所述第一OLED发光层60和所述第二OLED发光层70的部分器件，例如所述第一OLED有机功能层62和所述第二OLED有机功能层72。
本实施例中，所述第一OLED发光层60为独立的红、绿、蓝色发光材料，在其他实施例中可为白光发光材料，但需要在所述第一OLED发光层60上设置彩色滤光片，并与其对应贴合、封装。
所述第二OLED发光层70为白光发光材料，在其他实施例中，所述第二OLED发光层70可蒸镀为独立的红、绿、蓝色发光材料，需要将所述衬底基板10上的彩色滤光层20去除。
如图2所示，本实施例还提供上述双面显示面板的制备方法，包括：
S10，提供一衬底基板10，定义出依次交替分布的顶发光区域AA1和底发光区域AA2；
所述衬底基板10为玻璃基板，也可为其他的透明材料。
S20，在所述衬底基板10上形成第一透明电极层31和遮光层40，所述遮光层40位于顶发光区域AA1，如图5所示；
如图3所示，在所述S20之前，先在所述衬底基板10上涂布红、绿、蓝色阻块，并进行图案化处理，以在所述衬底基板10上的底发光区域AA2形成彩色滤光层20，之后在所述彩色滤光层20上形成保护层801。
如图4所示，在所述S20中，首先在所述保护层801上依次涂布第一ITO膜层31’和第一金属膜层40’，再在所述第一金属膜层40’上涂布光刻胶90，利用第一半色调掩模板对所述第一ITO膜层31’和第一金属膜层40’进行曝光、显影、刻蚀后，剥离所述光刻胶90，形成图案化的第一透明电极层31和遮光层40。
如图6~9所示，S30，在所述遮光层上形成薄膜晶体管阵列，所述薄膜晶体管阵列位于所述顶发光区域AA1，所述薄膜晶体管阵列包括有源层51、栅极52、源漏极层53；
首先，在所述遮光层40上制备缓冲层802，再在所述缓冲层上制备有源层51，之后在所述有源层51上依次涂布栅极绝缘层材料和金属材料，之后对所述栅极绝缘层材料和金属材料进行图案化处理，形成栅极绝缘层804和栅极52，对所述有源层51的未被所述栅极绝缘层804和所述栅极52覆盖的部分进行导体化处理；
所述有源层51的材料为铟镓锌氧化物，也可为其他氧化物材料；
之后，在所述缓冲层802上形成图案化的层间绝缘层803，所述层间绝缘层803上设置有第一过孔，以露出所述有源层51两端的表面或遮光层40的部分表面；
再在所述层间绝缘层803上依次涂布第二ITO膜层32’和第二金属膜层53’，利用第二半色调掩模板对所述第二ITO膜层32’和所述第二金属膜层53’进行同一光罩制程后，在所述底发光区域AA2形成第二透明电极层32，以及在所述顶发光区域AA1形成两层复合膜层结构的所述源漏极层53，所述第一透明电极层31和所述第二透明电极层32形成存储电容30。
如图10~13所示，S40，在所述薄膜晶体管上形成位于所述顶发光区域AA1的第一OLED发光层60以及位于所述底发光区域AA2的第二OLED发光层70；
首先，在所述源漏极层53上形成钝化层805，所述钝化层805上设置有第二过孔，用以露出所述源漏极层53的源极或漏极；
再在所述钝化层805上依次涂布底层ITO膜层71’、中间金属膜层61’、以及顶层ITO膜层62’，之后利用第三半色调掩模板对所述底层     ITO膜层71’、所述中间金属膜层61’、以及所述顶层ITO膜层62’进行同一光罩制程，在所述存储电容上方形成底发光阳极71，以及在所述薄膜晶体管上方形成三层复合膜层结构的顶发光阳极61；
之后，在所述底发光阳极71和所述顶发光阳极61上形成像素定义层806，再在所述底发光阳极71上形成第二OLED有机功能层72和底发光阴极73，最后，在所述顶发光阳极61上形成第一OLED有机功能层62和顶发光阴极63。
有益效果：通过一张OLED背板实现双面同步显示，能够减轻OLED双面显示面板的整体厚度、简化工艺过程，进而节约制造成本。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (19)

  1. 一种双面显示面板，其中，所述双面显示面板上定义有依次交替分布的顶发光区域和底发光区域，所述双面显示面板包括：
    衬底基板：
    薄膜晶体管阵列，设置于所述衬底基板上；
    第一OLED发光层，设置于所述薄膜晶体管阵列上且位于所述顶发光区域；
    第二OLED发光层，设置于所述薄膜晶体管阵列上且位于所述底发光区域；
    彩色滤光层，所述彩色滤光层设置于所述衬底基板上且位于所述底发光区域；以及
    存储电容，设置于所述第二OLED发光层和所述衬底基板之间，且位于所述底发光区域，所述存储电容包括相对设置的第一透明电极层和第二透明电极层；其中，
    所述薄膜晶体管阵列位于所述顶发光区域，一个薄膜晶体管同时控制一个顶发光子像素和一个底发光子像素。
  2. 根据权利要求1所述的双面显示面板，其中，所述第一透明电极层设置于所述薄膜晶体管阵列与所述衬底基板之间，所述第二透明电极层设置于所述第一透明电极层与所述第二OLED发光层之间。
  3. 根据权利要求1所述的双面显示面板，其中，所述薄膜晶体管阵列包括有源层、栅极、源漏极层，所述源漏极层为两层复合膜层结构。
  4. 根据权利要求1所述的双面显示面板，其中，所述彩色滤光层上设置有保护层，所述保护层覆盖所述彩色滤光层。
  5. 根据权利要求1所述的双面显示面板，其中，所述第一OLED发光层包括依次设置的顶发光阳极、第一OLED有机功能层、以及顶发光阴极。
  6. 根据权利要求1所述的双面显示面板，其中，所述第二OLED发光层包括依次设置的底发光阳极、第二OLED有机功能层、以及底发光阴极。
  7. 一种双面显示面板，其中，所述双面显示面板上定义有依次交替分布的顶发光区域和底发光区域，所述双面显示面板包括：
    衬底基板：
    薄膜晶体管阵列，设置于所述衬底基板上；
    第一OLED发光层，设置于所述薄膜晶体管阵列上且位于所述顶发光区域；
    第二OLED发光层，设置于所述薄膜晶体管阵列上且位于所述底发光区域；以及
    存储电容，设置于所述第二OLED发光层和所述衬底基板之间，且位于所述底发光区域；其中，
    所述薄膜晶体管阵列位于所述顶发光区域，一个薄膜晶体管同时控制一个顶发光子像素和一个底发光子像素。
  8. 根据权利要求7所述的双面显示面板，其中，所述存储电容包括相对设置的第一透明电极层和第二透明电极层。
  9. 根据权利要求8所述的双面显示面板，其中，所述第一透明电极层设置于所述薄膜晶体管阵列与所述衬底基板之间，所述第二透明电极层设置于所述第一透明电极层与所述第二OLED发光层之间。
  10. 根据权利要求7所述的双面显示面板，其中，所述双面显示面板还包括彩色滤光层，所述彩色滤光层设置于所述衬底基板上且位于所述底发光区域。
  11. 根据权利要求10所述的双面显示面板，其中，所述彩色滤光层上设置有保护层，所述保护层覆盖所述彩色滤光层。
  12. 根据权利要求7所述的双面显示面板，其中，所述薄膜晶体管阵列包括有源层、栅极、源漏极层，所述源漏极层为两层复合膜层结构。
  13. 根据权利要求7所述的双面显示面板，其中，所述第一OLED发光层包括依次设置的顶发光阳极、第一OLED有机功能层、以及顶发光阴极。
  14. 根据权利要求7所述的双面显示面板，其中，所述第二OLED发光层包括依次设置的底发光阳极、第二OLED有机功能层、以及底发光阴极。
  15. 一种双面显示面板的制备方法，其中，包括：
    S10，提供一衬底基板，定义出依次交替分布的顶发光区域和底发光区域；
    S20，在所述衬底基板上形成第一透明电极层和遮光层，所述遮光层位于顶发光区域；
    S30，在所述遮光层上形成薄膜晶体管阵列，所述薄膜晶体管阵列位于所述顶发光区域，所述薄膜晶体管阵列包括有源层、栅极、源漏极层；
    S40，在所述薄膜晶体管上形成位于所述顶发光区域的第一OLED发光层以及位于所述底发光区域的第二OLED发光层。
  16. 根据权利要求15所述的制备方法，其中，在所述S20之前，所述制备方法包括：
    在所述衬底基板上形成彩色滤光层，所述彩色滤光层位于所述底发光区域；
    在所述彩色滤光层上形成保护层。
  17. 根据权利要求16所述的制备方法，其中，所述S20包括：
    S201，在所述保护层上依次涂布第一ITO膜层和第一金属膜层；
    S202，利用第一半色调掩模板对所述第一ITO膜层和所述第一金属膜层进行同一光罩制程后，在所述底发光区域形成存储电容的第一透明电极层，以及在所述顶发光区域形成遮光层。
  18. 根据权利要求17所述的制备方法，其中，所述S30包括：
    S301，在所述遮光层上依次形成缓冲层、所述有源层、栅极绝缘层、所述栅极、以及层间绝缘层；
    S302，在所述层间绝缘层上依次涂布第二ITO膜层和第二金属膜层；
    S303，利用第二半色调掩模板对所述第二ITO膜层和所述第二金属膜层进行同一光罩制程后，在所述底发光区域形成所述存储电容的第二透明电极层，以及在所述顶发光区域形成两层复合膜层结构的所述源漏极层。
  19. 根据权利要求18所述的制备方法，其中，所述S40包括：
    S401，在所述源漏极层上形成钝化层；
    S402，在所述钝化层上依次涂布底层 ITO膜层、中间金属膜层、以及顶层ITO膜层；
    S403，利用第三半色调掩模板对所述底层  ITO膜层、所述中间金属膜层、以及所述顶层ITO膜层进行同一光罩制程，在所述存储电容上方形成底发光阳极，以及在所述薄膜晶体管上方形成三层复合膜层结构的顶发光阳极；
    S404，在所述底发光阳极和所述顶发光阳极上形成像素定义层；
    S405，在所述底发光阳极上形成第二OLED有机功能层和底发光阴极；
    S406，在所述顶发光阳极上形成第一OLED有机功能层和顶发光阴极。
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CN108364990A (zh) * 2018-02-27 2018-08-03 武汉华星光电半导体显示技术有限公司 双面显示面板及双面显示装置
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