TW201513176A - 半導體晶圓以及生產半導體晶圓的方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 title abstract description 4
- 239000000758 substrate Substances 0.000 claims abstract description 53
- 239000013078 crystal Substances 0.000 claims abstract description 50
- 230000006911 nucleation Effects 0.000 claims abstract description 36
- 238000010899 nucleation Methods 0.000 claims abstract description 36
- 229910002704 AlGaN Inorganic materials 0.000 claims abstract description 24
- 238000000151 deposition Methods 0.000 claims description 17
- 229910052715 tantalum Inorganic materials 0.000 claims description 13
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 13
- 150000004767 nitrides Chemical class 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 6
- 239000000203 mixture Substances 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- 229910052733 gallium Inorganic materials 0.000 claims description 3
- 238000005229 chemical vapour deposition Methods 0.000 claims description 2
- 229910052738 indium Inorganic materials 0.000 claims description 2
- 229910052789 astatine Inorganic materials 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 3
- 229910052710 silicon Inorganic materials 0.000 abstract 3
- 239000010703 silicon Substances 0.000 abstract 3
- 239000010410 layer Substances 0.000 description 100
- 235000012431 wafers Nutrition 0.000 description 26
- 238000005452 bending Methods 0.000 description 15
- 230000008021 deposition Effects 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 7
- 238000005259 measurement Methods 0.000 description 4
- 238000004630 atomic force microscopy Methods 0.000 description 3
- 238000001816 cooling Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 238000002441 X-ray diffraction Methods 0.000 description 2
- 238000000089 atomic force micrograph Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 239000004615 ingredient Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000005693 optoelectronics Effects 0.000 description 2
- 239000002243 precursor Substances 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- -1 AlN Chemical class 0.000 description 1
- 238000001069 Raman spectroscopy Methods 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000004581 coalescence Methods 0.000 description 1
- 239000012792 core layer Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000005381 potential energy Methods 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
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Abstract
一種半導體晶圓以及一種生產該半導體晶圓的方法。該半導體晶圓包含矽單晶體基材，該矽單晶體基材具有一頂表面和覆蓋該頂表面的堆疊層，該堆疊層包含：一覆蓋矽單晶體基材的頂表面的AlN成核層，其中該矽單晶體基材的頂表面的晶格取向相對於{111}-平面是取向偏離的，該頂表面的法線相對於<111>-方向、朝向<11-2>-方向的傾斜的角度θ不小於0.3°且不大於6°，該傾斜的方位角公差是±0.1°；以及一覆蓋AlN成核並且包含一或多個AlxGa1-xN層的AlGaN緩衝層，其中0<x<1。
Description
本發明係關於一種半導體晶圓以及一種用於生產該半導體晶圓的方法，該半導體晶圓包含矽單晶體基材，該矽單晶體基材具有一頂表面和覆蓋該頂表面的堆疊層。特定言之，本發明係關於一種分層半導體晶圓，該分層半導體晶圓包含其上沉積有III族氮化物異質外延層(heteroepitaxial layers)的矽單晶體基材。
該分層半導體晶圓可用作生產電子裝置和光電子裝置的原料，該電子裝置和光電子裝置例如是高功率裝置、如HEMT(高電子遷移率電晶體)之高頻裝置、及如LED(發光二極體)之發光裝置以及如UV檢測器之光檢測器裝置。
在矽和例如AlN、AlGaN、GaN以及AlInGaN等III族氮化物之間存在相當量的晶格失配，且在熱膨脹係數(CTE)方面也存在相當程度的失配。晶格失配和CTE失配引發薄膜應力且引起嚴重問題，如由位錯(dislocation)的形成所造成之不良晶體品質、以及由分層半導體晶圓的彎曲或者甚至是III族氮化物層或整個分
層半導體晶圓的斷裂所造成的變形。CTE失配在分層半導體晶圓冷卻後，產生顯著的張應力。
為了減少薄膜應力已經做了各種嘗試。根據US2009/0008647A1，可藉由使用例如分級的AlGaN緩衝層、AlN間隔層、AlN/GaN或AlN/GaN系的超晶格、或者原位氮化矽遮罩步驟來生長無裂紋的層。儘管例如AlGaN緩衝層的存在可以提供一些抵消在從沉積溫度開始的冷卻後由CTE失配引起的抗張應力的壓縮應力，但這種抵消應力不足以進行完全補償。因此，從沉積溫度開始的冷卻後的分層半導體晶圓的變形仍然是一個問題。
因此，請求保護的本發明的一個目的是對此問題提供合適的解決方案。
請求保護的本發明係關於一種半導體晶圓，該半導體晶圓包含一矽單晶體基材，該矽單晶體基材具有一頂表面和覆蓋該頂表面的堆疊層，該堆疊層包括：一覆蓋矽單晶體基材的頂表面的AlN成核層，其中該矽單晶體基材的頂表面的晶格取向(orientation)相對於{111}-平面是取向偏離的(off-oriented)，該頂表面的法線相對於<111>方向朝向<11-2>方向傾斜的角度θ不小於0.3°且不大於6°，該傾斜的方位角公差是±0.1°；以及一覆蓋AlN成核層且包含一或多個AlxGa1-xN層的AlGaN緩衝層，其中0<x<1。
此外，請求保護的本發明係關於一種生產半導體晶圓的方法，該半導體晶圓包含一矽單晶體基材的，該矽單晶體基材具有頂表面和覆蓋該頂表面的堆疊層，該方法包括：提供該具有頂表面的矽單晶體基材，該矽單晶體基材的頂表面的晶格取向相對於{111}-平面是取向偏離的，該頂表面的法線相對於<111>-方向朝向<11-2>-方向傾斜的角度θ不小於0.3°且不大於6°，該傾斜的方位角公差是±0.1°；在矽單晶體基材的頂表面上沉積一AlN成核層，該AlN成核層覆蓋矽單晶體基材的頂表面；沉積一AlGaN緩衝層，該AlGaN緩衝層覆蓋AlN成核層並且包括一或多個AlxGa1-xN層，其中0<x<1。
「一層覆蓋另外一層」在本文中的意思是一層直接覆蓋另外一層或者是在該層和另一層之間存在一或多個中間層。
「AlGaN緩衝層」是指一或多個具有成分AlxGa1-xN的層，其中0<x<1。該成分可以是恆定的或分級的。分級的成分可以是階梯式的或是連續分級的。參與形成AlGaN緩衝層的各個AlxGa1-xN層可以具有相同或不同的成分。AlGaN緩衝層可以包括另外的層，尤其是一或更多個另外的AlN層、一或多個GaN層以及AlN層和GaN層的組合。AlGaN緩衝層的頂表面是III族極性氮化物表面。
較佳的是，堆疊層包含一或多個裝置形成層，例如適於加工成電子裝置或者光電子裝置的層。該一或多個裝置形成
層係覆蓋AlGaN緩衝層並且具有二元、三元或四元的III族氮化物的成分，由Al、Ga和In之至少一元素所組成。
本發明的發明人發現，提供具有所請求之偏離取向的頂表面的矽單晶體基材，將會改善生長在該矽單晶體基材的頂表面上的AlN成核層的特性。頂表面的取向偏離(off-orientation)促進了在生長的初始階段的小島的聚結，且有利於與初始生長在精確的{111}-取向的矽單晶體基材上的AlN島相比具有更大尺寸的AlN島的生長。當在AlN成核層的形成期間聚結時，較大的AlN島與較小的AlN島相比係對AlN層引起較小的抗張應力。因此，與沉積在精確的{111}-取向的矽單晶體基材上的AlN成核層的應力狀態相比，該AlN成核層的應力狀態是較少張力(tensile)甚至是鬆弛的。另外，較大的AlN島的生長係促使在AlN成核層中形成較少的凹陷(pit)。AlN成核層中的凹陷的密度應該盡可能的低，這是因為它負面影響生長在AlN成核層上的AlGaN緩衝層的品質。
由於AlN成核層中減少的抗張應力，在AlGaN緩衝層中以及(在適當的情況下)在裝置形成層中將產生更多的壓縮應力。從而，AlGaN緩衝層以及(在適當的情況下)裝置形成層的位能增大以提供壓縮應力而抵消在分層晶圓從沉積溫度開始的冷卻後由CTE失配所引起的張應力。因此，分層晶圓的變形可相當程度地變少且它的彎曲可以顯著地減少。
<111>方向和矽單晶體基材的頂表面的法線之間的傾斜角θ被選定為不小於0.3°且不大於6°，較佳地，不小於0.8°且不大於5.5°。在這種情況下，矽單晶體基材的頂表面上存在平臺
(terrace)，該平臺促進大AlN島的初始生長。如果傾斜角小於0.3°，與AlN成核層的特性有關的改善會變得不顯著。如果傾斜角大於6°，由於存在於矽單晶體基材頂表面上的平臺的低縱橫比(aspect ratio)，不能生長均質的AlN成核層。然而，生長參數，例如生長溫度、壓力、以及氣相中金屬有機(MO)前體與NH3之間的比率也會影響AlN成核島並從而影響分層半導體晶體的沉積後彎曲。頂表面的法線的傾斜的方位角變化公差的範圍是±0.1°。
AlN成核層的厚度較佳為不小於20奈米且不大於500奈米。
矽單晶體基材較佳是具有代表取向偏離的頂表面的經拋光的前側的矽單晶體晶圓。或者，矽單晶體外延晶圓或SOI-晶圓可被用作矽單晶體基材。較佳的是，矽單晶體基材具有直徑不小於150奈米的圓形形狀。同樣較佳的是，矽單晶體基材設置有一或多個取向標記，例如平面(flat)或槽口(notch)。
進一步較佳的是，在一般的MOCVD-反應器中使用金屬有機化學氣相沉積(metal-organic chemical vapor deposition，MOCVD)來生長AlN成核層、AlGaN緩衝層、以及(在合適的情況下)裝置形成層。如果被沉積的層包括Al，則層所沉積於的表面的溫度較佳地是700℃或以上以及1200℃或以下，如果被沉積的層中不存在Al，則該溫度較佳地是550℃或以上以及1150℃或以下。
1‧‧‧頂表面
<111>、<11-2>‧‧‧方向
{111}‧‧‧平面
N‧‧‧法線
θ‧‧‧傾斜角
φ‧‧‧角
藉由圖式和實施例對本發明做進一步解釋。
第1圖表示根據本發明的具有取向偏離的頂表面的矽單晶體基材。
第2圖示出了與由AFM技術所呈現關於厚度為50奈米的AlN層形態的比較。
第3圖示出了矽單晶體基材，其係被堆疊層覆蓋且代表用於製造功率裝置的典型結構。
第4圖示出了根據第3圖的分層結構的晶圓彎曲測量結果。
第5圖示出，根據第3圖的分層結構的依傾斜角θ而變化的彎曲的曲線圖。
根據第1圖，矽單晶體基材具有一相對於{111}-平面而取向偏離的頂表面1。頂表面的法線N相對於<111>-方向傾斜的傾斜角θ不小於0.3°且不大於6°。頂表面1的法線N朝向<11-2>-方向傾斜。頂表面的法線N的傾斜的方位角變化公差的範圍是正角φ至負角φ，其中φ=0.1°。角φ表示頂表面的法線N在{111}-平面上的投影與<11-2>-方向之間的角度。頂表面1可以具有任何的在幾何學上等同的取向偏離。例如，頂表面的法線N可以朝向[11-2]-方向、[1-21]-方向或[-211]-方向傾斜。
實施例：
使用直徑為150奈米的拋光矽單晶體晶圓作為根據
本發明的矽單晶體基材。在商用MOCVD反應器中沉積III族氮化物層。
AlN成核層：
藉由生長厚度分別為10奈米、50奈米和350奈米的AlN成核層來研究AlN成核層的形成的特性。在將氨引導至生長室之前，以Al金屬有機前驅物TMAl(三甲基鋁)的預流動(pre-flow)來開始該生長。在AlN沉積期間，基材表面的溫度是1010℃。第2圖示出了由AFM(原子力顯微鏡)技術所呈現的厚度為50奈米的AlN層的形態的比較。左手側上的圖描繪了生長在沿(111)-取向的經拋光的矽單晶體晶圓上的AlN層的AFM圖像，該沿(111)-取向的經拋光的矽單晶體晶圓在下文中被稱為順取向(on-oriented)的基材。右手側的圖描繪了生長在根據本發明的取向偏離的經拋光的矽單晶體晶圓上的AlN層的AFM圖像。傾斜角θ是1°並且傾斜是精確地朝向[11-2]-方向的。
可以從第2圖中推導出的是，當AlN成核層生長在取向偏離的基材上時，凹陷密度是顯著地較低的。實際上，在採用順取向的基材的情況下，凹陷密度大約是1.1×1010/平方公分，而在採用取向偏離的基材的情況下，凹陷密度大約是2.7×109/平方公分。
表1顯示了為了研究所生長厚度為350奈米的AlN成核層的應力狀態和層品質所進行的拉曼和X射線繞射(XRD)測量的結果。
表1
根據表1，對於這兩個樣本，層應力是正的，即張力，但是在AlN成核層生長在取向偏離的基材上的情況下，引發了較少的張應力。在AlN層沉積後，具有順取向的分層樣本的彎曲是-29.15微米(平均彎曲值)且比具有為-27.16微米的取向偏離的分層樣本更凹。這證實了：與順取向的Si(111)基材上的AlN外延層相比，偏離取向Si(111)基材上的AlN外延層具有更小的拉應變。以XRD所測定的半峰全幅值(full width at half maximum，FWHM)數據可與層缺陷的存在有關。較小的FWHM係歸因於在覆蓋取向偏離的基材的AlN層中檢測到的較少數量的晶體缺陷。
AlN緩衝層：
在另一實驗中，對AlGaN緩衝層上的基材取向的影響進行了研究。首先，如前述實驗描述的，沉積AlN成核層，隨後將AlGaN緩衝層沉積在AlN成核層上，並且該AlGaN緩衝層由三層構成：Al0.75Ga0.25N/Al0.45Ga0.55N/Al0.19Ga0.81N。生長溫度是1010℃。層的厚度分別是400奈米、400奈米、450奈米，並且Al0.75Ga0.25N層覆蓋AlN成核層。
表2顯示了測定在x方向和y方向上所判定分層晶圓的彎曲的變形測量結果，x方向和y方向即垂直於和平行於[1-10]-
方向。
x方向和y方向上的較高的正彎曲值表示增大的凸彎曲。
功率裝置堆疊層：
在另一實驗中，一般被用作生產雙異質結高電子遷移率電晶體(DH-HEMT)裝置的原料的堆疊層被沉積在經拋光的矽單晶體晶圓上，該經拋光的矽單晶體晶圓是順取向的或根據本發明的取向偏離的。第3圖示出了層的順序。每層在1010℃下被沉積。
在整個疊體的沉積後，測定於逐次生長操作(#1至#7)中生產的二十一個分層晶圓(每次操作三個不同的基材)的彎曲(B)，該彎曲(B)被分解在x方向和y方向上。第4圖示出了與基材的取向有關的測量的結果，其中「順」表示順取向的基材，而「0.5°逆」和「1°逆」表示根據本發明的分別取向偏離傾斜角θ=0.5°和θ=1°的基材。左邊(空心)的柱和右邊的(有陰影線的)柱分別表示在x方向和y方向上的彎曲值。如第4圖所示的，沉積後彎曲值隨著傾斜角θ的增大而在有利的凸彎曲方向上單調增加。
第5圖示出了與傾斜角θ有關的根據第3圖的分層結
構的彎曲的曲線圖。顯示的是平均彎曲(AB)，該平均彎曲表示在x方向和y方向上的彎曲的平均值。
對於具有1°取向偏離的基材，觀察到分層晶圓的最大彎曲值(28μm)。隨後，當傾斜角θ從θ1.5°開始進一步增大時，彎曲減小。然而，基材的取向偏離對分層晶圓的沉積後彎曲的影響還取決於AlN成核層的生長條件。如果AlN成核層沉積溫度低於1010℃，則第5圖顯示的沉積後彎曲的最大值可以偏移到1°的傾斜角θ之前。沉積前的基材的彎曲通常在-5微米到5微米的範圍內，並且沉積前的基材的彎曲對沉積後晶圓彎曲具有可忽略的影響。
Claims (9)
- 一種半導體晶圓，包含一矽單晶體基材，該矽單晶體基材具有一頂表面和覆蓋該頂表面的堆疊層，該堆疊層包含：一覆蓋該矽單晶體基材的頂表面的AlN成核層，其中該矽單晶體基材的頂表面的晶格取向(orientation)相對於{111}-平面是取向偏離的(off-oriented)，該頂表面的法線相對於<111>-方向、朝向<11-2>方向傾斜的角度θ不小於0.3°且不大於6°，該傾斜的方位角公差是±0.1°；以及一覆蓋該AlN成核層且包含一或多個AlxGa1-xN層的AlGaN緩衝層，其中0<x<1。
- 根據請求項1所述的半導體晶圓，其中該AlN成核層的厚度不小於20奈米且不大於500奈米。
- 根據請求項1或2所述的半導體晶圓，其中該AlGaN緩衝層包含一或多個AlN層。
- 根據請求項1或2所述的半導體晶圓，其中該AlGaN緩衝層包含一或多個GaN層。
- 根據請求項1或2所述的半導體晶圓，其中該堆疊層包含一或多個裝置形成層，其係覆蓋該AlGaN緩衝層且具有二元、三元或四元的III族氮化物的成分，由Al、Ga和In之至少一個元素所組成。
- 根據請求項1或2所述的半導體晶圓，其中該矽單晶體基材是直徑為150毫米或更大的矽單晶體晶圓。
- 一種生產半導體晶圓的方法，該半導體晶圓包含一矽單晶體基材，該矽單晶體基材具有一頂表面和覆蓋該頂表面的堆疊層，該方法包含：提供該具有頂表面的矽單晶體基材，該矽單晶體基材的頂表面的晶格取向相對於{111}-平面是取向偏離的，該頂表面的法線相對於<111>-方向、朝向<11-2>-方向傾斜的角度θ不小於0.3°且不大於6°，該傾斜的方位角公差是±0.1°；在該矽單晶體基材的頂表面上沉積一AlN成核層，該AlN成核層覆蓋該矽單晶體基材的頂表面；沉積一AlGaN緩衝層，其係覆蓋該AlN成核層且包含一或多個AlxGa1-xN層，其中0<x<1。
- 根據請求項7所述的方法，包含：沉積一或多個裝置形成層，其係覆蓋該AlGaN緩衝層且具有二元、三元或四元的III族氮化物的成分，由Al、Ga和In之至少一元素所組成。
- 根據請求項8所述的方法，其中該沉積方法包含金屬有機化學氣相沉積法(metal-organic chemical vapor deposition，MOCVD)。
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