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JPH0238161U - - Google Patents

Info

Publication number
JPH0238161U
JPH0238161U JP11216188U JP11216188U JPH0238161U JP H0238161 U JPH0238161 U JP H0238161U JP 11216188 U JP11216188 U JP 11216188U JP 11216188 U JP11216188 U JP 11216188U JP H0238161 U JPH0238161 U JP H0238161U
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
mask
solder
approximately
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11216188U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11216188U priority Critical patent/JPH0238161U/ja
Publication of JPH0238161U publication Critical patent/JPH0238161U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Printing Plates And Materials Therefor (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例にかかる半田マスク
の一部を拡大して示す平面図、第2図は本考案に
かかる半田マスクを用いて半田印刷が行なわれる
プリント配線板の一部を拡大して示す平面図、第
3図A,B,C,Dは面実装の様子を段階的に示
すプリント配線板の平面図である。 10……半田マスク、12,14……マスク孔
、20……プリント配線板、22,24……電極
ランド。
FIG. 1 is an enlarged plan view of a portion of a solder mask according to an embodiment of the present invention, and FIG. 2 is a plan view showing a portion of a printed wiring board on which solder printing is performed using the solder mask according to the present invention. The enlarged plan view and FIGS. 3A, B, C, and D are plan views of the printed wiring board showing the state of surface mounting step by step. 10... Solder mask, 12, 14... Mask hole, 20... Printed wiring board, 22, 24... Electrode land.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プリント配線板に重畳され、該プリント配線板
の所定箇所にマスク孔を通して半田印刷を行う半
田マスクにおいて、前記プリント配線板上に対峙
して形成された略々矩形状の電極ランドに対応す
るマスク孔形状を、この対峙する側に夫々開放部
を有する略々コ字形状としたことを特徴とする半
田マスク。
In a solder mask that is superimposed on a printed wiring board and performs solder printing through mask holes at predetermined locations on the printed wiring board, mask holes corresponding to approximately rectangular electrode lands formed facing each other on the printed wiring board are provided. A solder mask characterized in that the shape is approximately U-shaped with open portions on opposing sides.
JP11216188U 1988-08-29 1988-08-29 Pending JPH0238161U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11216188U JPH0238161U (en) 1988-08-29 1988-08-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11216188U JPH0238161U (en) 1988-08-29 1988-08-29

Publications (1)

Publication Number Publication Date
JPH0238161U true JPH0238161U (en) 1990-03-14

Family

ID=31350848

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11216188U Pending JPH0238161U (en) 1988-08-29 1988-08-29

Country Status (1)

Country Link
JP (1) JPH0238161U (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001293972A (en) * 2000-04-17 2001-10-23 Matsushita Electric Ind Co Ltd Screen mask and screen process printing method
JP2005238594A (en) * 2004-02-25 2005-09-08 Murata Mfg Co Ltd Printing pattern forming material and manufacturing method of electronic part employing the same
JP2007081086A (en) * 2005-09-14 2007-03-29 Seiko Instruments Inc Metal mask and packaging method of electronic parts
JP2010056368A (en) * 2008-08-29 2010-03-11 Fuji Mach Mfg Co Ltd Transfer device and transfer method
US8105644B2 (en) 2007-03-08 2012-01-31 Nitto Denko Corporation Manufacturing method of printed circuit board
JP2014138040A (en) * 2013-01-15 2014-07-28 Shindengen Electric Mfg Co Ltd Solder paste coating structure

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60260192A (en) * 1984-06-06 1985-12-23 富士電機株式会社 Method of producing hybrid integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60260192A (en) * 1984-06-06 1985-12-23 富士電機株式会社 Method of producing hybrid integrated circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001293972A (en) * 2000-04-17 2001-10-23 Matsushita Electric Ind Co Ltd Screen mask and screen process printing method
JP4560880B2 (en) * 2000-04-17 2010-10-13 パナソニック株式会社 Screen mask and screen printing method
JP2005238594A (en) * 2004-02-25 2005-09-08 Murata Mfg Co Ltd Printing pattern forming material and manufacturing method of electronic part employing the same
JP4525107B2 (en) * 2004-02-25 2010-08-18 株式会社村田製作所 Manufacturing method of multilayer ceramic electronic component
JP2007081086A (en) * 2005-09-14 2007-03-29 Seiko Instruments Inc Metal mask and packaging method of electronic parts
US8105644B2 (en) 2007-03-08 2012-01-31 Nitto Denko Corporation Manufacturing method of printed circuit board
JP2010056368A (en) * 2008-08-29 2010-03-11 Fuji Mach Mfg Co Ltd Transfer device and transfer method
JP2014138040A (en) * 2013-01-15 2014-07-28 Shindengen Electric Mfg Co Ltd Solder paste coating structure

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