JP6408986B2 - Bvaインタポーザ - Google Patents
Bvaインタポーザ Download PDFInfo
- Publication number
- JP6408986B2 JP6408986B2 JP2015525625A JP2015525625A JP6408986B2 JP 6408986 B2 JP6408986 B2 JP 6408986B2 JP 2015525625 A JP2015525625 A JP 2015525625A JP 2015525625 A JP2015525625 A JP 2015525625A JP 6408986 B2 JP6408986 B2 JP 6408986B2
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- JP
- Japan
- Prior art keywords
- interposer
- small electronic
- contact
- component
- wire bonds
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000008393 encapsulating agent Substances 0.000 claims description 81
- 238000000034 method Methods 0.000 claims description 41
- 239000000463 material Substances 0.000 claims description 18
- 239000003566 sealing material Substances 0.000 claims description 10
- 239000000565 sealant Substances 0.000 claims description 8
- 238000004377 microelectronic Methods 0.000 claims description 7
- 230000002093 peripheral effect Effects 0.000 claims description 6
- 238000003780 insertion Methods 0.000 claims description 2
- 230000037431 insertion Effects 0.000 claims description 2
- 239000007787 solid Substances 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 description 37
- 239000002184 metal Substances 0.000 description 37
- 239000000758 substrate Substances 0.000 description 27
- 239000004065 semiconductor Substances 0.000 description 11
- 239000011295 pitch Substances 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 8
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 230000007246 mechanism Effects 0.000 description 4
- 239000010953 base metal Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000000994 depressogenic effect Effects 0.000 description 2
- 238000005304 joining Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
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- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
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Description
Claims (25)
- インタポーザを作製するための方法であって、
第1要素の1又は2以上の表面に結合された基底部を含む第1端部、及び前記第1端部とは反対側の第2端部を有する、複数のワイヤボンドを形成する工程であって、前記ワイヤボンドが、前記第1端部と前記第2端部との間に延在する縁部表面を有する、工程と、
前記縁部表面に接触して、隣接するワイヤボンドを互いに隔てる、誘電封止材を形成する工程と、
次いで、前記第1要素の少なくとも一部を除去することを含む更なる加工処理を行う工程と、を含み、
前記更なる加工処理の後、少なくとも前記誘電封止材によって互いに隔てられた反対側の第1面及び第2面を有する前記インタポーザが提供され、前記インタポーザが、それぞれ第1コンポーネント及び第2コンポーネントとの接続のために、反対側の前記第1面及び前記第2面に、それぞれ、第1コンタクト及び第2コンタクトを有し、前記第1コンタクトが、前記ワイヤボンドを通じて前記第2コンタクトと電気的に接続され、前記第1コンタクト及び第2コンタクトは第1コンポーネント及び第2コンポーネントと、導電性ボンド材料により電気的に接続され、
前記誘電封止材は、前記第1面及び第2面の少なくとも一方から前記ワイヤボンドのうちの少なくとも一部のそれぞれの端部に隣接して延びる溝を有し、前記溝は前記導電性ボンド材料を受け入れるように構成されている、方法。 - 前記誘電封止材が、反対向きの第1表面及び第2表面を有し、前記インタポーザが、反対向きの前記第1面と前記第2面との間に延在する貫通開口部を有し、前記貫通開口部が、小型電子素子の主表面全体を受容するように寸法決めされる、請求項1に記載の方法。
- 前記インタポーザが、前記第1面と前記第2面との間に延在する少なくとも1つの周縁部表面を有し、前記ワイヤボンドが、前記貫通開口部と前記少なくとも1つの周縁部表面との間の、前記誘電封止材の一部分の内部に配置される、請求項2に記載の方法。
- 前記少なくとも1つの周縁部表面が、反対向きの第1外側面及び第2外側面と、反対向きの前記第1外側面及び前記第2外側面のそれぞれと交差する、反対向きの第3外側面及び第4外側面とによって画定され、前記貫通開口部が、反対向きの第1内側面及び第2内側面と、反対向きの前記第1内側面及び前記第2内側面のそれぞれと交差する、反対向きの第3内側面及び第4内側面とによって画定される、請求項3に記載の方法。
- インタポーザであって、
反対向きの第1表面及び第2表面を有する、誘電封止材と、
前記誘電封止材によってそれぞれが互いに隔てられた、複数のワイヤボンドであって、各ワイヤボンドが、前記第1表面及び前記第2表面に、それぞれ、前記誘電封止材によって完全には覆われていない、反対側の第1端部及び第2端部を有し、前記第1端部と前記第2端部との間の縁部表面が、前記誘電封止材によって接触され、かつ前記誘電封止材によって、隣接するワイヤボンドの前記縁部表面から隔てられ、各ワイヤボンドの前記端部の少なくとも一つが、そのようなワイヤボンドの基底部である、複数のワイヤボンドと、を備え、
前記インタポーザが、反対側の第1面及び第2面と、それぞれ第1コンポーネント及び第2コンポーネントとの電気的接続のために、反対側の前記第1面及び前記第2面に、それぞれ、第1コンタクト及び第2コンタクトとを有し、前記第1コンタクトが、前記ワイヤボンドを通じて前記第2コンタクトと電気的に接続され、
前記第1コンタクト及び第2コンタクトは第1コンポーネント及び第2コンポーネントと、導電性ボンド材料により電気的に接続され、
前記誘電封止材は、前記第1表面及び第2表面の少なくとも一方から前記ワイヤボンドのうちの少なくとも一部のそれぞれの端部に隣接して延びる溝を有し、前記溝は前記導電性ボンド材料を受け入れるように構成されている、インタポーザ。 - インタポーザであって、
反対向きの第1表面及び第2表面を有する誘電封止材であって、反対向きの前記第1表面と前記第2表面との間に延在する貫通開口部を有し、前記貫通開口部が、小型電子素子の主表面全体を受容するように寸法決めされる、誘電封止材と、
第1コンポーネント及び第2コンポーネントとの電気的接続のための複数のワイヤボンドであって、該複数のワイヤボンドは前記誘電封止材によって互いに隔てられ、各ワイヤボンドが、反対向きの前記第1表面及び前記第2表面の少なくとも一方に、それぞれ、前記誘電封止材によって少なくとも完全には覆われていない、反対側の第1端部及び第2端部を有し、前記第1端部と前記第2端部との間の縁部表面が、前記誘電封止材によって接触され、かつ前記誘電封止材によって、隣接するワイヤボンドの縁部表面から隔てられる、複数のワイヤボンドと、を備え、
前記インタポーザが、それぞれ第1コンポーネント及び第2コンポーネントとの接続のために、反対側の第1面及び第2面に、それぞれ、第1コンタクト及び第2コンタクトとを有し、
前記第1コンタクト及び第2コンタクトは第1コンポーネント及び第2コンポーネントと、導電性ボンド材料により電気的に接続され、
前記誘電封止材は、前記第1表面及び第2表面の少なくとも一方から前記ワイヤボンドのうちの少なくとも一部のそれぞれの端部に隣接して延びる溝を有し、前記溝は前記導電性ボンド材料を受け入れるように構成されている、インタポーザ。 - 前記インタポーザが、それぞれ少なくとも前記誘電封止材の反対向きの前記第1表面及び前記第2表面によって互いに隔てられる、反対向きの第1面及び第2面を更に備える、請求項6に記載のインタポーザ。
- 前記インタポーザが、それぞれ第1コンポーネント及び第2コンポーネントとの電気的接続のために、反対側の前記第1面及び前記第2面に、それぞれ、第1コンタクト及び第2コンタクトを更に備え、前記第1コンタクトが、前記ワイヤボンドを通じて前記第2コンタクトと電気的に接続される、請求項7に記載のインタポーザ。
- 前記複数のワイヤボンドの前記複数の第1端部のうちの1つから横方向に延出し、かつ前記複数のワイヤボンドの前記複数の第1端部のうちの1つを、前記第1コンタクトのうちの対応する1つに電気的に接続する部分を少なくとも有する、少なくとも1つの導電性構造体を更に備え、前記第1コンタクトのうちの前記対応する1つが、前記複数の第1端部のうちの前記1つからオフセットされる、請求項7に記載のインタポーザ。
- 前記複数のワイヤボンドの前記複数の第2端部のうちの1つから横方向に延出し、かつ前記複数のワイヤボンドの前記複数の第2端部のうちの1つを、前記第2コンタクトのうちの対応する1つに電気的に接続する部分を少なくとも有する、少なくとも第2の導電性構造体を更に備え、前記第2コンタクトのうちの前記対応する1つが、前記複数の第2端部のうちの前記1つからオフセットされる、請求項9に記載のインタポーザ。
- 反対向きの前記第1面と前記第2面との間の前記インタポーザの厚さが、1ミリメートル未満である、請求項7に記載のインタポーザ。
- 積層小型電子組立体であって、請求項7に記載の前記インタポーザを含み、
前記第1コンポーネントが、複数の第1端子を含む第1小型電子パッケージであり、
前記第2コンポーネントが、複数の第2端子を含む第2小型電子パッケージであり、前記第2小型電子パッケージが、前記インタポーザを通じて、前記第1小型電子パッケージと電気的に接続され、
前記第1小型電子パッケージが、前記インタポーザの前記第1面に向き合う表面を含み、前記第2小型電子パッケージが、前記インタポーザの前記第2面に向き合う表面を含み、
前記第1小型電子パッケージの前記それぞれの複数の第1端子のうちの少なくとも一部が、前記インタポーザの前記複数のワイヤボンドの対応する第1端部と電気的に接続され、
前記第2小型電子パッケージの前記それぞれの複数の第2端子のうちの少なくとも一部が、前記インタポーザの前記複数のワイヤボンドの対応する第2端部と電気的に接続される、積層小型電子組立体。 - 前記第1小型電子パッケージが、第1小型電子素子を更に含み、前記第1小型電子素子の主表面が、前記貫通開口部の内部に受容され、前記第1小型電子素子が、前記インタポーザを通じて前記第2小型電子パッケージに電気的に接続される、第1素子コンタクトを含む、請求項12に記載の積層小型電子組立体。
- 前記第2小型電子パッケージが、第2小型電子素子を更に含み、前記第2小型電子素子が、前記インタポーザを通じて前記第1小型電子パッケージに電気的に接続される、第2素子コンタクトを含む、請求項13に記載の積層小型電子組立体。
- 前記貫通開口部が、前記第1小型電子素子に対する前記インタポーザの場所を固定するために、誘電封止材で充填される、請求項13に記載の積層小型電子組立体。
- 前記第1小型電子パッケージが、回路パネルである、請求項12に記載の積層小型電子組立体。
- 積層小型電子組立体を形成する方法であって、
第1コンポーネントを、インタポーザの第1面に向き合うように定置する工程であって、前記第1コンポーネントが、その上に複数の第1端子を有し、前記インタポーザが、前記第1面とは反対方向を向く第2面を更に有し、前記第1面及び前記第2面が、それぞれ、少なくとも誘電封止材の反対向きの第1表面及び第2表面によって隔てられ、
前記インタポーザが、反対向きの前記第1面と前記第2面との間に延在する貫通開口部であって、前記貫通開口部が小型電子素子の主表面全体を受容するように寸法決めされる、貫通開口部と、第1コンポーネント及び第2コンポーネントとの電気的接続のための複数のワイヤボンドであって、該複数のワイヤボンドは前記誘電封止材によって互いに隔てられ、各ワイヤボンドが、反対向きの前記第1表面及び前記第2表面の少なくとも一方に、それぞれ、前記誘電封止材によって少なくとも完全には覆われていない、反対側の第1端部及び第2端部を有し、前記第1端部と前記第2端部との間の縁部表面が、前記誘電封止材によって接触され、かつ前記誘電封止材によって、隣接するワイヤボンドの前記縁部表面から隔てられる、複数のワイヤボンドと、を有する、工程と、
前記インタポーザの少なくとも一部のワイヤボンドの前記第1端部を、前記第1コンポーネント上の前記複数の第1端子のうちの少なくとも一部に接続する工程と、
第2コンポーネントを、前記インタポーザの前記第2面に向き合うように定置する工程であって、前記第2コンポーネントが、その上に複数の第2端子を有する、工程と、
前記第2コンポーネントを、前記複数のワイヤボンドのうちの少なくとも一部の前記第2端部に接続する工程と、を含み、
前記インタポーザが、それぞれ第1コンポーネント及び第2コンポーネントとの接続のために、反対側の第1面及び第2面に、それぞれ、第1コンタクト及び第2コンタクトとを有し、
前記第1コンタクト及び第2コンタクトは第1コンポーネント及び第2コンポーネントと、導電性ボンド材料により電気的に接続され、
前記誘電封止材は、前記第1表面及び第2表面の少なくとも一方から前記ワイヤボンドのうちの少なくとも一部のそれぞれの端部に隣接して延びる溝を有し、前記溝は前記導電性ボンド材料を受け入れるように構成されている、方法。 - 前記第1コンポーネントが、第1小型電子パッケージであり、前記複数の第1端子が、前記第1小型電子パッケージの第1接続表面に沿って位置し、前記複数のワイヤボンドのうちの前記少なくとも一部の前記第1端部が、前記第1小型電子パッケージの前記複数の第1端子のうちの前記少なくとも一部に、物理的に接続される、請求項17に記載の方法。
- 前記第2コンポーネントが、第2小型電子パッケージであり、前記第2小型電子パッケージが、前記第2小型電子パッケージの第2接続表面に沿って導電層を有し、複数の第2端子が、前記第2小型電子パッケージの第3接続表面に沿って位置し、前記複数のワイヤボンドのうちの前記少なくとも一部の前記第2端部が、前記第2小型電子パッケージの前記導電層で、前記第2小型電子パッケージに物理的に接続される、請求項17に記載の方法。
- 前記インタポーザが、反対側の前記第1面及び前記第2面に、それぞれ、第1コンタクト及び第2コンタクトを更に含み、前記第1コンタクトが、前記ワイヤボンドを通じて前記第2コンタクトと電気的に接続され、前記方法が、前記複数のワイヤボンドの前記複数の第1端部のうちの1つから横方向に延出し、かつ前記複数のワイヤボンドの前記複数の第1端部のうちの1つを、前記第1コンタクトのうちの対応する1つに電気的に接続する部分を少なくとも有する、少なくとも1つの導電性構造体を形成することを更に含み、前記第1コンタクトのうちの前記対応する1つが、前記複数の第1端部のうちの前記少なくとも1つからオフセットされる、請求項17に記載の方法。
- 前記複数のワイヤボンドの前記複数の第2端部のうちの1つから横方向に延出し、かつ前記複数のワイヤボンドの前記複数の第2端部のうちの1つを、前記第2コンタクトのうちの対応する1つに電気的に接続する部分を少なくとも有する、少なくとも第2の導電性構造体を形成することを更に含み、前記第2コンタクトのうちの前記対応する1つが、前記複数の第2端部のうちの前記1つからオフセットされる、請求項20に記載の方法。
- 前記第1小型電子パッケージが、第1小型電子素子を含み、前記方法が、前記インタポーザの前記貫通開口部の内部に露出される、前記第1コンポーネントの一部分上に、前記第1小型電子素子を実装することを更に含む、請求項18に記載の方法。
- 前記小型電子素子を、前記インタポーザの厚さ以下の所定の厚さまで薄化加工する工程を更に含む、請求項22に記載の方法。
- 前記小型電子素子を薄化加工する前記工程が、前記インタポーザ内への(i)挿入前及び(ii)挿入後のうちの一方で実行される、請求項23に記載の方法。
- 前記第1小型電子パッケージの前記第1接続表面を、前記第1接続表面が前記インタポーザと同じ高さとなるように、前記インタポーザの前記第1表面に当接させる工程を更に含む、請求項18に記載の方法。
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- 2013-08-02 EP EP13826185.4A patent/EP2880683A4/en not_active Withdrawn
- 2013-08-02 KR KR1020157005616A patent/KR20150041029A/ko not_active Abandoned
- 2013-08-02 CN CN201380051572.6A patent/CN104685622B/zh active Active
- 2013-08-02 WO PCT/US2013/053437 patent/WO2014022780A1/en active Application Filing
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US20140036454A1 (en) | 2014-02-06 |
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