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DE60216268D1 - Eingebaute Selbsttestschaltung für integrierte Schaltungen - Google Patents

Eingebaute Selbsttestschaltung für integrierte Schaltungen

Info

Publication number
DE60216268D1
DE60216268D1 DE60216268T DE60216268T DE60216268D1 DE 60216268 D1 DE60216268 D1 DE 60216268D1 DE 60216268 T DE60216268 T DE 60216268T DE 60216268 T DE60216268 T DE 60216268T DE 60216268 D1 DE60216268 D1 DE 60216268D1
Authority
DE
Germany
Prior art keywords
built
self
integrated circuits
test circuit
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60216268T
Other languages
English (en)
Inventor
Massimiliano Barone
Antonio Griseta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE60216268D1 publication Critical patent/DE60216268D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/27Built-in tests
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3187Built-in tests

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE60216268T 2002-08-08 2002-08-08 Eingebaute Selbsttestschaltung für integrierte Schaltungen Expired - Lifetime DE60216268D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP02425519A EP1388788B1 (de) 2002-08-08 2002-08-08 Eingebaute Selbsttestschaltung für integrierte Schaltungen

Publications (1)

Publication Number Publication Date
DE60216268D1 true DE60216268D1 (de) 2007-01-04

Family

ID=30129271

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60216268T Expired - Lifetime DE60216268D1 (de) 2002-08-08 2002-08-08 Eingebaute Selbsttestschaltung für integrierte Schaltungen

Country Status (3)

Country Link
US (1) US7213185B2 (de)
EP (1) EP1388788B1 (de)
DE (1) DE60216268D1 (de)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
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US20050149786A1 (en) * 2003-12-19 2005-07-07 Hassan Mohamed A. Apparatus and method for determining threshold voltages in a flash memory unit
US20050138497A1 (en) * 2003-12-19 2005-06-23 Hassan Mohamed A. Apparatus and method for testing a flash memory unit
KR100966895B1 (ko) * 2004-01-06 2010-06-30 삼성전자주식회사 불휘발성 메모리의 테스트 장치 및 방법
US7533309B2 (en) 2004-02-26 2009-05-12 Nilanjan Mukherjee Testing memories using algorithm selection
US7178076B1 (en) * 2004-06-16 2007-02-13 Sun Microsystems, Inc. Architecture of an efficient at-speed programmable memory built-in self test
US7254763B2 (en) * 2004-09-01 2007-08-07 Agere Systems Inc. Built-in self test for memory arrays using error correction coding
DE102004044813A1 (de) * 2004-09-16 2006-03-23 Robert Bosch Gmbh Verfahren zum Testen eines integrierten Schaltkreises
EP1825479A4 (de) * 2004-11-18 2008-04-16 Mentor Graphics Corp Verfahren und vorrichtung für einen integrierten programmierbaren speicher-selbsttest (mbist)
US7672803B1 (en) 2004-12-07 2010-03-02 Spansion Llc Input of test conditions and output generation for built-in self test
US7284167B2 (en) 2005-01-24 2007-10-16 Spansion Llc Automated tests for built-in self test
US7324392B2 (en) * 2005-06-09 2008-01-29 Texas Instruments Incorporated ROM-based memory testing
JP4684917B2 (ja) * 2006-02-28 2011-05-18 富士通テン株式会社 電子制御装置
JP2007334813A (ja) * 2006-06-19 2007-12-27 Nec Electronics Corp メモリ制御回路及びデータ書き換え方法
KR100825776B1 (ko) * 2006-08-28 2008-04-28 삼성전자주식회사 메모리 장치 및 그 테스트 방법
JP2008108326A (ja) * 2006-10-24 2008-05-08 Toshiba Corp 記憶装置およびその自己テスト方法
US7933735B2 (en) * 2007-01-31 2011-04-26 Denso Corporation Semiconductor integrated circuit
US20080209294A1 (en) * 2007-02-26 2008-08-28 Hakan Brink Built-in self testing of a flash memory
JP5014907B2 (ja) * 2007-07-17 2012-08-29 ルネサスエレクトロニクス株式会社 半導体記憶装置及びそのテスト方法
US7721175B2 (en) * 2007-08-21 2010-05-18 Micron Technology, Inc. System, apparatus, and method for memory built-in self testing using microcode sequencers
US8046650B2 (en) * 2008-03-14 2011-10-25 Texas Instruments Incorporated TAP with control circuitry connected to device address port
US20100096629A1 (en) * 2008-10-20 2010-04-22 Mediatek Inc. Multi-chip module for automatic failure analysis
US20100131808A1 (en) * 2008-11-25 2010-05-27 Bei-Chuan Chen Method For Testing Memory
JP2010256130A (ja) * 2009-04-23 2010-11-11 Renesas Electronics Corp 半導体集積回路、および半導体集積回路のテスト方法
US8108745B2 (en) * 2009-08-20 2012-01-31 Honeywell International Inc. On-device constrained random verification for device development
US8447919B1 (en) * 2009-08-20 2013-05-21 Sk Hynix Memory Solutions Inc. Measure of health for writing to locations in flash
US8694845B2 (en) * 2010-04-25 2014-04-08 Ssu-Pin Ma Methods and systems for testing electronic circuits
US8856614B2 (en) * 2010-07-29 2014-10-07 Kabushiki Kaisha Toshiba Semiconductor memory device detecting error
US8930783B2 (en) * 2012-12-10 2015-01-06 Texas Instruments Incorporated pBIST read only memory image compression
US9009550B2 (en) * 2012-12-10 2015-04-14 Texas Instruments Incorporated pBIST engine with distributed data logging
US8996942B2 (en) * 2012-12-20 2015-03-31 Avago Technologies General Ip (Singapore) Pte. Ltd. Suspend SDRAM refresh cycles during normal DDR operation
JP2015165226A (ja) * 2014-02-07 2015-09-17 株式会社半導体エネルギー研究所 装置
KR20170056109A (ko) 2015-11-13 2017-05-23 삼성전자주식회사 메모리 장치 및 메모리 장치 테스트 시스템
CN105572565B (zh) * 2015-12-23 2018-08-24 中国电子科技集团公司第五十八研究所 适用于1553总线协议的内建自测试电路
US9959185B2 (en) * 2016-04-28 2018-05-01 United Microelectronics Corp. Memory system capable of generating notification signals

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3971916A (en) * 1974-03-25 1976-07-27 Societe Internationale Methods of data storage and data storage systems
JP2806075B2 (ja) * 1991-06-06 1998-09-30 日本電気株式会社 マイクロコンピュータ
US5933855A (en) * 1997-03-21 1999-08-03 Rubinstein; Richard Shared, reconfigurable memory architectures for digital signal processing
US6374370B1 (en) * 1998-10-30 2002-04-16 Hewlett-Packard Company Method and system for flexible control of BIST registers based upon on-chip events
US6067262A (en) * 1998-12-11 2000-05-23 Lsi Logic Corporation Redundancy analysis for embedded memories with built-in self test and built-in self repair
EP1087233A1 (de) * 1999-09-23 2001-03-28 Infineon Technologies AG Verfahren und Anordnung zum datenschützenden Selbsttest für Microcontroller
US6553526B1 (en) * 1999-11-08 2003-04-22 International Business Machines Corporation Programmable array built-in self test method and system for arrays with imbedded logic
US6564349B1 (en) * 2000-02-25 2003-05-13 Ericsson Inc. Built-in self-test systems and methods for integrated circuit baseband quadrature modulators
US6691264B2 (en) * 2001-01-22 2004-02-10 Lsi Logic Corporation Built-in self-repair wrapper methodology, design flow and design architecture
US6957371B2 (en) * 2001-12-04 2005-10-18 Intellitech Corporation Method and apparatus for embedded built-in self-test (BIST) of electronic circuits and systems

Also Published As

Publication number Publication date
EP1388788B1 (de) 2006-11-22
US7213185B2 (en) 2007-05-01
EP1388788A1 (de) 2004-02-11
US20040107396A1 (en) 2004-06-03

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Legal Events

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