CN102790596A - Automatic gain control amplifier for canceling direct current offset - Google Patents

Abstract

The invention discloses a complementary metal oxide semiconductor (CMOS) automatic gain control amplifier for canceling direct current offset. The CMOS automatic gain control amplifier comprises a cascade amplification link, an automatic gain control feedback loop and a direct current offset canceling feedback loop. The cascade amplification link uses multistage variable gain amplification units for cascading and can achieve high gain and enlarge high gain dynamic ranges. The automatic gain control feedback loop uses a charge pump structure and has the advantages that the automatic gain control feedback loop is less influenced by process deviation and temperature deviation, is capable of accurately detecting narrow-band and wide-band signal amplitude and is suitable for achieving CMOS processes. The direct current offset canceling feedback loop uses two-stage negative feedback loops, and each of the two-stage negative feedback loops uses an integrator as low-pass negative feedback; an active device is used as an integrator input resistor, and an equivalent resistor is provided with characteristics of temperature compensation; and the automatic gain control amplifier for canceling the direct current offset is capable of effectively canceling the direct current offset superposed by a preceding stage circuit and the direct current offset of the amplification link and is provided with a lower high pass corner frequency and a higher integrated level, and the automatic gain control amplifier for canceling the direct current offset is small in low-frequency signal loss and requires no off-chip passive devices (high value resistors or capacitors and the like). The automatic gain control amplifier is applicable to wireless communication receivers with zero intermediate frequency structures in the CMOS processes.

Description

A kind of automatic gain control amplifier of eliminating DC maladjustment

Technical field

The invention belongs to digital communication technology field, relate to a kind of automatic gain control amplifier, relate in particular to a kind of automatic gain control amplifier of eliminating DC maladjustment, be used to realize the automatic gain control amplifier that DC maladjustment is eliminated function that has of high integration.

Background technology

For wireless receiver; Because it is very big to receive the Strength Changes of signal, or because sheet is outer or the gain generation deviation of RF front-end circuit, cause frequency conversion after the analog baseband signal changes in amplitude violent; Cause the performance of analog-to-digital convertor severe exacerbation; Digital baseband can't right demodulation, therefore needs to introduce automatic gain control amplifier and regulates, and the signal that makes analog to digital converter receive has stable amplitude; Reduce the influence of analog baseband signal changes in amplitude to carrier-to-noise ratio, the Strength Changes numerical quantity that receives signal is the dynamic range of automatic gain control amplifier.Automatic gain control has analog-and digital-two kinds of control modes: the control information of digital control approach automatic gain control need be produced by digital baseband, therefore has limitation; The automatic gain control of analog control mode; Like people such as Chi Bao Yong at IEEE Transactions on Biomedical Engineering; 2007: in " Low-Power Transceiver Analog Front-End Circuits for Bidirectional High Data Rate Wireless Telemetry in Medical Endoscopy Applications " paper of delivering; Automative interest increasing controlling circuit adopts linear circuit realizations such as peak value detection; And adopt the RSSI circuit as amplitude detection; Exist circuit complexity higher, therefore the shortcoming that need to cooperate multistage limiting amplifier and multistage rectifier and logarithmic amplifier to realize is only limited to during minority such as digital TV tuner uses.For the high-frequency wideband signal, the two-way peak detection circuit of realizing under the CMOS technology can't reach degree of precision, influenced greatly by process deviation.

The zero-if architecture RF front-end circuit is compared the problem that does not exist mirror image to disturb with the Low Medium Frequency structure, and for the same band signal, high frequency 3dB cut-off frequency is littler, and power consumption consumption is lower.Zero-if architecture becomes widely used receiver structure in recent years, especially in the broadband reception field.Yet; A critical defect of zero-if architecture is the influence that has DC maladjustment, and the static direct current imbalance meeting that factors such as the dynamic DC maladjustment that produces from circuit such as frequency mixers and mismatch cause adds up at signal link step by step, and controls amplifying stage at automatic gain and be exaggerated; Cause the dc point drift; Thereby make amplifier distortion even saturated, influence receptivity, therefore need carry out DC maladjustment and eliminate.

6 kinds of frame modes such as DC maladjustment commonly used is at present eliminated has AC coupled, imbalance storage, copped wave, figure adjustment, parallel elimination, negative feedback, negative feedback structure is a DC maladjustment cancellation the most commonly used at present.People such as Francesco Gatta are at IEEE Journal of Solid-State Circuits; 2004: people such as " A Fully Integrated 0.18-μ m CMOS Direct Conversion Receiver Front-End With On-Chip LO for UMTS " paper of delivering and Kim Ji-Hun are at ICACT; 2006: " A CMOS Variable Gain Amplifier with Wide Dynamic Range and Accurate dB-Linear Characteristic " paper of delivering; The integrator feedback DC maladjustment that proposes is eliminated structure; Only adopt one tunnel negative feedback; Therefore when variable gain amplifier was operated in high gain state, the high pass corner frequency was bigger, and the low frequency signal loss amount is excessive; Be not suitable for the application scenario of high-gain and HDR or increase integrating capacitor, then can expend bigger chip area in order to realize low high pass corner frequency.People such as Lee Hui Dong are at IEEE Transactions on Microwave Theory and Techniques; 2007: " A Wideband CMOS Variable Gain Amplifier With an Exponential Gain Control " paper of delivering; And publication number CN101442325; Name is called " amplifier with bandpass filtering function " patent; Eliminate and adopt RC LPF mode in the structure, between integrated level and low frequency signal loss amount, have contradiction as negative feedback mode.People such as Wang Yan Jie are at 2008 IEEE Radio Frequency Integrated Circuits Symposium; 2008: the on-chip active high resistant implementation that " A 2.5mW Inductorless Wideband VGA with Dual Feedback DC-Offset Correction in 90nm CMOS Technology " paper of delivering proposes is only limited to 90nm and following technology thereof, has big limitation.

Summary of the invention

The present invention seeks to propose a kind of automatic gain control amplifier of eliminating DC maladjustment, use comparison circuit and charge pump to produce the automatic gain control structure of control voltage in order to overcome the defective of prior art.It is little that this structure is influenced by process deviation, can accurately detect the amplitude of high frequency or broadband signal, and the DC maladjustment that is used to realize to have high integration is eliminated the automatic gain control of function.The present invention seeks to realize through following technical scheme:

A kind of automatic gain control amplifier of eliminating DC maladjustment, it is that it amplifies link 21, automatic gain Control and Feedback loop 22 by cascade and eliminates DC maladjustment feedback loop 23 and form;

Said cascade is amplified link 21 and is comprised the input stage 201 that two road ports are connected in series successively, multistage variable gain amplifier unit 202 and output stage 203;

Said automatic gain Control and Feedback loop 22 comprises comparison circuit 204,2 outputs or the door 205 that is connected in series successively, charge pump 206 and V-I change-over circuit 207;

Said elimination DC maladjustment feedback loop 23 comprises the first integral device 208 that two road ports are connected in series successively, mutual conductance amplifying unit Gm 209 and second integral device 210;

Input stage 201 is the subtraction amplification circuit unit, and the electrode input end of its two-way input connects signal input part V _INPWith the positive feedback signal output of eliminating the DC maladjustment feedback loop, the negative input of input stage 201 its two-way inputs connects signal input part V _INNWith the negative-feedback signal output of eliminating the DC maladjustment feedback loop, the amplification input signal and the negative-feedback signal of two-way input are realized subtraction process in input stage 201 respectively simultaneously.The two-way output of input stage 201 connects the input of multi-stage cascade variable gain amplifier unit, realizes the amplification of high-gain dynamic range; The corresponding two-way input that connects output stage 203 of two-way output of the variable gain amplifier unit of link (21) is amplified in cascade; Output stage is a buffer, corresponding automatic gain Control and Feedback loop 22 and the two-way input of eliminating DC maladjustment feedback loop 23 of connecting of the two-way output of output stage;

The output of V-I change-over circuit 207 connects every grade of control end that multistage variable gain amplifier unit 202 in the link 21 is amplified in cascade, the overall gain on control cascade amplifier chain road; Said comparison circuit 204 is the fully differential comparison circuit of 2 complementations, and 2 comparison circuit input polarity are opposite; Each comparison circuit has two road inputs, one tunnel input termination output stage buffer, 203 outputs, and another road input all connects the benchmark comparative level; The two-way output connection of comparison circuit 204 or 2 inputs of door 205; Or 2 outputs of door 205 connect the current supply switch up and down of charge pump 206; Or door 205 generates the digital logic signal of 2 complementations; The control charge pump discharges and recharges, charge pump 206 output termination V-I change-over circuits 207, and the output of V-I change-over circuit 207 connects every grade of control end of multistage variable gain amplifier unit 202; V-I change-over circuit 207 will be controlled the Control current that voltage transitions is variable gain amplifier unit 202, realize the control to gain.

Eliminating DC maladjustment feedback loop 23 has two feedback loops, and each feedback loop has the two-way input and output; Multistage variable gain amplifying unit 202 is divided into two parts cascade variable gain amplifier and intermediate contact is set for two-way; The output of output stage buffer 203 connects the input of first integral device 208; The output of first integral device 208 connects mutual conductance amplifying unit 209; Mutual conductance amplifying unit 209 converts first integral device 208 output voltages into negative feedback current; The output of mutual conductance amplifying unit 209 is connected to the intermediate contact of multistage variable gain amplifying unit 202, constitutes to eliminate DC maladjustment first feedback loop amplifier's gain of cascade behind the realization negative feedback control intermediate contact; The multistage variable gain amplifying unit 202 of cascade connects the input of first integral device 208 through the output of output stage 203; Cascade variable gain amplifier output before multistage variable gain amplifying unit 202 intermediate contacts connects the input of second integral device 210; The output of second integral device 210 connects the input of input stage 201 subtraction amplification circuits; Constitute and eliminate DC maladjustment second feedback loop, realize the gain of negative feedback control multistage variable gain amplifying unit.

Eliminate the output of DC maladjustment second feedback loop by the corresponding two-way input that connects input stage 201 of second integral device 210 two-way outputs, realize the negative feedback gain control function, the gain of control multistage variable gain amplifying unit 202.Eliminate the two-way output corresponding two-way intermediate contact that be connected to multistage variable gain amplifier unit 202 of DC maladjustment first feedback loop output by mutual conductance amplifying unit 209; Mutual conductance amplifying unit 209 converts first integral device 208 two output voltage into negative feedback current; Load through the contact prime realizes voltage gain, realizes the negative feedback gain control function.

The integrator input resistance utilizes PMOS pipe source to leak equivalent resistance and realizes; This gate pmos is wide long much smaller than grid; The bias PMOS Guan Weiqi that is connected by another diode mode provides grid source bias voltage; Unity gain amplifier guarantees that the PMOS pipe and the bias PMOS pipe source voltage of equivalent resistance equate that the PTAT electric current is used to compensate the equivalent resistance temperature deviation for the bias PMOS pipe provides bias current.

Described a kind of automatic gain control amplifier of eliminating DC maladjustment, it is that said output stage 201 is buffer, it is the buffer of low gain and big bandwidth, is used to increase back level driving force, reduces the influence of load to bandwidth.

Described a kind of automatic gain control amplifier of eliminating DC maladjustment; It is that said automatic gain Control and Feedback loop 22 is for adopting the automative interest increasing controlling circuit of charge pump construction; Charge pump is through the gain of the output current control multistage variable gain amplifying unit 202 of V-I change-over circuit 207; Make charge pump control voltage and variable gain amplifier gain be the dB-Linear relation, to realize that automative interest increasing controlling circuit has fixing frequency domain and time-domain response characteristic.Feedback control loop has the regular time constant, to the input signal of different changes in amplitude, and the stabilization time that output has approximate fixed value.

Described a kind of automatic gain control amplifier of eliminating DC maladjustment; It is that said elimination DC maladjustment feedback loop 23 is two-way elimination DC maladjustment feedback negative feedback loop line structure; All comprise two variable gain amplifier unit, an integrator in the feedback loop of every road; The first via is eliminated in the DC maladjustment feedback loop and is also comprised a transconductance cell, also comprises an adder circuit in the second tunnel elimination DC maladjustment feedback loop, is used for the control loop gain and realizes the control to the high pass corner frequency; Increase loop gain and avoided the high pass corner frequency too high, thereby obtained less low frequency signal loss.

Described a kind of automatic gain control amplifier of eliminating DC maladjustment; It is that first via elimination DC maladjustment feedback control loop adopts mutual conductance amplifying unit 209 to realize negative feedbacks, belongs to the load of the output loading of variable gain amplifying stage as transconductance cell 209 with multistage variable gain amplifying unit 202 intermediate contacts.

Described a kind of automatic gain control amplifier of eliminating DC maladjustment is characterized in that, the second tunnel eliminates the DC maladjustment feedback loop adopts subtraction circuit to realize negative feedback, and gain around feedback does not receive the influence of front stage circuits load.

Described a kind of automatic gain control amplifier of eliminating DC maladjustment; Its mutual conductance amplifying unit 209 that is said elimination DC maladjustment feedback loop 23 is simple differential pair transconductance structure; Differential pair adopts the tail current biasing; Mutual conductance amplifying unit 209 adopts simple differential pair but not subtraction circuit is realized, has reduced elimination DC maladjustment feedback loop circuitry complexity.

Described a kind of automatic gain control amplifier of eliminating DC maladjustment; It is that integrator 208 and 210 input resistance in the said elimination DC maladjustment feedback loop are the on-chip active high resistant; Active high resistant adopts the PTAT current source that is proportional to absolute temperature that bias current is provided; Be used to realize temperature-compensating, thus the deviation of the closed loop high pass corner frequency that reduces to cause because of variations in temperature.

Described a kind of automatic gain control amplifier of eliminating DC maladjustment; It is that the first integral device 208 in the said elimination DC maladjustment feedback loop is a pair of fully differential integrator with second integral device 210; Adopt passive device on the full sheet, be used to reduce chip area and realize high integration.

Described a kind of automatic gain control amplifier of eliminating DC maladjustment; It is that said elimination DC maladjustment feedback loop 23 adopts the integrator of high resistant on the input brace to eliminate circuit as degenerative high-pass filtering DC maladjustment; The high pass corner frequency does not increase with feedback loop gain F and becomes big; And misalignment rate is attenuated F doubly, has realized high-performance direct current imbalance elimination.

The automatic gain control amplifier of eliminating DC maladjustment amplifies link, automatic gain Control and Feedback loop and elimination DC maladjustment feedback loop by cascade and constitutes; Wherein

Said elimination DC maladjustment feedback loop adopts two-way integrator negative feedback loop to realize the DC maladjustment elimination.First via DC maladjustment cancellation loop comprises subtraction amplification circuit, and two-level concatenation variable gain amplifying unit and integrator are realized the voltage negative feedback through subtraction circuit; The second road DC maladjustment cancellation loop comprises two-level concatenation variable gain amplifying unit, the output stage buffer, and integrator and transconductance cell realize Current Negative Three-Point Capacitance through transconductance cell.

The integrator input resistance of said integrator negative feedback loop adopts active device to realize high resistant on the sheet, and the high value of the Miller effect of integrating capacitor and input resistance has reduced the influence of high pass corner frequency in the integrator.Utilize unit gain follower and offset much smaller than the long metal-oxide-semiconductor of the same type of grid the biasing of grid source to be provided for grid width; Thereby make the metal-oxide-semiconductor that is operated in sub-threshold region that M Ω level equivalent resistance can be provided; And the dc bias current of offset is the PTAT electric current, makes equivalent resistance have temperature compensation characteristic.Amplify link and adopt the cascade of multistage variable gain amplifying unit, can realize high-gain and high-gain dynamic range; Charge pump construction is adopted in automatic gain Control and Feedback loop, compares the conventional peak detection architecture, have technology, temperature deviation influence little, accurately detect arrowband and broadband signal amplitude, be suitable for the advantage that CMOS technology realizes; Eliminate the DC maladjustment feedback loop and realized by the two-way negative feedback, every road adopts integrator as the low pass negative feedback; The integrator input resistance adopts active device to realize, and equivalent resistance has temperature compensation characteristic; This DC maladjustment is eliminated the DC maladjustment and the DC maladjustment amount of amplifying link self that structure can effectively be eliminated the front stage circuits stack; Has lower high pass corner frequency; The low frequency signal loss amount is little, need not the passive device of outer high value resistor of sheet or electric capacity, has very high integrated level.

Substantial effect of the present invention is:

1, the automative interest increasing controlling circuit of high speed comparison circuit and charge pump composition can accurately detect high frequency or broadband signal amplitude; And receive factor affecting such as process deviation little; Simple in structure; And overcome prior art for realizing that hanging down the high pass corner frequency increases integrating capacitor, expends the defective of bigger chip area.

2, eliminate the DC maladjustment feedback loop and adopt the two-stage feedback loop; Can gain by active control loop; Reduce the influence of gain dynamic range to closed loop characteristic; Especially to the influence of high pass corner frequency, overcome prior art and eliminated the negative feedback mode that the DC maladjustment structure adopts the RC LPF, between integrated level and low frequency signal loss amount, had the defective of contradiction.

3, the Miller effect of see-saw circuit in the integrator, feedback capacity C enlarges 1+A _{V, DC}Doubly, the high value of integrator input resistance has reduced the influence of high pass corner frequency, and has had temperature compensation characteristic.

4, the implementation of on-chip active high resistant has improved chip integration.Charge pump construction is adopted in automatic gain Control and Feedback loop; Compare the conventional peak detection architecture; Have the influence of technology, temperature deviation little, accurately detect arrowband and broadband signal amplitude, be suitable for the advantage that CMOS technology realizes; The on-chip active high resistant is common to the CMOS technology of various characteristic sizes, has bigger practicality.

5, automatic gain control amplifier of the present invention is suitable for the wireless communication receiver of zero-if architecture under the CMOS technology.

Description of drawings

Fig. 1 is the automatic gain control amplifier block diagram that DC maladjustment is eliminated function that has of existing common technology.Cascade is amplified link, automatic gain Control and Feedback loop and is eliminated the DC maladjustment feedback loop

Fig. 2 a is a kind of automatic gain control amplifier structured flowchart of eliminating DC maladjustment of the present invention.

Fig. 2 b is the automatic gain control amplifier circuit structure block diagram that DC maladjustment is eliminated the high integration of function that has of embodiment of the invention monolithic.

Fig. 3 is the mutual conductance amplifying unit circuit principle of compositionality figure of the elimination DC maladjustment feedback loop of the embodiment of the invention;

Among Fig. 3, the 301-NMOS input difference is right, the 302-current source.

Fig. 4 is the active high resistant circuit diagram of the integrator input resistance of embodiment of the invention realization;

Among Fig. 4: 4-on-chip active high resistant, 41-resistance, 42-offset, 43-follower, 44-current mirror, 45-PTAT current source.

Fig. 5 adopts the linear model block diagram in the automatic gain Control and Feedback loop of charge pump construction for the embodiment of the invention;

Among Fig. 5: 501-input stage transformation model; The linear model of 502-multistage variable gain amplifying unit, 503-output stage transformation model, 504-comparison circuit; The linear model of 505-OR circuit; The linear model of 506-charge pump, the linear model of 507-V-I translation circuit, the logarithmic form of 508-charge pump control voltage.

Fig. 6 is general elimination negative feedback DC maladjustment structural model block diagram;

Among Fig. 6: 601-first order variable gain amplifying unit, 602-second level variable gain amplifying unit, 60N-N level variable gain amplifying unit; Output stage; 611-input stage adder circuit, 612-second level adder circuit, 61N-N level adder circuit; The 621-integrator, 622-negative feedback loop adder circuit.

Fig. 7 is for eliminating the single-ended model framework chart of integrator in the DC maladjustment negative feedback loop among the present invention;

Among Fig. 7: 701-operational amplifier, 702-capacitor C, 703-resistance R.

Fig. 8 a is the preceding characteristic sketch map of high resistant temperature-compensating on its input chip of integrator of the present invention's realization.

Characteristic sketch map after the high resistant temperature-compensating on its input chip of integrator that Fig. 8 b realizes for the present invention.

Embodiment

Fig. 1 is the automatic gain control amplifier block diagram that DC maladjustment is eliminated function that has of existing common technology.Its imbalance elimination feedback circuit is made up of transconductance cell Gm and capacitance-resistance filter, and the AGC feedback circuit is made up of peak detector, transconductance cell Gm, integrating capacitor and V-I change-over circuit.There is drawback in the automatic gain control amplifier with DC maladjustment elimination function of prior art: it is little that DC maladjustment is eliminated the feedback loop DC current gain; Therefore the high pass corner frequency is higher; And the integrated level that capacitance-resistance filter is difficult on the full sheet again requires to realize down less lowpass frequency; Therefore the closed loop high pass corner frequency of entire circuit is higher, and the low frequency signal loss amount is big.

The present invention proposes a kind of automatic gain control amplifier of eliminating DC maladjustment; Use comparator and charge pump to produce the automatic gain control structure of control voltage; It is little that this automatic gain control structure is influenced by process deviation; Can accurately detect the amplitude of high frequency or broadband signal, the DC maladjustment that is used to realize to have high integration is eliminated the automatic gain control of function.

Below in conjunction with accompanying drawing and embodiment technical scheme of the present invention is further described.

Fig. 2 a is a kind of automatic gain control amplifier structured flowchart of eliminating DC maladjustment of the present invention.This is a kind of automatic gain control amplifier circuit module that DC maladjustment is eliminated function that has; It comprises that the cascade that is made up of input stage 201, multistage variable gain amplifying unit 202 and output stage 203 amplifies link 21, automatic gain Control and Feedback loop of being made up of comparison circuit 204 or door 205, charge pump 206 and V-I change-over circuit 207 22 and the elimination DC maladjustment feedback loop 23 that is made up of first integral device 208, mutual conductance amplifying unit 209 and second integral device 210.

Fig. 2 b is a kind of automatic gain control amplifier circuit structure diagram of eliminating DC maladjustment of embodiment of the invention monolithic, and this is a kind of automatic gain control amplifier circuit monolithic module that DC maladjustment is eliminated function that has of high integration.The cascade of present embodiment is amplified link 24 and is adopted the level Four cascade to amplify, and it is made up of the subtraction amplifying unit 241 of input stage, the variable gain amplifying unit 242～245 of level Four cascade and the buffer 246 of output stage.Automatic gain Control and Feedback loop 25 by two comparators 251 and 252 or door 253, charge pump 254 and V-I change-over circuit 255 constitute.Eliminating the second integral device 263 of high resistant 266 in the DC maladjustment feedback loop 26 first integral devices 261 by high resistant 264 in the two input contact pin and 265, mutual conductance amplification Gm unit 262 and the two input contact pin and 267 forms.Cascade is amplified in the link 24; The two-way output of subtraction amplification circuit 241 connects the two-way input of first order variable gain amplifying unit 242; Subtraction amplifying unit 241 is connected in series with the two-way successively of level Four variable gain amplifying unit 242～245 and output buffer stage 246, constitutes cascade and amplifies link.Level Four variable gain amplifying unit intermediate contact A eliminates the output that GM is amplified in the dc feedback loop mutual conductance with corresponding connection of B.In the automatic gain Control and Feedback loop 25, comparator 251 is connected with 252 output or the input of door 253, or the output of door 253 connects the K switch 1 and the K2 of charge pump 254, and the output of charge pump 254 connects the input of V-I change-over circuit 255.Eliminate in the DC maladjustment feedback loop 26; High resistant 264 and 265 in the two input contact pin of first integral device 261; Two outputs of integrator 261 connect the two-way input that Gm level 262 is amplified in mutual conductance, and two-way output high resistant 266 on respective flap of mutual conductance amplification Gm level 262 is connected the two-way input of second integral device 263 with 267.

The subtraction amplification circuit 241 that link 24 input stages are amplified in cascade has four inputs of one tunnel in twos, and two inputs of one tunnel connect input signal end V _INPAnd V _INN, corresponding two feedback output ends eliminating DC maladjustment feedback loop 26 second integral devices that connect of two inputs on another road.Cascade amplifies link 24 positive and negative two-way outputs and is connected to comparator 251 at a high speed separately ++ input and 252+-input, 252 ++ input and 251+-input, comparator 251 with 252-+import termination one roadbed accurate level V _REFP, comparator 251 and 252--the accurate level V of input termination another roadbed _REFNComparator 251 is connected with 252 output or the two-way input of door 253, or the output of the two-way of door 253 connects the two-way input of charge pump 254, the discharging and recharging of two-way complementary control signal control charge pump 254 electric capacity; Charge pump 254 outputs connect V-I change-over circuit 255 inputs; 255 outputs connect the control end of variable gain amplifying unit 242～245, constitute automatic gain Control and Feedback loop, carry out gain-adjusted.Variable gain amplifying unit 243+,-input resistance 266 of output and second integral device 263 is connected with an end of 267; Second integral device 263-,+output connects subtraction amplifying unit 241 separately--input ,+-input, constitute the first via and eliminate the DC maladjustment feedback loop.Output stage buffer 246+,-output connects the input resistance 264 of first integral device 261 and an end of 265; The two-way output of first integral device 261 connects the two-way input of mutual conductance amplifying unit 262; The output of the two-way of mutual conductance amplifying unit 262 connect separately variable gain amplifying unit 244+,-input, constitute the second the tunnel and eliminate the DC maladjustment feedback loop.The automatic gain control amplifier circuit of eliminating DC maladjustment is a fully differential form circuit structure, output buffer stage 246+,-output is the two-way output V that eliminates the automatic gain control amplifier of DC maladjustment _OUTPAnd V _OUTN

The mutual conductance amplifying unit circuit of the embodiment of the invention is as shown in Figure 3, and 301 is that the NMOS input difference is right, and current source 302 provides the tail current biasing for differential pair, and this circuit changes the input difference voltage signal into the output differential current signal.

Fig. 4 is an integrator input resistance implementation circuit structure diagram of the present invention.Wherein, it is long much smaller than grid that PMOS manages 41 grid width, and big channel resistance can be provided, and 42 is the offset of diode type of attachment, for PMOS pipe 41 provides grid source bias voltage.43 is the unit gain follower; Unit gain follower 43 provides equal source voltage for PMOS pipe 41 with offset 42; Current source 45 is the PTAT current source, for offset 42 bias current is provided through current mirror 44, thereby is that the equivalent source ohmic leakage of 41 pipes carries out temperature-compensating.When PMOS pipe 41 is operated in sub-threshold region among Fig. 4, its equivalent resistance R _EqBe directly proportional with (L/W), the grid width W of PMOS pipe 41＜＜grid width L, so equivalent resistance is very big, has realized the on-chip active high resistant.After introducing the PTAT current source, the adjusted design parameter makes equivalent resistance and temperature positive correlation coefficient and negative correlation coefficient basic neutralisation, realization equivalent resistance R _EqRealize temperature-compensating.

Fig. 5 adopts the linear model framework chart in automatic gain Control and Feedback loop of charge pump construction for the embodiment of the invention.Be the logarithmic form of signal in the frame; The multiplication and division operation becomes the reducing that adds of logarithmic form, and 502 is the variable gain amplifier model, 501 logarithmic transformations for input stage realization signal; 503 logarithmic transformations for output stage realization signal; 507 and 508 logarithmic transformations for V-I conversion and control voltage signal, 504 is comparison circuit, 505 is that OR circuit and 506 is the linear model of charge pump.V _REFBe reference level, A _INBe input signal amplitude, A _OUTBe amplitude output signal, x (t) is input signal amplitude A _INLogarithmic form, y (t) is amplitude output signal A _OUTLogarithmic form, z is the logarithmic form of reference level, d is that the amplitude output signal variable is to reference level V _REFLogarithmic form.Charge pump is through the gain of the output current control multistage variable gain amplifying unit of V-I change-over circuit; Make charge pump control voltage and variable gain amplifier gain be the dB-Linear relation, to realize that automative interest increasing controlling circuit has fixing frequency domain and time-domain response characteristic.

Further specify the specific embodiments of automatic gain control in conjunction with Fig. 2 a, Fig. 2 b and Fig. 5.

Shown in Fig. 2 b, when cascade is amplified the link amplitude output signal greater than reference level V _REFThe time, comparator 251 and 252 through or the control signal of door 253 outputs make charge pump 254 discharge, the control voltage of V-I change-over circuit 255 outputs reduces, and the gain of variable gain amplifying unit is descended, amplitude output signal reduces up to less than reference level.Otherwise, less than reference level V _REFThe time, the control signal of comparator 251 and 252 warps or door 253 outputs is then to the charge pump charging, and the control voltage rising of V-I change-over circuit 255 outputs increases the gain of variable gain amplifying unit, and amplitude output signal increases.When the output signal reached certain amplitude, charging voltage equated with discharge voltage in the one-period, and the control voltage total variation of charge pump output is 0, and the gain that makes cascade amplify link reaches stable state.

According to the time domain differential expressions of the controlled voltage of top said design,

$\frac{{\mathrm{dV}}_c\left(t\right)}{\mathrm{dt}}\≈\frac{k_{v}I}{2\mathrm{\π}{C}_p}\{k_{v1}{e}^{\ln \left(\frac{V_{\mathrm{REF}}}{k_{v1}}\right)}-k_{v2}\ln [\frac{A_{\mathrm{OUT}}\left(t\right)}{k_{v1}}\left]\right\}$

In the formula, V _cBe the control voltage of charge pump output, C _pBe the charge pump charge and discharge capacitance, I is the charge pump charging current, k _v, k _V1And k _V2Be conversion coefficient.

Linear model according to following formula is set up is as shown in Figure 5.Can obtain gaining when satisfying dB-Linear and being linear relationship when control voltage and variable gain amplifying unit, automatic gain Control and Feedback loop has fixed time-domain and frequency domain response characteristic.Loop time constant τ does

$\mathrm{\τ}={\left[\frac{1}{G\left(V_C\right)}\frac{\mathrm{dG}}{{\mathrm{dV}}_C}\frac{k_{v}I}{2\mathrm{\πC}}{V}_{\mathrm{REF}}\right]}^{-1}=\frac{2\mathrm{\πC}}{k_{G1}{k}_v{\mathrm{IV}}_{\mathrm{REF}}}$

C is a charge pump charge and discharge capacitance value in the formula, and I is a charging current value, k _vAnd k _G1Be fixed coefficient with the physical circuit parameter correlation.The loop time constant τ that calculates is also for being stationary value.

Fig. 6 is the linear model block diagram of negative feedback DC maladjustment elimination circuit, and N is a variable gain amplifying unit progression, G _iBe i level variable gain amplifying unit, V _OsiThe misalignment rate of representing introducings at different levels, V _{OS, pre}The imbalance that the expression prime adds up, F representes feedback loop gain, ω _LCFExpression feedback loop low-pass cut-off frequencies.Fig. 6 eliminates the multistage variable gain amplifying unit block diagram of structure for adopting the negative feedback DC maladjustment, can obtain exporting signal expression and do

$V_{\mathrm{out}}\left(s\right)=V_{\mathrm{in}}\left(s\right)\frac{1}{\mathrm{<figure-callout\; id="1"\; label="F"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">F</figure-callout>}}\frac{1+\frac{S}{\mathrm{\&omega;}}}{1+\frac{S}{{\mathrm{\&omega;}}_{\mathrm{HCF}}}}+(V_{\mathrm{OSpre}}+V_{\mathrm{OS}1})\frac{1}{\mathrm{<figure-callout\; id="1"\; label="F"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">F</figure-callout>}}\frac{1+\frac{S}{{\mathrm{\&omega;}}_{\mathrm{<figure-callout\; id="1"\; label="LCF"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">LCF</figure-callout>}}}}{1+\frac{S}{{\mathrm{\&omega;}}_{\mathrm{HCF}}}}+V_{\mathrm{OS}2}\frac{1}{{\mathrm{<figure-callout\; id="1"\; label="FG"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">FG</figure-callout>}}_1}\frac{1+\frac{S}{{\mathrm{\&omega;}}_{\mathrm{<figure-callout\; id="1"\; label="LCF"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">LCF</figure-callout>}}}}{1+\frac{S}{{\mathrm{\&omega;}}_{\mathrm{HCF}}}}+\&CenterDot;\&CenterDot;\&CenterDot;$

$+V_{\mathrm{OSN}}\frac{1}{F\underset{i=1}{\overset{\mathrm{<figure-callout\; id="1"\; label="N\; G\; i"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">N</figure-callout>}}{\mathrm{\&Pi;}}}{G}_i{}_{}}\frac{1+\frac{S}{{\mathrm{\&omega;}}_{\mathrm{<figure-callout\; id="1"\; label="LCF"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">LCF</figure-callout>}}}}{1+\frac{S}{{\mathrm{\&omega;}}_{\mathrm{HCF}}}}+V_{\mathrm{OSF}}$

$=V_{\mathrm{in}}\left(s\right)\frac{1}{\mathrm{<figure-callout\; id="1"\; label="F"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">F</figure-callout>}}\frac{1+\frac{S}{{\mathrm{\&omega;}}_{\mathrm{<figure-callout\; id="1"\; label="LCF"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">LCF</figure-callout>}}}}{1+\frac{S}{{\mathrm{\&omega;}}_{\mathrm{HCF}}}}+(V_{\mathrm{OSpre}}+V_{\mathrm{OS}1})\frac{1}{F}+V_{\mathrm{OS}2}\frac{1}{{\mathrm{<figure-callout\; id="1"\; label="FG"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">FG</figure-callout>}}_1}+\&CenterDot;\&CenterDot;\&CenterDot;+V_{\mathrm{OSN}}\frac{1}{F\underset{i=1}{\overset{N}{\mathrm{\&Pi;}}}{G}_i}+V_{\mathrm{OSF}}$

Output comprises three parts: the signal component of high pass form, and through the misalignment rates at different levels of overdamping and the misalignment rate of negative feedback loop introducing.Exert an influence because the feedback of low-pass form is not amplified link bandwidth to cascade, therefore the imbalance of feedback introducing can be eliminated through increasing differential pair area mode, can ignore.And maximum misalignment rate does in the output

$V_{\mathrm{OS},d}=(V_{\mathrm{OSpre}}+V_{\mathrm{OS}1})\frac{1}{F}+V_{\mathrm{OS}2}\frac{1}{{\mathrm{<figure-callout\; id="1"\; label="FG"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">FG</figure-callout>}}_1}+\&CenterDot;\&CenterDot;\&CenterDot;+V_{\mathrm{OSN}}\frac{1}{F\underset{i=1}{\overset{N}{\mathrm{\&Pi;}}}{G}_i}$

The high pass corner frequency does

ω _HCF＝ω _LCF[1+(G ₁G ₂…G _n)F]

Therefore feedback loop gain F is big more, and it is strong more that DC maladjustment is eliminated performance, and the high pass corner frequency is big more, and the low frequency signal loss amount is big more, and the receiver error rate increases.The present invention adopts integrator as the negative feedback loop circuit, can solve this contradiction.

Fig. 7 is the integrator structure block diagram.Fig. 7 has provided the single-ended model framework chart of embodiment integrator in the elimination DC maladjustment negative feedback loop of the present invention, among Fig. 7: A _{V, DC}The DC current gain of operational amplifier 701 in the-integrator, ω _Op-amplifier dominant pole angular frequency, S=j ω, expression frequency-region signal.Miller effect in the anti-phase operational amplification circuit of integrator, distribution between feedback capacity C and input and the output or parasitic capacitance are through the amplification of amplifier, and its equivalence enlarges 1+A to the capacitance of input _{V, DC}Doubly, chip occupying area is little.The integrator input inserts the integrating resistor R of on-chip active high resistant; Just can realize temperature-compensating; Thereby the deviation of the closed loop high pass corner frequency that reduces to cause because of variations in temperature; The generation substantial effect is: the high value of the Miller effect of integrating capacitor and input integral resistance in the integrator has reduced the influence of high pass corner frequency, and has had temperature compensation characteristic.

Fig. 7 has provided the single-ended model structure block diagram of integrator in the elimination DC maladjustment negative feedback loop of the present invention.The transfer function H of integrator shown in Figure 7 (S) does

$H\left(s\right)=\left|\frac{v_{\mathrm{out}}\left(s\right)}{v_{\mathrm{in}}\left(s\right)}\right|=A_{V,\mathrm{<figure-callout\; id="1"\; label="DC"\; filenames="HSA00000527175300031.png,HSA00000527175300052.png"\; state="\{\{state\}\}">DC</figure-callout>}}\frac{1}{1+[\frac{1}{{\mathrm{\&omega;}}_{\mathrm{op}}}+(1+A_{V,\mathrm{DC}})\frac{1}{{\mathrm{\&omega;}}_{\mathrm{int}}}]s+\left(\frac{1}{{\mathrm{\&omega;}}_{\mathrm{op}}{\mathrm{\&omega;}}_{\mathrm{int}}}\right)s^2}=A_{V,\mathrm{DC}}\frac{1}{(1+\frac{S}{{\mathrm{\&omega;}}_H})(1+\frac{S}{{\mathrm{\&omega;}}_L})}$

Wherein, ω _H, ω _LBe respectively the angular frequency of integrator dominant pole and time limit, ω _IntBe the low pass corner frequency of integrating resistor R and capacitor C formation, ω _H≈ (1+A _{V, DC}) ω _Op,

This moment, the DC current gain of integrator was A _{V, DC}, the feedback loop gain in the corresponding diagram 6 is F.In view of operational amplifier DC current gain value is very big, integrator time limit can be ignored.Adopt integrator as the component parts of eliminating DC maladjustment feedback loop feedback loop, at this moment high pass corner frequency ω _{HCF, eq}For:

${\mathrm{\&omega;}}_{\mathrm{HCF},\mathrm{eq}}\&ap;{\mathrm{\&omega;}}_{\mathrm{LCF},\mathrm{eq}}[1+(G_1{G}_2\&CenterDot;\&CenterDot;\&CenterDot;G_n)F]=\frac{{\mathrm{\&omega;}}_{\mathrm{LCF}}}{A_{V,\mathrm{DC}}}[1+(G_1{G}_2\&CenterDot;\&CenterDot;\&CenterDot;G_n)A_{V,\mathrm{DC}}]\&ap;{\mathrm{\&omega;}}_{\mathrm{LCF}}(G_1{G}_2\&CenterDot;\&CenterDot;\&CenterDot;G_n)$

Can know high pass corner frequency ω from following formula _{HCF, eq}Do not increase and become big, and misalignment rate is attenuated F doubly, realizes the high performance DC maladjustment of automatic gain control amplifier is eliminated with feedback loop gain F.

The resistance of integrator input resistance and closed loop high pass corner frequency are inverse ratio, and therefore, the integrator input resistance adopts high resistant realization on the sheet, can reduce the high pass corner frequency, thereby reduce the low frequency signal loss amount, has improved integrated level simultaneously.

Fig. 8 a and Fig. 8 b have provided the correlation curve that the integrator input resistance has simulation result under temperature-compensating and the not temperature compensated condition.Simulation result shows from Fig. 8 a and Fig. 8 b, and the temperature-compensating that technical scheme of the present invention realizes makes the resistance deviation be reduced in 5% by 15%～20%.Obviously, reduced the influence of high pass corner frequency.

Automatic gain control amplifier of the present invention is suitable for the wireless communication receiver of zero-if architecture under the CMOS technology.

It will be understood by those skilled in the art that and under the prerequisite that does not deviate from broad scope of the present invention, the foregoing description is made some changes.Thereby the present invention is not limited in disclosed specific embodiment.Its scope should contain core of the present invention and the interior all changes of protection range that appended claims limits.

Claims (10)

1. an automatic gain control amplifier of eliminating DC maladjustment is characterized in that, it amplifies link (21), automatic gain Control and Feedback loop (22) by cascade and eliminates DC maladjustment feedback loop (23) and form;

Said cascade is amplified link (21) and is comprised the input stage (201) that two road ports are connected in series successively, multistage variable gain amplifier unit (202) and output stage (203);

Said automatic gain Control and Feedback loop (2) comprises the comparison circuit (204) that is connected in series successively, 2 outputs or door (205), charge pump (206) and V-I change-over circuit (207);

Said elimination DC maladjustment feedback loop 23 comprises the first integral device (208) that two road ports are connected in series successively, mutual conductance amplifying unit Gm (209) and second integral device (210);

Input stage (201) is the subtraction amplification circuit unit, and the electrode input end of its two-way input connects signal input part V _INPWith the positive feedback signal output of eliminating the DC maladjustment feedback loop, the negative input of its two-way input of input stage (201) connects signal input part V _INNWith the negative-feedback signal output of eliminating the DC maladjustment feedback loop; The input signal of two-way input and negative-feedback signal; Realize subtraction process in input stage (201); The input of the connection multi-stage cascade variable gain amplifier unit of input stage (201) two-way output is realized the amplification of high-gain dynamic range; The corresponding two-way input that connects output stage (203) of two-way output of the variable gain amplifier unit of link (21) is amplified in cascade, the corresponding two-way input that connects automatic gain Control and Feedback loop (22) and eliminate DC maladjustment feedback loop (23) of the two-way output of output stage;

The output of V-I change-over circuit (207) connects every grade of control end that the multistage variable gain amplifier unit (202) in the link (21) is amplified in cascade, the overall gain on control cascade amplifier chain road; Said comparison circuit (204) is the fully differential comparison circuit of 2 complementations, and 2 comparison circuit input polarity are opposite; Each comparison circuit one tunnel input termination output stage buffer (203) output, another road input all connects the benchmark comparative level; The output of V-I change-over circuit (207) connects every grade of control end of multistage variable gain amplifier unit (202); V-I change-over circuit (207) will be controlled the Control current that voltage transitions is variable gain amplifier unit (202), realize the control to gain;

Eliminating DC maladjustment feedback loop (23) has two feedback loops, and each feedback loop has the two-way input and output; Multistage variable gain amplifying unit (202) is divided into two parts cascade variable gain amplifier and intermediate contact is set for two-way; The output of output stage buffer (203) connects the input of first integral device; The output of first integral device (208) connects mutual conductance amplifying unit (209); The mutual conductance amplifying unit converts first integral device output voltage into negative feedback current; The output of mutual conductance amplifying unit is connected to the intermediate contact of multistage variable gain amplifying unit (202), constitutes to eliminate DC maladjustment first feedback loop amplifier's gain of cascade behind the realization negative feedback control intermediate contact; The multistage variable gain amplifying unit (202) of cascade connects the input of first integral device (208) through the output of output stage (203); Cascade variable gain amplifier output before multistage variable gain amplifying unit (202) intermediate contact connects the input of second integral device (210); The output of second integral device connects the input of input stage (201) subtraction amplification circuit; Constitute and eliminate DC maladjustment second feedback loop, realize the gain of negative feedback control multistage variable gain amplifying unit;

The integrator input resistance utilizes PMOS pipe source to leak equivalent resistance and realizes; This gate pmos is wide long much smaller than grid; The bias PMOS Guan Weiqi that is connected by another diode mode provides grid source bias voltage; Unity gain amplifier guarantees that the PMOS pipe and the bias PMOS pipe source voltage of equivalent resistance equate that the PTAT electric current is used to compensate the equivalent resistance temperature deviation for the bias PMOS pipe provides bias current.

2. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 1 is characterized in that, said output stage buffer, and it is the buffer of low gain and big bandwidth, is used to increase back level driving force, reduces the influence of load to bandwidth.

3. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 1; It is characterized in that; Said automatic gain Control and Feedback loop is for adopting the automative interest increasing controlling circuit of charge pump construction; Charge pump makes charge pump control voltage and variable gain amplifier gain be the dB-Linear relation, to realize that automative interest increasing controlling circuit has fixing frequency domain and time-domain response characteristic through the gain of the output current control multistage variable gain amplifying unit of V-I change-over circuit.

4. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 1; It is characterized in that; Said elimination DC maladjustment feedback loop is that two-way is eliminated DC maladjustment feedback negative feedback loop line structure; All comprise two variable gain amplifier unit, an integrator in the feedback loop of every road, the first via is eliminated in the DC maladjustment feedback loop and is also comprised a transconductance cell, also comprises an adder circuit in the second tunnel elimination DC maladjustment feedback loop; The two-way feedback loop is used for the control loop gain and realizes the control to the high pass corner frequency, thereby obtains less low frequency signal loss.

5. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 4; It is characterized in that; The first via is eliminated the DC maladjustment feedback loop and is adopted mutual conductance amplifying unit (209) to realize negative feedback, belongs to the load of the output loading of variable gain amplifying stage as transconductance cell (209) with multistage variable gain amplifying unit (202) intermediate contact.

6. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 4; It is characterized in that; Said the second the tunnel eliminates the DC maladjustment feedback loop adopts subtraction circuit to realize negative feedback, and gain around feedback does not receive the influence of front stage circuits load.

7. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 1; It is characterized in that; The mutual conductance amplifying unit (209) of said elimination DC maladjustment feedback loop (23) is simple differential pair transconductance structure; Differential pair adopts the tail current biasing, and mutual conductance amplifying unit (209) adopts simple differential pair but not subtraction circuit is realized, makes elimination DC maladjustment feedback loop circuitry complexity low.

8. according to right 1 described a kind of automatic gain control amplifier of eliminating DC maladjustment; It is characterized in that; Integrator (208) and (210) input resistance in the said elimination DC maladjustment feedback loop (23) are the on-chip active high resistant; Active high resistant adopts the PTAT current source that is proportional to absolute temperature that bias current is provided, and is used to realize temperature-compensating, thus the deviation of the closed loop high pass corner frequency that reduces to cause because of variations in temperature.

9. a kind of automatic gain control amplifier of eliminating DC maladjustment according to claim 1; It is characterized in that; First integral device (208) and second integral device (210) in the said elimination DC maladjustment feedback loop are a pair of fully differential integrator; Adopt passive device on the full sheet, be used to realize chip small size and high integration.

10. according to claim 1 or 4 or 5 or 6 or 8 or 9 described a kind of automatic gain control amplifiers of eliminating DC maladjustment; It is characterized in that; Said elimination DC maladjustment feedback loop (23) adopts the integrator of high resistant on the input brace to eliminate circuit as degenerative high-pass filtering DC maladjustment; The high pass corner frequency does not increase with feedback loop gain F and becomes big, and misalignment rate is attenuated F doubly, has realized high-performance direct current imbalance elimination.

Images