CN109585462A - 一种阵列基板及其制作方法、柔性显示面板、拼接屏 - Google Patents
一种阵列基板及其制作方法、柔性显示面板、拼接屏 Download PDFInfo
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Abstract
本发明涉及显示设备技术领域,公开了一种阵列基板及其制作方法、柔性显示面板、拼接屏,该阵列基板包括柔性衬底基板、形成于柔性衬底基板一侧的多个电镀电极以及薄膜晶体管TFT器件层,柔性衬底基板上形成有与电镀电极一一对应的通孔,通孔内填充有导电材料,柔性衬底基板背离多个电镀电极的一侧形成有与通孔一一对应的绑定电极,每个绑定电极通过通孔内的导电材料与电镀电极电连接。该阵列基板通过电镀电极、导电材料以及绑定电极的设置直接将薄膜晶体管TFT器件层引到柔性基板背离薄膜晶体管TFT器件层的一侧与柔性电路板连接,进而实现极窄边框或者无边框的设计。
Description
技术领域
本发明涉及显示设备技术领域,特别涉及一种阵列基板及其制作方法、柔性显示面板、拼接屏。
背景技术
目前,柔性显示面板的阵列基板包括显示区以及边框区,如图1所示,边框区设置有与显示区的栅极线01以及数据线02一一对应电连接的扇出走线Fanout以及绑定电极,绑定电极与柔性电路板03电连接实现扫描信号以及数据信号的传输。而制作大面积柔性拼接屏需要窄边框的柔性显示面板拼接,边框区的扇出走线Fanout以及绑定电极不利于大面积拼接屏的制作。
基于此,如何实现更窄边框或者无边框的柔性显示产品,是本领域技术人员亟待解决的技术问题。
发明内容
本发明提供了一种阵列基板及其制作方法、柔性显示面板、拼接屏,上述阵列基板可以实现极窄边框或者无边框的设计,进而可以实现大面积的拼接屏的制作。
为达到上述目的,本发明提供以下技术方案:
一种阵列基板,包括柔性衬底基板、形成于所述柔性衬底基板一侧的多个电镀电极以及薄膜晶体管TFT器件层,所述柔性衬底基板上形成有与所述电镀电极一一对应的通孔,所述通孔内填充有导电材料,所述柔性衬底基板背离所述多个电镀电极的一侧形成有与所述通孔一一对应的绑定电极,每个所述绑定电极通过其对应的通孔内的导电材料与其对应的所述电镀电极电连接。
上述阵列基板中,柔性衬底基板上形成有多个电镀电极以及用于传输显示信号的薄膜晶体管TFT器件层,薄膜晶体管TFT器件层与电镀电极电连接,柔性衬底基板与每个电镀电极相对的区域形成有通孔,通孔内填充有导电材料,柔性衬底基板背离多个电镀电极的一侧形成有与所述通孔一一对应的绑定电极,绑定电极通过其对应的通孔内的导电材料与其对应的电镀电极电连接,上述结构可以通过电镀电极、导电材料以及绑定电极的设置直接将薄膜晶体管TFT器件层引到柔性基板背离薄膜晶体管TFT器件层的一侧与外部电路的柔性电路板连接,实现薄膜晶体管TFT器件层对显示信号的传输,由于绑定电极直接设置于柔性衬底基板背离薄膜晶体管TFT器件层的一侧,并且省去了阵列基板上扇出走线的设置,从而可以实现极窄边框或者无边框的设计,进而可以实现大面积的拼接屏的制作。
在一种可能的实施方式中,所述柔性衬底基板与所述多个电镀电极之间形成有缓冲层,所述柔性衬底基板以及所述缓冲层与所述电镀电极相对的区域形成有所述通孔,所述通孔内形成有所述导电材料。
在一种可能的实施方式中,所述绑定电极的材料为铟锡氧化物。
在一种可能的实施方式中,所述薄膜晶体管TFT器件层包括形成于所述多个电镀电极背离所述柔性衬底基板一侧的多条信号线,所述信号线与所述电镀电极一一对应电连接。
在一种可能的实施方式中,所述信号线包括相互绝缘的多条栅极线以及多条数据线。
在一种可能的实施方式中,所述薄膜晶体管TFT器件层背离所述多个电镀电极的一侧形成有黑矩阵,所述黑矩阵位于所述柔性衬底基板上的投影覆盖所述通孔位于所述柔性衬底基板上的投影。
本发明还提供一种制作上述技术方案中提供的任意一种阵列基板的方法,包括:
形成柔性衬底基板;
在所述柔性衬底基板的一侧形成多个电镀电极以及薄膜晶体管TFT器件层;
通过激光打孔工艺在所述柔性衬底基板上形成与所述电镀电极一一对应的通孔;
在所述通孔内电镀形成导电材料;
在所述柔性衬底基板背离所述多个电镀电极的一侧形成与所述通孔一一对应的绑定电极,所述绑定电极通过其对应的通孔内的导电材料与其对应的所述电镀电极电连接。
在一种可能的实施方式中,在所述柔性衬底基板与所述多个电镀电极之间形成有缓冲层时,在所述柔性衬底基板上进行打孔后,通过干法刻蚀工艺刻蚀缓冲层,形成与所述电镀电极相对的通孔。
本发明还提供一种柔性显示面板,包括上述技术方案中提供的任意一种阵列基板。
本发明还提供一种拼接屏,包括上述技术方案中提供的柔性显示面板。
附图说明
图1为现有技术中提供的一种阵列基板的结构示意图;
图2为本发明实施例提供的一种阵列基板的截面结构示意图;
图3为本发明实施例提供的一种阵列基板的结构示意图;
图4为本发明实施例提供的一种阵列基板的制作方法流程图;
图5为本发明实施例提供的一种阵列基板的制作方法流程图;
图6-图12为本发明实施例提供的一种阵列基板制作过程状态图。
图标:
1-柔性衬底基板;2-电镀电极;201-栅极电镀电极;202-数据电镀电极;31-第一栅极金属层;301-栅极线;302-连接电极;32-第二栅极金属层;303-栅线电极;304-连接电极;4-导电材料;5-绑定电极;6-缓冲层;7-第一源漏极金属层;701-数据线;702-第一源漏极;8-有源层;901-第一栅线绝缘层;902-第二栅线绝缘层;10-黑矩阵;11-层间绝缘层;12-平坦层;13-第二源漏极;14-凸台结构;15-显示绑定电极;16-保护层。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
请参考图2,本发明提供一种阵列基板,包括柔性衬底基板1、形成于柔性衬底基板1一侧的多个电镀电极2以及薄膜晶体管TFT器件层,柔性衬底基板1上形成有与所述电镀电极2一一对应的通孔,通孔内填充有导电材料4,柔性衬底基板1背离多个电镀电极2的一侧形成有与所述通孔一一对应的绑定电极5,每个绑定电极5通过其对应的通孔内的导电材料4与其对应的电镀电极2电连接。
上述发明实施例提供的阵列基板中,柔性衬底基板1上形成有多个电镀电极2以及用于传输显示信号的薄膜晶体管TFT器件层,薄膜晶体管TFT器件层与电镀电极2电连接,柔性衬底基板1与每个电镀电极相对的区域形成有通孔,通孔内填充有导电材料4,柔性衬底基板1背离多个电镀电极2的一侧形成有与通孔一一对应的绑定电极5,绑定电极5通过其对应的通孔内的导电材料4与其对应的电镀电极2电连接,上述结构可以通过电镀电极2、导电材料4以及绑定电极5的设置直接将薄膜晶体管TFT器件层引到柔性基板背离薄膜晶体管TFT器件层的一侧与外部电路的柔性电路板连接,实现薄膜晶体管TFT器件层对显示信号的传输,由于绑定电极5直接设置于柔性衬底基板1背离薄膜晶体管TFT器件层的一侧,并且省去了阵列基板上扇出走线的设置,从而可以实现极窄边框或者无边框的设计,进而可以实现大面积的拼接屏的制作。
上述发明实施例提供的阵列基板中,柔性衬底基板1与多个电镀电极2之间还形成有缓冲层6,柔性衬底基板1以及缓冲层6与每个电镀电极相对的区域形成有通孔,通孔内形成有导电材料4,缓冲层6的设置能够增强柔性显示面板的弯折能力,并且提高显示面板的水氧阻隔能力以及隔热效果。
可选地,绑定电极5的材料可以为铟锡氧化物,具有优异的光电性能。在应用中,绑定电极5的材料根据实际选择而定,在这里不做限制。优选地,绑定电极5覆盖通孔,既可实现导电的作用,又可实现对通孔内导电材料的保护。
上述阵列基板中,具体地,薄膜晶体管TFT器件层可以包括形成于多个电镀电极2背离柔性衬底基板1一侧的多条信号线,信号线与电镀电极一一对应电连接,实现对信号的传输。
上述阵列基板中,具体地,如图3所示,信号线包括相互绝缘的多条栅极线以及多条数据线701,多个电镀电极2包括与栅极线301一一对应电连接的栅极电镀电极201以及与数据线701一一对应电连接的数据电镀电极202,通过导电材料4以及绑定电极5将栅极线301与数据线701引到柔性衬底基板1背离多个电镀电极2的一侧,使绑定电极5与柔性电路板连接进行信号的传输。
上述阵列基板中,优选地,薄膜晶体管TFT器件层背离多个电镀电极2的一侧形成有黑矩阵10,黑矩阵10位于柔性衬底基板1上的投影覆盖通孔位于柔性衬底基板1上的投影,此结构设置能够避免显示面板的漏光现象。
具体地,以低温多晶硅技术制作的阵列基板为例,薄膜晶体管TFT器件层中可以具体包括,如图1所示,有源层8、第一栅线绝缘层901、第一栅极金属层31、第二栅线绝缘层902、第二栅极金属层32、层间绝缘层11、第一源漏极金属层7、平坦层12、第二源漏极13、保护层16、凸台结构14以及用于与显示器件绑定的显示绑定电极15。
其中,有源层8可以与电镀电极2同层设置;
第一栅极金属层31上设置有栅极线301以及连接电极302,栅极线301与栅极电镀电极201电连接;
第二栅极金属层32上设置有与第一栅极金属层31形成电容的栅线电极303以及连接电极304;
第一源漏极金属层7上形成有数据线701以及第一源漏极702,第一源漏极702与有源层8电连接,数据线701通过连接电极302和连接电极304与数据电镀电极202电连接,避免由于膜层断差过高而造成的搭接困难;
第二源漏极13与第一源漏极702电连接,设置第二源漏极13的作用主要是由于与显示绑定电极15绑定的显示器件显示电流比较大时,设置第二源漏极13可以降低数据线701上的电阻,减小IR压降。可选的,显示器件可以为Micro LED显示器件;
保护层16的作用是保护第二源漏极13在制作工艺中不受损伤;
凸台结构14有利于显示绑定电极15与显示器件绑定。
需要说明的是,上述阵列基板的具体结构仅作为本发明中可以实现窄边框或者无边框的一个说明,并不能作为一种限定实施例。
本发明还提供一种制作上述实施例中提供的任意一种阵列基板的方法,如图4所示,包括以下步骤:
S401:形成柔性衬底基板;
S402:在所述柔性衬底基板的一侧形成多个电镀电极以及薄膜晶体管TFT器件层;
S403:通过激光打孔工艺在所述柔性衬底基板上形成与所述电镀电极一一对应的通孔;
S404:在所述通孔内电镀形成导电材料;
S405:在所述柔性衬底基板背离所述多个电镀电极的一侧形成与所述通孔一一对应的绑定电极,所述绑定电极通过其对应的通孔内的导电材料与其对应的所述电镀电极电连接。
上述阵列基板的制作方法中,在柔性衬底基板上形成多个电镀电极以及薄膜晶体管TFT器件层,薄膜晶体管TFT器件层与电镀电极电连接,然后在柔性衬底基板与每个电镀电极相对的区域形成有通孔,在通孔内电镀形成导电材料,最后在柔性衬底基板背离多个电镀电极的一侧形成有与通孔一一对应的绑定电极,绑定电极通过其对应的通孔内的导电材料与其对应的电镀电极电连接,该方法可以通过电镀电极、导电材料以及绑定电极的设置直接将薄膜晶体管TFT器件层引到柔性基板背离薄膜晶体管TFT器件层的一侧与外部电路的柔性电路板连接,实现薄膜晶体管TFT器件层对显示信号的传输,由于绑定电极直接设置于柔性衬底基板背离薄膜晶体管TFT器件层的一侧,并且省去了阵列基板上扇出走线的设置,从而可以实现极窄边框或者无边框的设计,进而可以实现大面积的拼接屏的制作。
具体地,在柔性衬底基板与多个电镀电极之间还形成有缓冲层,在柔性衬底基板上进行打孔后,通过干法刻蚀工艺刻蚀缓冲层,从而形成与每个电镀电极相对的通孔,此通孔贯穿缓冲层以及柔性衬底基板。
在一种可能的实施方式中,上述阵列基板的具体制作步骤可以包括,如图5所示:
S501:在第一玻璃A表面形成柔性衬底基板1;
S502:在柔性衬底基板1的一侧形成多个电镀电极2以及薄膜晶体管TFT器件层,如图6所示;
S503:在薄膜晶体管TFT器件层背离柔性衬底基板的一侧设置第二玻璃B,采用组装设备对第二玻璃进行对盒,其中第二玻璃B通过粘合剂C对盒固定,如图7所示;
S504:采用剥离设备对第一玻璃进行剥离,如图8所示;
S505:采用激光打孔技术在柔性衬底基板上与电镀电极相对的区域打孔,采用干法刻蚀工艺刻蚀缓冲层与电镀电极相对的区域,形成贯穿柔性衬底基板1与缓冲层6的通孔,如图9以及图10所示;
S506:采用电镀的方式在通孔内形成导电材料4,如图11所示;
S507:在柔性衬底基板1背离多个电镀电极2的一侧形成绑定电极5,绑定电极5通过通孔内的导电材料4与电镀电极电连接,如图12所示;
S508:去除第二玻璃B和粘合剂C,切除阵列基板多余区域,如图2和图3所示。
上述阵列基板制作方法中,制作薄膜晶体管TFT器件层包括制作与电镀电极一一对应电连接的信号线,信号线可以包括栅极线以及数据线。
在具体的制作方法中,制作薄膜晶体管TFT器件层可以包括制作如图6所示的在衬底基板1一侧依次形成的有源层8、第一栅线绝缘层901、第一栅极金属层31、第二栅线绝缘层902、第二栅极金属层32、层间绝缘层11、第一源漏极金属层7、平坦层12、第二源漏极13、保护层16、凸台结构14、显示绑定电极15。
其中,薄膜晶体管TFT器件层中有源层8可以与电镀电极2同层设置;当有源层与电镀电极同层设置时,在阵列基板的制作过程中可以先制作多个电镀电极2,再在同层制作有源层8,也可以先制作薄膜晶体管TFT器件层中的有源层8,再在同层制作多个电镀电极2;
第一栅极金属层31上设置有栅极线301以及连接电极302,栅极线301与栅极电镀电极201电连接;
第二栅极金属层32上设置有与第一栅极金属层31形成电容的栅线电极303以及连接电极304;
第一源漏极金属层7上形成有数据线701以及第一源漏极702,第一源漏极702与有源层8电连接,数据线701通过连接电极302和连接电极304与数据电镀电极202电连接;
第二源漏极13与第一源漏极702电连接。
需要说明的是,制作阵列基板时,如果先在柔性衬底基板上制作通孔,然后在制作薄膜晶体管TFT器件层的工艺时信号线(栅极线、数据线等)直接搭接于通孔内,可能由于柔性衬底基板与金属材料的膨胀系数不同而容易导致信号线断路。而本实施例的制作方法中是在制作薄膜晶体管TFT器件层前先在柔性衬底基板上先通过电镀的方式制作与信号线对应电连接的电镀电极,在薄膜晶体管TFT器件层工艺结束后,制作通孔,在通孔内通过电镀工艺形成导电材料,保证薄膜晶体管TFT器件层上的信号能够传输到柔性衬底基板背离薄膜晶体管TFT器件层的一侧,避免信号线断路,并且电镀电极与电镀形成的导电材料连接使得信号传输更加精确。
具体地,通孔内的电镀材料可以为铜等导电金属,柔性衬底基板的材料可以为聚酰亚胺等。
本发明还提供一种柔性显示面板,包括上述实施例中提供的任意一种阵列基板。
本发明还提供一种拼接屏,包括上述实施例中提供的柔性显示面板。
显然,本领域的技术人员可以对本发明实施例进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (10)
1.一种阵列基板,其特征在于,包括柔性衬底基板、形成于所述柔性衬底基板一侧的多个电镀电极以及薄膜晶体管TFT器件层,所述柔性衬底基板上形成有与所述电镀电极一一对应的通孔,所述通孔内填充有导电材料,所述柔性衬底基板背离所述多个电镀电极的一侧形成有与所述通孔一一对应的绑定电极,每个所述绑定电极通过其对应的通孔内的导电材料与其对应的所述电镀电极电连接。
2.根据权利要求1所述的阵列基板,其特征在于,所述柔性衬底基板与所述多个电镀电极之间形成有缓冲层,所述柔性衬底基板以及所述缓冲层与所述电镀电极相对的区域形成有所述通孔,所述通孔内形成有所述导电材料。
3.根据权利要求1所述的阵列基板,其特征在于,所述绑定电极的材料为铟锡氧化物。
4.根据权利要求1所述的阵列基板,其特征在于,所述薄膜晶体管TFT器件层包括形成于所述多个电镀电极背离所述柔性衬底基板一侧的多条信号线,所述信号线与所述电镀电极一一对应电连接。
5.根据权利要求4所述的阵列基板,其特征在于,所述信号线包括相互绝缘的多条栅极线以及多条数据线。
6.根据权利要求1-5任一项所述的阵列基板,其特征在于,所述薄膜晶体管TFT器件层背离所述多个电镀电极的一侧形成有黑矩阵,所述黑矩阵位于所述柔性衬底基板上的投影覆盖所述通孔位于所述柔性衬底基板上的投影。
7.一种制作如权利要求1-6任一项所述的阵列基板的方法,其特征在于,包括:
形成柔性衬底基板;
在所述柔性衬底基板的一侧形成多个电镀电极以及薄膜晶体管TFT器件层;
通过激光打孔工艺在所述柔性衬底基板上形成与所述电镀电极一一对应的通孔;
在所述通孔内电镀形成导电材料;
在所述柔性衬底基板背离所述多个电镀电极的一侧形成与所述通孔一一对应的绑定电极,所述绑定电极通过其对应的通孔内的导电材料与其对应的所述电镀电极电连接。
8.根据权利要求7所述的制作方法,其特征在于,在所述柔性衬底基板与所述多个电镀电极之间形成有缓冲层时,在所述柔性衬底基板上进行打孔后,通过干法刻蚀工艺刻蚀缓冲层,形成与所述电镀电极相对的通孔。
9.一种柔性显示面板,其特征在于,包括如权利要求1-6任一项所述的阵列基板。
10.一种拼接屏,其特征在于,包括如权利要求9所述的柔性显示面板。
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JP2022518080A (ja) | 2022-03-14 |
KR20200134264A (ko) | 2020-12-01 |
WO2020151257A1 (zh) | 2020-07-30 |
JP7422688B2 (ja) | 2024-01-26 |
US11488987B2 (en) | 2022-11-01 |
KR102361329B1 (ko) | 2022-02-14 |
EP3916785A1 (en) | 2021-12-01 |
US20210210522A1 (en) | 2021-07-08 |
EP3916785A4 (en) | 2022-11-09 |
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