Deadline and Period Assignment for Guaranteeing Timely Response of the Cyber-Physical System
Cyber-physical systems (CPSs) need to respond to each change of each monitored object in time. The entire response process can be divided into two stages: the update stage and the control stage. Tasks in CPSs can thus be divided into two kinds: update ...
Sensor-Aware Data Imputation for Time-Series Machine Learning on Low-Power Wearable Devices
Wearable devices that have low-power sensors, processors, and communication capabilities are gaining wide adoption in several health applications. The machine learning algorithms on these devices assume that data from all sensors are available during ...
Performance Analysis of CNN Inference/Training with Convolution and Non-Convolution Operations on ASIC Accelerators
- Hadi Esmaeilzadeh,
- Soroush Ghodrati,
- Andrew B. Kahng,
- Sean Kinzer,
- Susmita Dey Manasi,
- Sachin S. Sapatnekar,
- Zhiang Wang
Today’s performance analysis frameworks for deep learning accelerators suffer from two significant limitations. First, although modern convolutional neural networks (CNNs) consist of many types of layers other than convolution, especially during training, ...
Layout Congestion Prediction Based on Regression-ViT
To accelerate the back-end design flow of integrated circuit (IC), numerous studies have made exploratory advancements in machine learning (ML) for electronic design automation (EDA). However, most research works are limited to deep learning (DL) models ...
Area-driven Boolean bi-decomposition by function approximation
Bi-decomposition rewrites logic functions as the composition of simpler components. It is related to Boolean division, where a given function is rewritten as the product of a divisor and a quotient, but bi-decomposition can be defined for any Boolean ...
SHAREDD: Sharing of Test Data and Design-for-Testability Logic for Transition Fault Tests under Standard Scan
High reliability requirements in certain systems are combined with constraints on test overheads, including test data volume, test application time and design-for-testability (DFT) logic. The overheads can be reduced if they are shared among different ...
PROTECTS: Progressive Rtl Obfuscation with ThrEshold Control Technique during architectural Synthesis
Due to the supply chain globalization of the semiconductor industry, securing heterogeneous System-on-Chip (SoC) is becoming necessary. A malicious alteration, inserting Hardware Trojan, infringement, or counterfeiting of design via Reverse Engineering (...
STCO: Enhancing Training Efficiency via Structured Sparse Tensor Compilation Optimization
Network sparsification serves as an effective technique to accelerate Deep Neural Network (DNN) inference. However, existing sparsification techniques often rely on structured sparsity, which yields limited benefits. This is primarily due to the ...