research-article

Enhancing Performance of HW/SW Cosimulation and Coemulation by Reducing Communication Overhead

Authors:

Moo-Kyoung Chung,

Chong-Min KyungAuthors Info & Claims

IEEE Transactions on Computers, Volume 55, Issue 2

Pages 125 - 136

https://doi.org/10.1109/TC.2006.24

Published: 01 February 2006 Publication History

Abstract

For system-level simulation of a complex system-on-chip design, multiple hardware simulators and emulators can be combined to work together. The simulation performance in this case is often limited by the communication overhead between simulators and emulators. To reduce the amount of communication in this heterogeneous simulation environment, we propose novel methods to find a time interval during which there are no transactions among simulators based on a dynamic prediction of transaction occurrence time for both software and hardware models. We also propose a simulator scheduling algorithm which allows the simulator to work alone without interaction with others when there is no transaction. By so doing, we reduced the amount of pure communication by a factor of 15 to 67 and, as a result, achieved a speed-up factor of 4 to 40 compared to existing lock-step simulation, as shown by experimental results with various application examples.

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Cited By

Sayyah PLazarescu MQuaglia DEbeid EBocchio SRosti AJerraya ACarloni LChang NFummi F(2012)Network-aware design-space exploration of a power-efficient embedded applicationProceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/2380445.2380531(567-574)Online publication date: 7-Oct-2012
https://dl.acm.org/doi/10.1145/2380445.2380531
Yun DKim JKim SHa SStok LDutt NHassoun S(2011)Simulation environment configuration for parallel simulation of multicore embedded systemsProceedings of the 48th Design Automation Conference10.1145/2024724.2024808(345-350)Online publication date: 5-Jun-2011
https://dl.acm.org/doi/10.1145/2024724.2024808
Kim HYun DHa SRosenstiel WWakabayashi K(2009)Scalable and retargetable simulation techniquesfor multiprocessor systemsProceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis10.1145/1629435.1629448(89-98)Online publication date: 11-Oct-2009
https://dl.acm.org/doi/10.1145/1629435.1629448
Show More Cited By

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Enhancing Performance of HW/SW Cosimulation and Coemulation by Reducing Communication Overhead

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Published In

cover image IEEE Transactions on Computers

IEEE Transactions on Computers Volume 55, Issue 2

February 2006

143 pages

ISSN:0018-9340

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Copyright © 2006.

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IEEE Computer Society

United States

Publication History

Published: 01 February 2006

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Cited By

Sayyah PLazarescu MQuaglia DEbeid EBocchio SRosti AJerraya ACarloni LChang NFummi F(2012)Network-aware design-space exploration of a power-efficient embedded applicationProceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/2380445.2380531(567-574)Online publication date: 7-Oct-2012
https://dl.acm.org/doi/10.1145/2380445.2380531
Yun DKim JKim SHa SStok LDutt NHassoun S(2011)Simulation environment configuration for parallel simulation of multicore embedded systemsProceedings of the 48th Design Automation Conference10.1145/2024724.2024808(345-350)Online publication date: 5-Jun-2011
https://dl.acm.org/doi/10.1145/2024724.2024808
Kim HYun DHa SRosenstiel WWakabayashi K(2009)Scalable and retargetable simulation techniquesfor multiprocessor systemsProceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis10.1145/1629435.1629448(89-98)Online publication date: 11-Oct-2009
https://dl.acm.org/doi/10.1145/1629435.1629448
Batsuuri TLee JCho K(2007)Power efficient co-simulation framework for a wireless application using platform based SoCProceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation10.5555/1776200.1776248(365-374)Online publication date: 16-Jul-2007
https://dl.acm.org/doi/10.5555/1776200.1776248
Jung JYoo SChoi K(2007)Fast cycle-approximate MPSoC simulation based on synchronization time-point predictionDesign Automation for Embedded Systems10.1007/s10617-007-9010-y11:4(223-247)Online publication date: 1-Dec-2007
https://dl.acm.org/doi/10.1007/s10617-007-9010-y

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