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Reducing Jitter in Embedded Systems Employing a Time-Triggered Software Architecture and Dynamic Voltage Scaling

Published: 01 February 2006 Publication History

Abstract

We have previously demonstrated that use of an appropriate Dynamic Voltage Scaling (DVS) algorithm can lead to a substantial reduction in CPU power consumption in systems employing a time-triggered cooperative (TTC) scheduler. In this paper, we consider the impact that the use of DVS has on the levels of both clock and task jitter in TTC applications. We go on to describe a modified DVS algorithm (TTC-jDVS) which can be used where low jitter is an important design consideration. We then demonstrate the effectiveness of the modified algorithm on a data set made up of artificial tasks and in a realistic case study.

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  • (2019)Cache-conscious off-line real-time scheduling for multi-core platforms: algorithms and implementationReal-Time Systems10.1007/s11241-019-09333-z55:4(810-849)Online publication date: 1-Oct-2019
  • (2010)Improving the reliability of embedded systems as complexity increasesProceedings of the 15th European Conference on Pattern Languages of Programs10.1145/2328909.2328937(1-17)Online publication date: 7-Jul-2010
  • (2010)Model-driven software synthesis for hard real-time applications with energy constraintsDesign Automation for Embedded Systems10.1007/s10617-011-9069-314:4(327-366)Online publication date: 1-Dec-2010
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Published In

cover image IEEE Transactions on Computers
IEEE Transactions on Computers  Volume 55, Issue 2
February 2006
143 pages

Publisher

IEEE Computer Society

United States

Publication History

Published: 01 February 2006

Author Tags

  1. Index Terms- Low power design
  2. real-time systems and embedded systems.
  3. scheduling

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View all
  • (2019)Cache-conscious off-line real-time scheduling for multi-core platforms: algorithms and implementationReal-Time Systems10.1007/s11241-019-09333-z55:4(810-849)Online publication date: 1-Oct-2019
  • (2010)Improving the reliability of embedded systems as complexity increasesProceedings of the 15th European Conference on Pattern Languages of Programs10.1145/2328909.2328937(1-17)Online publication date: 7-Jul-2010
  • (2010)Model-driven software synthesis for hard real-time applications with energy constraintsDesign Automation for Embedded Systems10.1007/s10617-011-9069-314:4(327-366)Online publication date: 1-Dec-2010
  • (2009)Meeting real-time constraints using “sandwich delays”Transactions on Pattern Languages of Programming I10.5555/2172302.2172306(94-102)Online publication date: 1-Jan-2009
  • (2007)A time petri net-based approach for hard real-time systems scheduling considering dynamic voltage scaling, overheads, precedence and exclusion relationsProceedings of the 20th annual conference on Integrated circuits and systems design10.1145/1284480.1284563(312-317)Online publication date: 3-Sep-2007
  • (2006)Computer assisted source-code parallelisationProceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part V10.1007/11751649_3(22-31)Online publication date: 8-May-2006

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