Performance Analysis of Optad-NoC: A Novel Optimized Routing Algorithm and Intelligent Router for 3D Network-on-Chip

Nowadays System-on-Chip (SoC) is an emerging technology in the world of Integrated Chip manufacturers. In SoC, many IP cores are integrated inside a chip. The technique for transferring the data in the form of packets from an IP core to another is named as Network-on-Chip (NoC). Today the world is moving towards the miniaturization of commercial electronic devices. To get a miniature device, the Integrated Circuits inside the devices must be very small. Whenever the IC is getting smaller and smaller, many problems such as operating speed and power consumption plays an important role.3D NoCs are the emerging technology for on-chip communication. Novel algorithms of 3D NoC helps to achieve high speed, less power consumption and more functionality. In this work, two important routing techniques such as source and distributed are combined and a new algorithm called as Optimized NoC algorithm (Optad-NoC) is developed to avoid congestion and fault in the router or the channel of 3D NoC. This algorithm is implemented in a newly designed intelligent router named Optad-NoC router to avoid the deadlock and livelock automatically in the network. The router uses the adaptive, multicast routing in Network-on-Chip to achieve high speed and reduces the power consumption in 3D NoC. The latency and the power consumption are obtained for the 8 × 8 (64 nodes) mesh network of each layer of 3D NoC. The average latency of the Optad-NoC router is improved by 36.08% and 28.5% compared to the existing techniques such as EDXY and FADyAD respectively during traffic conditions. The average total power consumption of the Optad-NoC router is reduced by 74.4% compared to EDXY and 66.2% compared to FADyAD during traffic conditions.