Cost effective routing techniques in 2D mesh NoC using on-chip transmission lines
Advancements in CMOS technology led to the increase in number of processing cores on a
single chip. Communication between different cores in such multicore systems is facilitated
by an underlying interconnect. Due to the limitations of traditional bus-based system
Network on Chip (NoC) based interconnect is the most acceptable cost effective framework
for inter-core communication. A packet in an NoC travels through a sequence of
intermediate routers before arriving at its destination. As the size of NoC scales high, the …
single chip. Communication between different cores in such multicore systems is facilitated
by an underlying interconnect. Due to the limitations of traditional bus-based system
Network on Chip (NoC) based interconnect is the most acceptable cost effective framework
for inter-core communication. A packet in an NoC travels through a sequence of
intermediate routers before arriving at its destination. As the size of NoC scales high, the …