research-article

GemDroid: a framework to evaluate mobile platforms

Authors:

Nachiappan Chidambaram Nachiappan,

Praveen Yedlapalli,

Niranjan Soundararajan,

Mahmut Taylan Kandemir,

Anand Sivasubramaniam,

Chita R. DasAuthors Info & Claims

ACM SIGMETRICS Performance Evaluation Review, Volume 42, Issue 1

Pages 355 - 366

https://doi.org/10.1145/2637364.2591973

Published: 16 June 2014 Publication History

Abstract

As the demand for feature-rich mobile systems such as smartphones and tablets has outpaced other computing systems and is expected to continue at a faster rate, it is projected that SoCs with tens of cores and hundreds of IPs (or accelerator) will be designed to provide unprecedented level of features and functionality in future. Design of such mobile systems with required QoS and power budgets along with other design constraints will be a daunting task for computer architects since any ad hoc, piece-meal solution is unlikely to result in an optimal design. This requires early exploration of the complete design space to understand the system-level design trade-offs. To the best of our knowledge, there is no such publicly available tool to conduct a holistic evaluation of mobile platforms consisting of cores, IPs and system software.

This paper presents GemDroid, a comprehensive simulation infrastructure to address these concerns. GemDroid has been designed by integrating the Android open-source emulator for facilitating execution of mobile applications, the GEM5 core simulator for analyzing the CPU and memory centric designs, and models for several IPs to collectively study their impact on system-level performance and power. Analyzing a spectrum of applications with GemDroid, we observed that the memory subsystem is a vital cog in the mobile platform because, it needs to handle both core and IP traffic, which have very different characteristics. Consequently, we present a heterogeneous memory controller (HMC) design, where we divide the memory physically into two address regions, where the first region with one memory controller (MC) handles core-specific application data and the second region with another MC handles all IP related data. The proposed modifications to the memory controller design results in an average 25% reduction in execution time for CPU bound applications, up to 11% reduction in frame drops, and on average 17% reduction in CPU busy time for on-screen (IP bound) applications.

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Cited By

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Wang CJiang NChen L(2021)Dynamic model distributing optimization for Mobile Edge Computing2021 International Conference on Computers and Automation (CompAuto)10.1109/CompAuto54408.2021.00012(24-28)Online publication date: Sep-2021
https://doi.org/10.1109/CompAuto54408.2021.00012
Xi SYao YBhardwaj KWhatmough PWei GBrooks D(2020)SMAUGACM Transactions on Architecture and Code Optimization10.1145/342466917:4(1-26)Online publication date: 10-Nov-2020
https://dl.acm.org/doi/10.1145/3424669
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Index Terms

GemDroid: a framework to evaluate mobile platforms
1. Computer systems organization
  1. Architectures
    1. Other architectures
      1. Special purpose systems
2. Computing methodologies
  1. Modeling and simulation
    1. Model development and analysis
      1. Modeling methodologies

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Information & Contributors

Information

Published In

cover image ACM SIGMETRICS Performance Evaluation Review

ACM SIGMETRICS Performance Evaluation Review Volume 42, Issue 1

Performance evaluation review

June 2014

569 pages

ISSN:0163-5999

DOI:10.1145/2637364

Editors:
Derek Eager
University of Saskatchewan
,
Carey Williamson
University of Calgary

Issue’s Table of Contents

SIGMETRICS '14: The 2014 ACM international conference on Measurement and modeling of computer systems
June 2014
614 pages
ISBN:9781450327893
DOI:10.1145/2591971
General Chairs:
Sujay Sanghavi
The University of Texas at Austin
,
Sanjay Shakkottai
The University of Texas at Austin
,
Program Chairs:
Marc Lelarge
INRIA, France
,
Bianca Schroeder
University of Toronto

Copyright © 2014 ACM.

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Association for Computing Machinery

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Publication History

Published: 16 June 2014

Published in SIGMETRICS Volume 42, Issue 1

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Cited By

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https://dl.acm.org/doi/10.1145/3453953.3453979
Wang CJiang NChen L(2021)Dynamic model distributing optimization for Mobile Edge Computing2021 International Conference on Computers and Automation (CompAuto)10.1109/CompAuto54408.2021.00012(24-28)Online publication date: Sep-2021
https://doi.org/10.1109/CompAuto54408.2021.00012
Xi SYao YBhardwaj KWhatmough PWei GBrooks D(2020)SMAUGACM Transactions on Architecture and Code Optimization10.1145/342466917:4(1-26)Online publication date: 10-Nov-2020
https://dl.acm.org/doi/10.1145/3424669
Badr MDelconte CEdo IJagtap RAndreozzi MJerger N(2020)Mocktails: Capturing the Memory Behaviour of Proprietary Mobile Architectures2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)10.1109/ISCA45697.2020.00046(460-472)Online publication date: May-2020
https://doi.org/10.1109/ISCA45697.2020.00046
Goyal VWang XBertacco VDas R(2020)Neksus: An Interconnect for Heterogeneous System-In-Package Architectures2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS47924.2020.00012(12-21)Online publication date: May-2020
https://doi.org/10.1109/IPDPS47924.2020.00012
Zhang HZhao SPattnaik AKandemir MSivasubramaniam ADas C(2019)Distilling the Essence of Raw Video to Reduce Memory Usage and Energy at Edge DevicesProceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3352460.3358298(657-669)Online publication date: 12-Oct-2019
https://dl.acm.org/doi/10.1145/3352460.3358298
Rai SChaudhuri M(2017)Using Criticality of GPU Accesses in Memory Management for CPU-GPU Heterogeneous Multi-Core ProcessorsACM Transactions on Embedded Computing Systems10.1145/312654016:5s(1-23)Online publication date: 27-Sep-2017
https://dl.acm.org/doi/10.1145/3126540
Yan HJiang LDuan LLin WJohn E(2017)FlowPaP and FlowReRACM Transactions on Embedded Computing Systems10.1145/312653216:5s(1-20)Online publication date: 27-Sep-2017
https://dl.acm.org/doi/10.1145/3126532
Kallurkar PSarangi SHunter HMoreno JEmer JSanchez D(2017)SchedtaskProceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3123939.3123984(612-624)Online publication date: 14-Oct-2017
https://dl.acm.org/doi/10.1145/3123939.3123984
Zhang HRengasamy PZhao SNachiappan NSivasubramaniam AKandemir MIyer RDas CHunter HMoreno JEmer JSanchez D(2017)Race-to-sleep + content caching + display cachingProceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3123939.3123948(517-531)Online publication date: 14-Oct-2017
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