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65th MWSCAS 2022: Fukuoka, Japan
- 65th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2022, Fukuoka, Japan, August 7-10, 2022. IEEE 2022, ISBN 978-1-6654-0279-8
- Soniya Chittoriya, Shivdeep
, Kundan Kumar Jha, Devarshi Mrinal Das
A Low-Overhead PUF Based Hardware Security Technique to Prevent Scan Chain Attacks for Industry-Standard DFT Architecture. 1-4 - Patrick J. Artz, Friedel Gerfers:
6G D-Band Receiver Model with High Spectral Efficiency Enabling Global System Optimization. 1-4 - Suoyue Zhan, Chunhong Chen:
An Efficient Method for Sequential Circuit Reliability Estimation. 1-4 - Md Musabbir Adnan, Mst Shamim Ara Shawkat
On-Chip Interface for Event based Sensor and Spiking Neuromorphic Processing. 1-4 - Toshihisa Tanaka, Ryo Shirai, Masanori Hashimoto:
DC Magnetic Field-Based Analytical Localization Robust to Known Stationary Magnetic Object. 1-4 - Cory Davis, Eugene John:
Shared Round Core Architecture: A Novel AES Implementation for Implantable Cardiac Devices. 1-4 - Xianyong Yi, Hakim Ghazzai
End-to-End Neural Network for Autonomous Steering using LiDAR Point Cloud Data. 1-4 - Akif Omer Ucar, Friedel Gerfers:
Sturdy-MASH Delta-Sigma Modulator with Improved Resolution Using Noise-coupling Multi-bit Quantizer. 1-4 - Umeshwar Dayal, Manish Gupta, Dipanjan Ghosh, Dinesh Wadhawan, Archana Morrow, Sadanori Horiguchi, Haiyan Wang, Aniruddha Rajendra Rao
Enabling Product Circularity Through Big Data Analytics and Digitalization. 1-6 - Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Hiroe Iwasaki
OpenCL-Based Design of an FPGA Accelerator for H.266/VVC Transform and Quantization. 1-4 - Chongyun Zhang
A 56-Gb/s PAM-4 Transmitter Using Silicon Photonic Microring Modulator in 40nm CMOS. 1-4 - Khalil Chikhaoui, Hakim Ghazzai
PPO-based Reinforcement Learning for UAV Navigation in Urban Environments. 1-4 - Khubaib Khan, Mohamed Atef Hassan, Michal Kern
A 12.2 to 14.9 GHz injection-locked VCO array with an on-chip 50 MHz BW semi-digital PLL for transient spin manipulation and detection. 1-4 - Gerrit Maus
A Phase Normalization Scheme for Angle of Arrival based Bluetooth Indoor Localization. 1-5 - Pham Hoai Luan, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima:
A High-Efficiency FPGA-based BLAKE-256 Accelerator for Securing Blockchain Networks. 1-4 - Ryan Weiss, Hritom Das, Nishith N. Chakraborty, Garrett S. Rose
STDP Based Online Learning for a Current-Controlled Memristive Synapse. 1-4 - Mohd. Tasleem Khan, Oscar Gustafsson:
ASIC Implementation Trade-Offs for High-Speed LMS and Block LMS Adaptive Filters. 1-4 - Suhasini Komarraju
Reinforcement Learning Based Power-Optimal Usage of Beamforming Antenna Array for Multi-Way Wireless Communication in Vehicular Traffic Environments. 1-4 - Zhanel Kudaibergenova, Aidana Toibekkyzy, Kassen Dautov, Muhammad Akmal Chaudhary, Mohammad S. Hashmi
Employment of Planar Coil and DGS based Resonators for Hybrid WPT System Realization. 1-4 - Dennis Michaelis, Karlheinz Ochs
Towards A Self-Organizing Neuronal Network Based on Guided Axon-Growth. 1-4 - Hua Zhang, Tianshi Liu, Utsav Gupta, Sundar Babu Isukapati, Emran K. Ashik
A 600V Half-Bridge Power Stage Fully Integrated with 25V Gate-Drivers in SiC CMOS Technology. 1-4 - Sepehr Tabrizchi, Shaahin Angizi, Arman Roohi:
Design and Evaluation of a Robust Power-Efficient Ternary SRAM Cell. 1-4 - Paolo Crovetti, Roberto Rubino, Ahmed Abdullah
Emerging Relaxation and DDPM D/A Converters: Overview and Perspectives. 1-6 - Hao Yang Du, Jun-Ichi Matsuda, Anna Kuwana, Haruo Kobayashi:
Low Switching Loss Dual RESURF 40 V N-LDMOS with Grounded Field Plate for DC-DC Converters. 1-4 - Matthew Smalley, Kendra Anderson, Nicole McFarlane:
Towards a Wireless pH-Impedance Sensor System for IoT Applications. 1-4 - Xiang Wang, Zikang Zhang, Yiting Wang
A Fast and Efficient FPGA-based Pose Estimation Solution for IoT Applications. 1-4 - Akio Shimizu, Takuro Noguchi, Yohei Ishikawa, Sumio Fukai:
Urinary Bladder Volume Measurement System with Transimpedance Amplifier and Current-Steering DAC. 1-4 - Jacob Nelson, Syed Rafay Hasan:
Compressed Sparse Kernel: Optimization of Pruning for Customized CNNs on FPGAs. 1-4 - Kasem Khalil
Adaptive Hardware Architecture for Neural-Network-on-Chip. 1-4 - Divyanshu Divyanshu
Physically Unclonable Function using GSHE driven SOT assisted MTJ for next Generation Hardware Security Applications. 1-4 - Yangxin Xiang, Chenyang Han, Cuixia Wang, Jiangfeng Wu, Yongzhen Chen:
A Current-Mode, 30 dB Range with 0.5 dB Step, 0.1 to 6 GHz Attenuator for Wideband Receiver. 1-4 - Brooks Olney, Shakil Mahmud, Md. Adnan Zaman, Robert Karam:
An EDA Framework for Design Space Exploration of On-Chip AI in Bioimplantable Applications. 1-4 - Aymen Hamrouni
Service Discovery in Social Internet of Things using Graph Neural Networks. 1-4 - Rakesh Rena, Raviteja Kammari
Digitally Intensive Sub-sampling Mixer-First Direct Down-Conversion Receiver Architecture. 1-4 - Xingye Liu, Paul Ampadu:
A Scalable Integrated DC/DC Converter with Enhanced Load Transient Response and Security for Emerging SoC Applications. 1-4 - Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Daisuke Ito, Yasuhiro Takahashi
A 28-Gb/s VCSEL Driver with Variable Output Impedance in 65-nm CMOS. 1-4 - Farzad Sabahi, M. Omair Ahmad, M. N. S. Swamy:
MorIRNet: A Deep Image Retrieval Network using Morphological Feature and Residual Block. 1-4 - Haruki Akaike, Shun-Ichi Katsuta, Shusaku Aramaki, Vasily G. Moshnyaga, Koji Hashimoto, Satoshi Ikeda:
Wandering Notification System for Caregivers of People with Dementia. 1-2 - Jinxiao Gao, Xin-An Wang, Bingjie Chen, Huanshuang Liu, Xiaofei Li, Pengfei Guo:
A High-Input-Voltage Wide-Load LDO with Improved Load-Dependent Zero Mobile Compensation. 1-5 - Dipesh C. Monga
A Compact Untrimmed 48ppm/°C All MOS Current Reference Circuit. 1-5 - Yu Yuan
Hardware Efficient Implementation of an Ultrasonic Non-Destructive Evaluation Algorithm based on DeepLearning. 1-4 - Akiyoshi Tanaka
A 4.8-mW Label-free Frequency-shift 3×3×2 3D Biosensor Array with Vertically-stacked 60-GHz LC Oscillators in 22-nm CMOS. 1-2 - Meriem Bettayeb
ASIC-Based Implementation of Random Spray Retinex Algorithm for Image Enhancement. 1-4 - Chien-Hsiang Lin, Yi-Pei Su, Yean-Ru Chen, Yu-Ting Chou, Sao-Jie Chen:
Empirical Study of Proposed Meltdown Attack Implementation on BOOM v3. 1-4 - Tim Zhang, Corey Lammie
Toward A Formalized Approach for Spike Sorting Algorithms and Hardware Evaluation. 1-4 - Yuta Sako, Tomohiro Kobayashi, Shinsuke Hara, Shuhei Amakawa, Takeshi Yoshida
254-GHz-to-299-GHz Down Conversion Mixer Using 45nm SOI CMOS. 1-4 - Yi Zeng, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
A low dropout regulator with PSR under -48dB up to 20GHz for a SARADC reference buffer. 1-4 - Shinichi Ito, Akiyoshi Tanaka
A 0.00023 mm² 1.2V 0.48mW 18GHz Passive-Less Digital Wireless Transmitter with On-Chip Antenna in 22nm Bulk CMOS. 1-2 - Imran Pervez, Charalampos Antoniadis
A Dense Explorative ElectroStatic Discharge optimization Algorithm for Photovoltaic Parameters Estimation. 1-4 - Nishant Maurya, Nijwm Wary:
Design and Analysis of PVT Invariant Current Reference in 65-nm CMOS. 1-4 - Ahmad Fitriyansah
Pin-Constrained Digital Microfluidic Design for Polymerase Chain Reaction using Selectable Number of Stages. 1-4 - Abdullah Alnafisah
Synchronization of Two Transistor-Based Chaotic Oscillators: Experimental Verification. 1-4 - Xi Wang, Zhiyang Zhang, Junyan Ren, Shunli Ma:
A 134-154 GHz Low-Noise Amplifier Achieving 36.3-dB Maximum Gain with 3.8-dB Minimum Noise Figure for D-Band Imaging System. 1-5 - Cong Tao, Liangbo Lei, Zhipeng Chen, Zhiliang Hong, Yumei Huang:
A 50MHz Bandwidth TIA Based on Two Stage Pseudo-Differential OTA with Cascode Negative Resistance and R-C Compensation Technique. 1-4 - Yeu-Torng Yau
Asymmetrical Half Bridge Flyback Converter with Constant Off Time Control. 1-4 - Agustin C. Galetto, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda:
Backpropagation Based Background Compensation of TI-DAC Errors in High-Speed Transmitters. 1-4 - Sangjukta R. Chowdhury, Sumit Bhardwaj, Jennifer Kitchen:
Application Driven Rapid Synthesis for Analog BIST Components. 1-4 - Takuma Hashimoto, Toru Tanzawa
Antenna / On-Chip-Rectifier Co-Design Methodology for Micro-Watt Microwave Wireless Power Transfer. 1-4 - Siyuan Yu, Matthew L. Johnston:
A 1μW Activity-Aware Asynchronous Delta Modulator with Automated Dual-Mode Operation. 1-4 - Jack Ou:
On the Feasibility of an Inverter-Based CMOS Envelope Detector. 1-4 - Fangting Miao, Dongfang Pan, Zhiyong Xiong, Lin Cheng:
A 250-Mbps 2.6-ns Propagation Delay Capacitive Digital Isolator with Adaptive Frequency Control. 1-4 - Anshul Jha, Eugene John, Taposh Banerjee:
Transfer Learning for COVID-19 and Pneumonia Detection using Chest X-Rays. 1-4 - Parth Parekh, Fei Yuan, Yushi Zhou:
Bi-Directional Gated Ring Oscillator Time Integrator for Time-Based Mixed-Signal Processing. 1-4 - Lu Li, Wei Zhou, Yuan Gao:
Linearity Analysis of Phase-Domain Delta-Sigma Modulator. 1-4 - Daniel Kwabena Yirenya-Tawiah, Alexander Blackham, Alison Langford, Brian A. Mazzeo
Design and Measurement of a 24.5-mW, 33-mWh, 1.8-V-Output Solar Energy Harvester for Bluetooth Sensor Nodes. 1-4 - Mohammed Helal, Ahmed Elanwar, Ahmed Emira, Faisal Hussien, Mohamed Elghonemy, Ahmet Tekin:
A 30 GHz 8-Bit Phased Array Transmitter for Satellite Communication in 22nm FDSOI. 1-4 - Heba Abunahla, Dima Kilani, Baker Mohammad
AMemImp: Novel Analog Memimpedance Device and Circuits for MAC Unit. 1-4 - Ke Wu, Yuekang Guo, Jing Jin, Xiaoming Liu, Jianjun Zhou:
A Power-Efficient CMOS Image Sensor with In-Sensor Processing and In-Pixel Gain Calibration. 1-4 - Chi-Wei Chen, Pei-Yu Lo, Wei-Ting Hsu, Chih-Wei Chen, Chin-Wei Tien, Sy-Yen Kuo:
A Hardware Trojan Insertion Framework against Gate-Level Netlist Structural Feature-based and SCOAP-based Detection. 1-5 - José M. de la Rosa:
Automated Design of Sigma-Delta Converters: From Know-How to AI-assisted Optimization. 1-3 - Parisa Abdolrahim Poorheravi, Vincent C. Gaudet:
FPGA-Based Architectures for Random Forest Acceleration. 1-4 - Takayuki Imamura, Vasily G. Moshnyaga, Koji Hashimoto:
Fall detection with a single Doppler radar sensor and LSTM recurrent neural network. 1-4 - Masoumeh Kalantari Khandani, Azadeh Vosoughi:
A Review of Enabling Technologies for Magnetic Particle Imaging. 1-5 - Masafumi Tanakal, Jaehoon Yu, Masaki Nakagawa, Naoya Tate, Masanori Hashimoto:
Investigating Small Device Implementation of FRET-based Optical Reservoir Computing. 1-4 - Akira Tsuchiya, Toshiyuki Inoue, Keiji Kishine, Yasuhiro Takahashi
A Small-Area Integration of Optical Receiver Using Multi-Layer Inductors and Capacitor-Under-Pad. 1-4 - Stefan Pechmann, Amelie Hagelauer:
A Read Circuit Design for Multi-Level RRAM Cells Exhibiting Small Resistance Windows. 1-2 - Ali Dogus Güngördü, Mustafa Berke Yelten:
A Noise-Canceling TIA Topology Compatible With Large-Area Photodetectors in 40 nm CMOS Process. 1-4 - Hyunjin Kim
A 97.9% Peak Efficiency 9 V Output Three-Switch Hybrid Buck-Boost Power Stage Using 5 V CMOS. 1-4 - Chen-Chien Kao, Yi-Yen Hsieh, Chao-Hung Chen, Chia-Hsiang Yang:
Hardware Acceleration in Large-Scale Tensor Decomposition for Neural Network Compression. 1-4 - Hyunjin Kim
An Output-Boosted 3-ratio Switched-Capacitor DC-DC Converter with 0.5-to-1.8 V Output Voltage Range for Low-Power IoT Applications. 1-4 - Yuta Moritake, Ryuya Kirihara, Yuki Hirota, Takumi Hayashi, Xiangbo Kong, Takeshi Kumaki:
Development and evaluation of the "Stego-panel IV" Invisible information lighting display. 1-4 - Aakanksha Tewari, Neelam Singh, Sumit Jagdish Darak, Vipin Kizheppatt, Mohammed Sajjad Jafri:
Reconfigurable Wireless PHY with Dynamically Controlled Out-of-Band Emission on Zynq SoC. 1-4 - Richelle L. Smith, Thomas H. Lee:
Hybrid Analysis and Simulation Methodology for Noise in Active Mixers. 1-5 - Muhammed Ceylan Morgül, Mircea R. Stan
Scheduling Active and Accelerated Recovery to Combat Aging in Integrated Circuits. 1-5 - Jinhua Wang, Jiayu Li, Dong Sam Ha
Vibration Energy Harvesting IC Design with Incorporation of Two Maximum Power Point Tracking Methods. 1-5 - Kwondo Ma, Mohamed Mejri, Chandramouli N. Amarnath, Abhijit Chatterjee:
Low Power Neural Network Accelerators Using Collaborative Weight Tuning and Shared Shift-Add optimization. 1-4 - Omid Aramoon, Gang Qu, Aijiao Cui:
Building Hardware Security Primitives Using Scan-based Design-for-Testability. 1-6 - Ryosuke Watanabe, Shigeru Hidaka, Tomoya Akasaka, Shota Kajiya, Taisei Arima, Atsushi Kurokawa, Toshiki Kanamoto:
Enhanced laser trimming of thin film resistors dedicated to snubber for high power IGBT modules. 1-4 - Keisuke Sakamoto, Masanori Natsui, Takahiro Hanyu:
Energy-Efficient Nonvolatile RISC-V CPU with a Custom Instruction-Controlled Accelerator. 1-4 - Manu Rathore
A Compact Model for the Variable Switching Dynamics of HfO2 Memristors. 1-4 - Yuki Abe, Kazutoshi Kobayashi, Hiroyuki Ochi:
Nonvolatile Flip-Flops Using FiCC for IoT Processors with Intermittent Operations. 1-4 - Jingchao Lan, Yuxuan Zhang, Fan Ye, Junyan Ren:
A Single-Channel 1.25-GS/s 11-bit Pipelined ADC with Robust Floating-Powered Ring Amplifier and First-Order Gain Error Calibration. 1-5 - Christopher Chuvalas, Ranga Vemuri:
FPGA Acceleration of a Stochastic Local Search Portfolio Solver for Boolean Satisfiability. 1-4 - Armin Tajalli, Amin Shokrollahi:
Balanced Circuit Topologies and Their Applications in Data Movement. 1-6 - Eunji Song, Jeonghyu Yang, Seungwook Hong, Jaeduk Han:
A 32-Gb/s High-Swing PAM-4 Current-Mode Driver with Current-Bleeding Cascode Technique and Capacitive-Coupled Pre-drivers in 40-nm CMOS for Short-Reach Wireline Communications. 1-4 - Paulo César Comassetto de Aguirre, Fabio D. Da Fonseca, Alessandro Gonçalves Girardi:
An 8-Bit 4x4 Segmented Current-Steering DAC for Bipolar Biphasic Stimulators. 1-4 - Gordana Jovanovic-Dolecek:
Design of Multiplierless Wideband Compensator for Modified Cosine-Based Comb Decimator with Improved Aliasing Rejection. 1-4 - Fredo Chavez
Dual-Layer Waveform Domain Deep Learning Approach for RF Fingerprinting. 1-5 - Chien-Cheng Tseng, Su-Ling Lee:
Least Squares, Minimax and Peak Constrained Designs of Polynomial Hypergraph Filters. 1-4 - Ping Lu, Minhan Chen, Shaishav Desai:
An adaptive wide-range Time-to-Digital Converter with flexible resolution for DPLL applications. 1-4 - Rui Xing, Li Dong, Zhongming Xue, Zhuoqi Guo, Bingjun Tang
A 10.8 nJ/Detection ECG Processor Based on DWT and SVM for Real-Time Arrhythmia Detection. 1-4 - Kiyotaka Sasagawa
Mouse Brain Imaging Using a Self-Reset CMOS Image Sensor over 70-dB SNR. 1-2 - Kosiro Obata, Hasitha Muthumala Waidyasooriya, Masanori Hariyama:
Implementation of an FPGA-Oriented Complex Number Computation Library Using Intel OneAPI DPC++. 1-4 - Xuchu Mu, Yang Jiang, Man-Kay Law, Pui-In Mak
Design Challenges and Considerations of Non-isolated Gate Driver for GaN-based Converters. 1-4 - Chien-Cheng Tseng, Su-Ling Lee:
Distributed Implementation of Heat Kernel Smoothing for Graph Signal Denoising. 1-4 - Raby Hamadi
A Hybrid Artificial Neural Network for Task Offloading in Mobile Edge Computing. 1-4 - F. Montalvo-Galicia, María Teresa Sanz-Pascual
Parameter extraction method for the two-diode solar cell model. 1-4 - Zhanhong Jin, Xinzhe Wang, Futian Liang, Chengzhi Peng:
Cryogenic Characterization of Commercial Devices for Application of Quantum Computing Electronics. 1-5 - Anurag Veerabathini, Alejandro Roman-Loera:
A Peak Current-Mode Control Boost Converter Model for Stability Analysis: A Design Approach. 1-4 - Wenhan Lu, Yimin Wu, Fan Ye, Junyan Ren:
A Broadband LMS-based Band-split Crosstalk Cancellation Method for Ultrasound Systems. 1-4 - Mohammad Radpour
An LNA Exploiting Intrinsic Gate-Drain Feedback for Wideband Input Match from 7.7 to 33.3 GHz and the Noise-Figure Minimum of 1.83 dB. 1-4 - M. Hashem Shullar, Alaa Awad Abdellatif, Yehia Massoud:
Energy-Efficient Active Federated Learning on Non-IID Data. 1-4 - Konstantinos Fanaras, Antonios Tragoudaras
Audio-visual Speaker Diarization: Improved Voice Activity Detection with CNN based Feature Extraction. 1-4 - Geoffrey Mulberry, Kevin A. White, Brian N. Kim:
Fully parallel 512-ch dual-mode electrophysiology and neurochemical amplifiers. 1-4 - Bharat Bhushan Upadhyay, Sumit Kr. Yadav, Kishor Prabhakar Sarawadekar:
VLSI Architecture of Saturation Based Image Dehazing Algorithm and its FPGA Implementation. 1-4 - Peng Yan
A 12.5 Gb/s 1.38 mW Inverter-Based Optical Receiver in 28 nm CMOS. 1-4 - Kevin Kollek, Marco Braun, Jan-Hendrik Meusener, Anton Kummert:
Real-Time Traffic Counting on Resource Constrained Embedded Systems. 1-4 - Giuseppe Coviello, Gianfranco Avitabile, Claudio Talarico, Janet M. Wang-Roveda, Antonello Florio:
Master-Slave Mutual Time Synchronization in a Wireless Body Area Network. 1-4 - Lulu Liu, Yimin Wu, Xinwei Yu, Fan Ye, Junyan Ren:
A Branch-Gain-Balanced LNA Based on Voltage- Controlled Resistor Feedback and Shared CMFB Amplifier. 1-4
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