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Samuel Palermo
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2020 – today
- 2024
- [j44]Hyungryul Kang
, Inhyun Kim, Ruida Liu, Ankur Kumar
A 42.7Gb/s Optical Receiver With Digital Clock and Data Recovery in 28nm CMOS. IEEE Access 12: 109900-109911 (2024) - [j43]David Dolt
A Radiation-Hardened 15-22-GHz Frequency Synthesizer in 22-nm FinFET. IEEE J. Solid State Circuits 59(9): 2870-2883 (2024) - [j42]Il-Min Yi
A 50-Gb/s Multicarrier Transmitter Using DAC-Based Polar Drivers in 22-nm FinFET. IEEE J. Solid State Circuits 59(9): 2948-2959 (2024) - [j41]Vishal Saxena
Optical Interconnects Using Hybrid Integration of CMOS and Silicon-Photonic ICs. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1632-1637 (2024) - [c62]Gijin Park, Srujan Kumar Kaile, Il-Min Yi, Sebastian Hoyos, Samuel Palermo:
Comparisons of Metastability Impact in Time-Domain and Asynchronous SAR ADCs for Serial I/O Receivers. MWSCAS 2024: 1106-1110 - 2023
- [j40]Anil Korkmaz
Spectral Ranking in Complex Networks Using Memristor Crossbars. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(1): 357-370 (2023) - [j39]Ahmad Khairi, Yoel Krupnik
A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels. IEEE J. Solid State Circuits 58(1): 8-18 (2023) - [j38]Yuanming Zhu
A Jitter-Robust 40 Gb/s ADC-Based Multicarrier Receiver Front-End With 4-GS/s Baseband Pipeline-SAR ADCs in 22-nm FinFET. IEEE J. Solid State Circuits 58(3): 662-676 (2023) - [j37]Yuanming Zhu
A 38-GS/s 7-bit Pipelined-SAR ADC With Speed- Enhanced Bootstrapped Switch and Output Level Shifting Technique in 22-nm FinFET. IEEE J. Solid State Circuits 58(8): 2300-2313 (2023) - [c61]Anil Korkmaz, Gianluca Zoppo, Francesco Marrone, Fernando Corinto, Su-In Yi, R. Stanley Williams
Memristor-based Offset Cancellation Technique in Analog Crossbars. ISCAS 2023: 1-5 - [c60]Gianluca Zoppo, Anil Korkmaz, Francesco Marrone, Su-In Yi, Samuel Palermo
Gaussian Process for Nonlinear Regression via Memristive Crossbars. ISCAS 2023: 1-5 - [c59]Anirban Samanta, Po-Hsuan Chang
A Direct Bond Interconnect 3D Co-Integrated Silicon-Photonic Transceiver in 12nm FinFET with -20.3dBm OMA Sensitivity and 691fJ/bit. OFC 2023: 1-3 - [c58]Po-Hsuan Chang
A Sub-500fJ/bit 3D Direct Bond Silicon Photonic Transceiver in 12nm FinFET. VLSI Technology and Circuits 2023: 1-2 - [c57]Il-Min Yi, Srujan Kumar Kaile, Yuanming Zhu, Julian Camilo Gomez Diaz, Sebastian Hoyos, Samuel Palermo:
A 50Gb/s DAC-Based Multicarrier Polar Transmitter in 22nm FinFET. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j36]Julian Camilo Gomez Diaz
Recurrent Neural Network Equalization for Wireline Communication Systems. IEEE Trans. Circuits Syst. II Express Briefs 69(4): 2116-2120 (2022) - [c56]Yuanming Zhu
A Jitter-Robust 40Gb/s ADC-Based Multicarrier Receiver Front End in 22nm FinFET. CICC 2022: 1-2 - [c55]Yuanming Zhu
A 38GS/s 7b Time-Interleaved Pipelined-SAR ADC with Speed-Enhanced Bootstrapped Switch in 22nm FinFET. CICC 2022: 1-2 - [c54]David Dolt, Quintin Livingston, Tong Liu, Ankur Kumar, Samuel Palermo:
SEE Sensitivity of a 16GHz LC-Tank VCO in a 22nm FinFET Technology. ISCAS 2022: 254-257 - [c53]Anil Korkmaz, Gianluca Zoppo, Francesco Marrone, Fernando Corinto, R. Stanley Williams
Analog Acceleration of the Power Method using Memristor Crossbars. ISCAS 2022: 1194-1198 - [c52]Gianluca Zoppo, Francesco Marrone, Fernando Corinto, Anil Korkmaz, Su-In Yi
A Mathematical Analysis of Wire Resistance Problem in Memristor Crossbars. ISOCC 2022: 249-250 - [c51]Yoav Segal, Amir Laufer, Ahmad Khairi, Yoel Krupnik, Marco Cusmai, Itamar Levin, Ari Gordon, Yaniv Saban, Vitali Rahinskj, Gadi Ori, Noam Familia, Stas Litski, Tali Warshavsky, Udi Virobnik, Yeshayahu Horwitz, Ajay Balankutty, Shiva Kiran, Samuel Palermo
A 1.41pJ/b 224Gb/s PAM-4 SerDes Receiver with 31dB Loss Compensation. ISSCC 2022: 114-116 - [c50]Peng Yan
A 12.5 Gb/s 1.38 mW Inverter-Based Optical Receiver in 28 nm CMOS. MWSCAS 2022: 1-4 - [c49]Kamran Entesari, Samuel Palermo, Christi Madsen, Gihoon Choo, Ramy Rady, Shengchang Cai, Binhao Wang:
Automated Tuning for Silicon Photonic Filters. OFC 2022: 1-3 - [c48]Marjan Fariborz, Mahyar Samani, Pouya Fotouhi, Roberto Proietti, Il-Min Yi, Venkatesh Akella, Jason Lowe-Power
LLM: Realizing Low-Latency Memory by Exploiting Embedded Silicon Photonics for Irregular Workloads. ISC 2022: 44-64 - 2021
- [j35]Gianluca Zoppo
Analog Solutions of Discrete Markov Chains via Memristor Crossbars. IEEE Trans. Circuits Syst. I Regul. Pap. 68(12): 4910-4923 (2021) - [c47]Tong Liu, Yuanming Zhu
A 40Gb/s Linear Redriver with Multi-Band Equalization in 130nm SiGe BiCMOS. BCICTS 2021: 1-4 - [c46]Anil Korkmaz, Chaoyi He, Linda P. B. Katehi
Design of Tunable Analog Filters Using Memristive Crossbars. ISCAS 2021: 1-5 - [c45]Yu-Lun Luo, Ali Ershadi, Ramy Rady, Kamran Entesari, Samuel Palermo:
A Power-Efficient 20-35 GHz MZM Driver with Programmable Linearizer in 28nm CMOS. OFC 2021: 1-3 - [c44]Ramy Rady, Gihoon Choo, Christi Madsen, Samuel Palermo, Kamran Entesari:
External Modulator-Based Automatic Tuning of Reconfigurable Silicon Photonic 4th-Order APF-based Pole/Zero Filters. OFC 2021: 1-3 - 2020
- [j34]Yang-Hang Fan
A 32-Gb/s Simultaneous Bidirectional Source-Synchronous Transceiver With Adaptive Echo Cancellation Techniques. IEEE J. Solid State Circuits 55(2): 439-451 (2020) - [c43]Yuanming Zhu
A 1.5GS/s 8b Pipelined-SAR ADC with Output Level Shifting Settling Technique in 14nm CMOS. CICC 2020: 1-4 - [c42]Yang-Hang Fan
A 22 Gb/s Directly Modulated Optical Injection-Locked Quantum-Dot Microring Laser Transmitter with Integrated CMOS Driver. ISCAS 2020: 1-4
2010 – 2019
- 2019
- [j33]Samuel Palermo
Introduction to the Special Section on the 2018 Custom Integrated Circuits Conference. IEEE J. Solid State Circuits 54(3): 611-612 (2019) - [j32]Shiva Kiran
A 52-Gb/s ADC-Based PAM-4 Receiver With Comparator-Assisted 2-bit/Stage SAR ADC and Partially Unrolled DFE in 65-nm CMOS. IEEE J. Solid State Circuits 54(3): 659-671 (2019) - [j31]Ashkan Roshan-Zamir
A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS. IEEE J. Solid State Circuits 54(3): 672-684 (2019) - [c41]Yang-Hang Fan
A 32 Gb/s Simultaneous Bidirectional Source-Synchronous Transceiver with Adaptive Echo Cancellation in 28nm CMOS. CICC 2019: 1-4 - [c40]Shiva Kiran, Shengchang Cai, Ying Luo, Sebastian Hoyos, Samuel Palermo:
A 32 Gb/s ADC-Based PAM-4 Receiver with 2-bit/Stage SAR ADC and Partially-Unrolled DFE. CICC 2019: 1-4 - [c39]Julian Camilo Gomez Diaz, Shiva Kiran, Samuel Palermo, Sebastian Hoyos:
Jitter-Robust Multicarrier ADC-Based Serial Link Receiver Architecture : (Invited Special Session Paper). MWSCAS 2019: 1151-1154 - [c38]Yang-Hang Fan, Di Liang, Ashkan Roshan-Zamir, Chong Zhang, Binhao Wang, Marco Fiorentino, Raymond G. Beausoleil, Samuel Palermo:
A Directly Modulated Quantum Dot Microring Laser Transmitter with Integrated CMOS Driver. OFC 2019: 1-3 - 2018
- [j30]Rikky Muller, Samuel Palermo:
Guest Editorial 2017 IEEE Custom Integrated Circuits Conference. IEEE J. Solid State Circuits 53(3): 679-680 (2018) - [c37]Cheng Li, Kunzhi Yu, Jinsoo Rhim, Kehan Zhu, Nan Qi, Marco Fiorentino
A 3D-Integrated 56 Gb/s NRZ/PAM4 Reconfigurable Segmented Mach-Zehnder Modulator-Based Si-Photonics Transmitter. BCICTS 2018: 32-35 - [c36]Shiva Kiran, Shengchang Cai, Ying Luo, Sebastian Hoyos, Samuel Palermo:
A 32 Gb/s ADC-based PAM-4 receiver with 2-bit/stage SAR ADC and partially-unrolled DFE. CICC 2018: 1-4 - [c35]Ashkan Roshan-Zamir, Takayuki Iwai, Yang-Hang Fan
A 56 Gb/s PAM4 receiver with low-overhead threshold and edge-based DFE FIR and IIR-tap adaptation in 65nm CMOS. CICC 2018: 1-4 - [c34]Di Liang, Chong Zhang, Ashkan Roshan-Zamir, Kunzhi Yu, Cheng Li, Geza Kurczveil, Yingtao Hu, Wenqing Shen, Marco Fiorentino, Satish Kumar, Samuel Palermo, Raymond G. Beausoleil:
A Fully-integrated Multi-λ Hybrid DML Transmitter. OFC 2018: 1-3 - [c33]Ashkan Roshan-Zamir, Kunzhi Yu, Di Liang, Chong Zhang, Cheng Li, Gaofeng Fan, Binhao Wang, Marco Fiorentino, Raymond G. Beausoleil, Samuel Palermo:
A 14 Gb/s Directly Modulated Hybrid Microring Laser Transmitter. OFC 2018: 1-3 - 2017
- [j29]Carlos Briseno-Vidrios
A 75-MHz Continuous-Time Sigma-Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage. IEEE J. Solid State Circuits 52(3): 657-668 (2017) - [j28]Shengchang Cai
A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS. IEEE J. Solid State Circuits 52(8): 2168-2179 (2017) - [j27]Ashkan Roshan-Zamir
A Reconfigurable 16/32 Gb/s Dual-Mode NRZ/PAM4 SerDes in 65-nm CMOS. IEEE J. Solid State Circuits 52(9): 2430-2447 (2017) - [c32]Hae-Woong Yang, Ashkan Roshan-Zamir, Young-Hoon Song, Samuel Palermo:
A low-power dual-mode 20-Gb/s NRZ and 28-Gb/s PAM-4 voltage-mode transmitter. A-SSCC 2017: 261-264 - [c31]Samuel Palermo, Hideyuki Nosaka, Frank O'Mahony:
Session 29 overview: Optical- and electrical-link innovations. ISSCC 2017: 480-481 - [c30]Yohan Frans, Ichiro Fujimori, Seung-Jun Bae, Samuel Palermo, Hideyuki Nosaka, Simone Erba:
F5: Wireline transceivers for Mega Data Centers: 50Gb/s and beyond. ISSCC 2017: 512-514 - [c29]Ashkan Roshan-Zamir, Binhao Wang, Kunzhi Yu, Shashank Telaprolu, Cheng Li, M. Ashkan Seyedi, Marco Fiorentino
A 40Gb/s PAM4 optical DAC silicon microring resonator modulator transmitter. MWSCAS 2017: 1089-1092 - 2016
- [j26]Samuel Palermo, Sebastian Hoyos, Ayman Shafik, Ehsan Zhian Tabasy, Shengchang Cai, Shiva Kiran, Keytaek Lee:
CMOS ADC-based receivers for high-speed electrical and optical links. IEEE Commun. Mag. 54(10): 168-175 (2016) - [j25]Ayman Shafik
A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization. IEEE J. Solid State Circuits 51(3): 671-685 (2016) - [j24]Kunzhi Yu, Cheng Li, Hao Li, Alex Titriku, Ayman Shafik, Binhao Wang, Zhongkai Wang, Rui Bai, Chin-Hui Chen, Marco Fiorentino
A 25 Gb/s Hybrid-Integrated Silicon Photonic Source-Synchronous Receiver With Microring Wavelength Stabilization. IEEE J. Solid State Circuits 51(9): 2129-2141 (2016) - 2015
- [j23]Hao Li, Zhe Xuan, Alex Titriku, Cheng Li, Kunzhi Yu, Binhao Wang, Ayman Shafik, Nan Qi, Yang Liu, Ran Ding
A 25 Gb/s, 4.4 V-Swing, AC-Coupled Ring Modulator-Based WDM Transmitter with Wavelength Stabilization in 65 nm CMOS. IEEE J. Solid State Circuits 50(12): 3145-3159 (2015) - [j22]Osama Elhadidy, Sherif Shakib, Keith Krenek, Samuel Palermo, Kamran Entesari:
A Wide-Band Fully-Integrated CMOS Ring-Oscillator PLL-Based Complex Dielectric Spectroscopy System. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(8): 1940-1949 (2015) - [c28]Hao Li, Zhe Xuan, Alex Titriku, Cheng Li, Kunzhi Yu, Binhao Wang, Ayman Shafik, Nan Qi, Yang Liu, Ran Ding
22.6 A 25Gb/s 4.4V-swing AC-coupled Si-photonic microring transmitter with 2-tap asymmetric FFE and dynamic thermal tuning in 65nm CMOS. ISSCC 2015: 1-3 - [c27]Ayman Shafik, Ehsan Zhian Tabasy, Shengchang Cai, Keytaek Lee, Sebastian Hoyos, Samuel Palermo:
3.6 A 10Gb/s hybrid ADC-based receiver with embedded 3-tap analog FFE and dynamically-enabled digital equalization in 65nm CMOS. ISSCC 2015: 1-3 - [c26]Kunzhi Yu, Hao Li, Cheng Li, Alex Titriku, Ayman Shafik, Binhao Wang, Zhongkai Wang, Rui Bai, Chin-Hui Chen, Marco Fiorentino
22.4 A 24Gb/s 0.71pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization. ISSCC 2015: 1-3 - [c25]Shengchang Cai, Gihoon Choo, Ehsan Zhian Tabasy, Binhao Wang, Kamran Entesari, Samuel Palermo:
Adaptively-tunable RF photonic filters. MWSCAS 2015: 1-4 - [c24]Tsung-Ching Huang, Cheng Li, Rui Wu, Chin-Hui Chen, Marco Fiorentino
DWDM nanophotonic interconnects: toward terabit/s chip-scale serial link. MWSCAS 2015: 1-4 - [c23]Sanquan Song, Jian Xu, Fengxiang Cai, Xin Ma, Zibing Yang, Matthew Becker, Larry Tate, Byungsub Kim, Samuel Palermo, William J. Bowhill:
An input pole tuned switching equalization scheme for high-speed serial links. MWSCAS 2015: 1-4 - [c22]Binhao Wang, Kunzhi Yu, Hao Li, Patrick Yin Chiang, Samuel Palermo:
Energy efficiency comparisons of NRZ and PAM4 modulation for ring-resonator-based silicon photonic links. MWSCAS 2015: 1-4 - [c21]Kunzhi Yu, Cheng Li, Tsung-Ching Huang, M. Ashkan Seyedi, Dacheng Zhou, Christopher Wilson, Daniel A. Berkram, Samuel Palermo, Jonathan Q. Smela, Marco Fiorentino
56 Gb/s PAM-4 optical receiver frontend in an advanced FinFET process. MWSCAS 2015: 1-4 - [c20]Kunzhi Yu, Chin-Hui Chen, Cheng Li, Hao Li, Alex Titriku, Binhao Wang, Ayman Shafik, Zhongkai Wang, Marco Fiorentino, Patrick Yin Chiang, Samuel Palermo:
25Gb/s hybrid-integrated silicon photonic receiver with microring wavelength stabilization. OFC 2015: 1-3 - [c19]Shengchang Cai, Ehsan Zhian Tabasy, Ayman Shafik, Shiva Kiran, Sebastian Hoyos, Samuel Palermo:
A 25GS/s 6b TI binary search ADC with soft-decision selection in 65nm CMOS. VLSIC 2015: 158- - [c18]Osama Elhadidy, Ashkan Roshan-Zamir, Hae-Woong Yang, Samuel Palermo:
A 32 Gb/s 0.55 mW/Gbps PAM4 1-FIR 2-IIR tap DFE receiver in 65-nm CMOS. VLSIC 2015: 224- - [c17]Carlos Briseno-Vidrios, Alexander Edward
A 75 MHz BW 68dB DR CT-ΣΔ modulator with single amplifier biquad filter and a broadband low-power common-gate summing technique. VLSIC 2015: 254- - 2014
- [j21]Cheng Li, Chin-Hui Chen, Marco Fiorentino
An Energy-Efficient Silicon Microring Resonator-Based Photonic Transmitter. IEEE Des. Test 31(5): 46-54 (2014) - [j20]Cheng Li, Rui Bai, Ayman Shafik, Ehsan Zhian Tabasy, Binhao Wang, Geng Tang, Chao Ma, Chin-Hui Chen, Zhen Peng, Marco Fiorentino
Silicon Photonic Transceiver Circuits With Microring Resonator Bias-Based Wavelength Stabilization in 65 nm CMOS. IEEE J. Solid State Circuits 49(6): 1419-1436 (2014) - [j19]Ehsan Zhian Tabasy, Ayman Shafik, Keytaek Lee, Sebastian Hoyos, Samuel Palermo:
A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications. IEEE J. Solid State Circuits 49(11): 2560-2574 (2014) - [j18]Young-Hoon Song, Noah Hae-Woong Yang, Hao Li, Patrick Yin Chiang, Samuel Palermo:
An 8-16 Gb/s, 0.65-1.05 pJ/b, Voltage-Mode Transmitter With Analog Impedance Modulation Equalization and Sub-3 ns Power-State Transitioning. IEEE J. Solid State Circuits 49(11): 2631-2643 (2014) - [j17]Cheng Li, Mark Browning, Paul V. Gratz
LumiNOC: A Power-Efficient, High-Performance, Photonic Network-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(6): 826-838 (2014) - [c16]Osama Elhadidy, Sherif Shakib, Keith Krenek, Samuel Palermo, Kamran Entesari:
A 0.18-μm CMOS fully integrated 0.7-6 GHz PLL-based complex dielectric spectroscopy system. CICC 2014: 1-4 - [c15]Shiva Kiran, Sebastian Hoyos, Samuel Palermo:
A single parity check forward error correction method for high speed I/O. GlobalSIP 2014: 652-655 - [c14]Rui Bai, Samuel Palermo, Patrick Yin Chiang:
2.5 A 0.25pJ/b 0.7V 16Gb/s 3-tap decision-feedback equalizer in 65nm CMOS. ISSCC 2014: 46-47 - [c13]Young-Hoon Song, Hae-Woong Yang, Hao Li, Patrick Yin Chiang, Samuel Palermo:
26.5 An 8-to-16Gb/s 0.65-to-1.05pJ/b 2-tap impedance-modulated voltage-mode transmitter with fast power-state transitioning in 65nm CMOS. ISSCC 2014: 446-447 - [c12]Noble Narku-Tetteh, Alex Titriku, Samuel Palermo:
A 15b, Sub-10ps resolution, low dead time, wide range two-stage TDC. MWSCAS 2014: 13-16 - [c11]Byungho Min, Noah Hae-Woong Yang, Samuel Palermo:
10 Gb/s adaptive receive-side near-end and far-end crosstalk cancellation circuitry. MWSCAS 2014: 77-80 - [c10]Hao Li, Shuai Chen, Liqiong Yang, Rui Bai, Weiwu Hu, Freeman Y. Zhong, Samuel Palermo, Patrick Yin Chiang:
A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS. VLSIC 2014: 1-2 - 2013
- [j16]Cheng Li, Samuel Palermo:
A Low-Power 26-GHz Transformer-Based Regulated Cascode SiGe BiCMOS Transimpedance Amplifier. IEEE J. Solid State Circuits 48(5): 1264-1275 (2013) - [j15]Young-Hoon Song, Rui Bai, Kangmin Hu, Noah Hae-Woong Yang, Patrick Yin Chiang, Samuel Palermo:
A 0.47-0.66 pJ/bit, 4.8-8 Gb/s I/O Transceiver in 65 nm CMOS. IEEE J. Solid State Circuits 48(5): 1276-1289 (2013) - [j14]Ehsan Zhian Tabasy, Ayman Shafik, Shan Huang, Noah Hae-Woong Yang, Sebastian Hoyos, Samuel Palermo:
A 6-b 1.6-GS/s ADC With Redundant Cycle One-Tap Embedded DFE in 90-nm CMOS. IEEE J. Solid State Circuits 48(8): 1885-1897 (2013) - [j13]Ehsan Zhian Tabasy, Mahmoud Kamarei, Shahin Jafarabadi-Ashtiani
Sequential Correlated Level Shifting: A Switched-Capacitor Approach for High-Accuracy Systems. IEEE Trans. Circuits Syst. II Express Briefs 60-II(12): 857-861 (2013) - [j12]Arun Palaniappan, Samuel Palermo:
A Design Methodology for Power Efficiency Optimization of High-Speed Equalized-Electrical I/O Architectures. IEEE Trans. Very Large Scale Integr. Syst. 21(8): 1421-1431 (2013) - [c9]Samuel Palermo, Kimo Tam:
High-speed wireline timing recovery & PLLs. CICC 2013: 1 - [c8]Cheng Li, Rui Bai, Ayman Shafik, Ehsan Zhian Tabasy, Geng Tang, Chao Ma, Chin-Hui Chen, Zhen Peng, Marco Fiorentino
A ring-resonator-based silicon photonics transceiver with bias-based wavelength stabilization and adaptive-power-sensitivity receiver. ISSCC 2013: 124-125 - [c7]Hao Huang
A TDC-based front-end for rapid impedance spectroscopy. MWSCAS 2013: 169-172 - [c6]Mark Browning, Cheng Li, Paul V. Gratz
LumiNOC: A low-latency, high-bandwidth per Watt, photonic Network-on-Chip. SLIP 2013: 1-4 - 2012
- [j11]Jun Zhou, Mario A. Ramirez, Samuel Palermo, Sebastian Hoyos:
Digital-Assisted Asynchronous Compressive Sensing Front-End. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(3): 482-492 (2012) - [j10]Xi Chen, Ehab Ahmed Sobhy, Zhuizhuan Yu, Sebastian Hoyos, José Silva-Martínez, Samuel Palermo, Brian M. Sadler
A Sub-Nyquist Rate Compressive Sensing Data Acquisition Front-End. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(3): 542-551 (2012) - [j9]Kangmin Hu, Rui Bai, Tao Jiang, Chao Ma, Ahmed Ragab, Samuel Palermo, Patrick Yin Chiang:
0.16-0.25 pJ/bit, 8 Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking. IEEE J. Solid State Circuits 47(8): 1842-1853 (2012) - [j8]Byungho Min, Keytaek Lee, Samuel Palermo:
A 20 Gb/s triple-mode (PAM-2, PAM-4, and duobinary) transmitter. Microelectron. J. 43(10): 687-696 (2012) - [j7]Young-Hoon Song, Samuel Palermo:
A 6-Gbit/s Hybrid Voltage-Mode Transmitter With Current-Mode Equalization in 90-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 59-II(8): 491-495 (2012) - [c5]Cheng Li, Mark Browning, Paul V. Gratz
LumiNOC: a power-efficient, high-performance, photonic network-on-chip for future parallel architectures. PACT 2012: 421-422 - [c4]Ehsan Zhian Tabasy, Ayman Shafik, S. Huang, N. Yang, Sebastian Hoyos, Samuel Palermo:
A 6b 1.6GS/s ADC with redundant cycle 1-tap embedded DFE in 90nm CMOS. CICC 2012: 1-4 - 2011
- [j6]Ahmed Ragab, Yang Liu, Kangmin Hu, Patrick Chiang, Samuel Palermo
Receiver Jitter Tracking Characteristics in High-Speed Source Synchronous Links. J. Electr. Comput. Eng. 2011: 982314:1-982314:15 (2011) - [j5]Sebastian Hoyos, Srikanth Pentakota, Zhuizhuan Yu, Ehab Sobhy Abdel Ghany, Xi Chen, Ramy Saad, Samuel Palermo, José Silva-Martínez:
Clock-Jitter-Tolerant Wideband Receivers: An Optimized Multichannel Filter-Bank Approach. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(2): 253-263 (2011) - [c3]Kangmin Hu, Tao Jiang, Samuel Palermo, Patrick Yin Chiang:
Low-power 8Gb/s near-threshold serial link receivers using super-harmonic injection locking in 65nm CMOS. CICC 2011: 1-4 - 2010
- [j4]Ian A. Young, Edris Mohammed, Jason T. S. Liao, Alexandra M. Kern, Samuel Palermo, Bruce A. Block, Miriam R. Reshotko, Peter L. D. Chang:
Optical technology for energy efficient I/O in high performance computing. IEEE Commun. Mag. 48(10): 184-191 (2010) - [j3]Ian A. Young, Edris Mohammed, Jason T. S. Liao, Alexandra M. Kern, Samuel Palermo, Bruce A. Block, Miriam R. Reshotko, Peter L. D. Chang:
Optical I/O Technology for Tera-Scale Computing. IEEE J. Solid State Circuits 45(1): 235-248 (2010) - [j2]Arun Palaniappan, Samuel Palermo:
Power Efficiency Comparisons of Interchip Optical Interconnect Architectures. IEEE Trans. Circuits Syst. II Express Briefs 57-II(5): 343-347 (2010)
2000 – 2009
- 2009
- [c2]Ian A. Young, Edris Mohammed, Jason T. S. Liao, Alexandra M. Kern, Samuel Palermo, Bruce A. Block, Miriam R. Reshotko, Peter L. D. Chang:
Optical I/O technology for tera-scale computing. ISSCC 2009: 468-469 - 2008
- [j1]Samuel Palermo, Azita Emami-Neyestanak
A 90 nm CMOS 16 Gb/s Transceiver for Optical Interconnects. IEEE J. Solid State Circuits 43(5): 1235-1246 (2008) - 2007
- [c1]Samuel Palermo, Azita Emami-Neyestanak
A 90nm CMOS 16Gb/s Transceiver for Optical Interconnects. ISSCC 2007: 44-586
Coauthor Index
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