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Hiroyuki Kondo
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2020 – today
- 2021
- [c30]Fukashi Morishita
, Norihito Kato, Satoshi Okubo, Takao Toi, Mitsuru Hiraki, Sugako Otani, Hideaki Abe, Yuji Shinohara, Hiroyuki Kondo:
A CMOS Image Sensor and an AI Accelerator for Realizing Edge-Computing-Based Surveillance Camera Systems. VLSI Circuits 2021: 1-2 - 2020
- [j14]Hiroyuki Kondo, Yasuhisa Shimazaki, Masao Ito, Minoru Uemura
A 28-nm Automotive Flash Microcontroller With Virtualization-Assisted Processor Supporting ISO26262 ASIL D. IEEE J. Solid State Circuits 55(1): 133-144 (2020) - [c29]Koji Yoichi, Sugako Otani, Kazutoshi Tsuda, Naoya Tokimoto, Hideki Kamegawa, Yoshihisa Satou, Shioto Tanaka, Hideki Otsu, Mitsuru Hiraki, Masao Ito, Mitsuya Fukazawa, Hiroyuki Kondo:
A High-Precision Analog Front End Integrated in a 32bit Microcontroller for Industrial Sensing Applications. A-SSCC 2020: 1-4
2010 – 2019
- 2019
- [j13]Masanori Hayashikoshi, Hiroaki Tanizaki, Yasumitsu Murai, Takaharu Tsuji, Kiyoshi Kawabata, Koji Nii, Hideyuki Noda, Hiroyuki Kondo, Yoshio Matsuda, Hideto Hidaka:
A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications. IEICE Trans. Electron. 102-C(4): 287-295 (2019) - [c28]Sugako Otani, Norimasa Otsuki, Yasufumi Suzuki, Naoto Okumura, Shohei Maeda, Tomonori Yanagita, Takao Koike, Yasuhisa Shimazaki, Masao Ito, Minoru Uemura, Toshihiro Hattori, Tadaaki Yamauchi, Hiroyuki Kondo:
A 28nm 600MHz Automotive Flash Microcontroller with Virtualization-Assisted Processor for Next-Generation Automotive Architecture Complying with ISO26262 ASIL-D. ISSCC 2019: 54-56 - [c27]Ken Matsubara, Tsutomu Nagasawa, Yoshinobu Kaneda, Hidenori Mitani, Hiroshi Sato, Takashi Iwase, Yasunobu Aoki, Keiichi Maekawa, Hideaki Yamakoshi, Takashi Ito, Hiroyuki Kondo, Takashi Kono:
A 65nm Silicon-on-Thin-Box (SOTB) Embedded 2T-MONOS Flash Achieving 0.22 pJ/bit Read Energy with 64 MHz Access for IoT Applications. VLSI Circuits 2019: 202- - [c26]Akihiko Kanda, Takashi Kurafuji, Koichi Takeda, Tomoya Ogawa, Yasuhiko Taito, Kazuo Yoshihara, Masaya Nakano, Takashi Ito, Hiroyuki Kondo, Takashi Kono:
A 24MB Embedded Flash System Based on 28nm SG-MONOS Featuring 240MHz Read Operations and Robust Over-The-Air Software Update for Automotive. VLSI Circuits 2019: 210- - 2018
- [j12]Masanori Hayashikoshi
Low-Power Multi-Sensor System with Power Management and Nonvolatile Memory Access Control for IoT Applications. IEEE Trans. Multi Scale Comput. Syst. 4(4): 784-792 (2018) - [c25]Mitsuru Hiraki, Sugako Otani, Masao Ito, Takuya Mizokami, Masahiro Araki, Hiroyuki Kondo:
A Capacitance-to-Digital Converter Integrated in a 32bit Microcontroller for 3D Gesture Sensing. A-SSCC 2018: 269-272 - 2017
- [c24]Masanori Hayashikoshi, Hideyuki Noda, Hiroyuki Kawai, Koji Nii, Hiroyuki Kondo:
Low-power multi-sensor system with task scheduling and autonomous standby mode transition control for IoT applications. COOL Chips 2017: 1-3 - [c23]Hayato Kimura, Hideyuki Noda, Hisaaki Watanabe, Takashi Higuchi, Ryosaku Kobayashi, Masayuki Utsuno, Fumitake Takami, Sugako Otani, Masayuki Ito, Yasuhisa Shimazaki, Naoki Yada, Hiroyuki Kondo:
3.5 A 40nm flash microcontroller with 0.80µs field-oriented-control intelligent motor timer and functional safety system for next-generation EV/HEV. ISSCC 2017: 58-59 - 2016
- [c22]Masanori Hayashikoshi, Hideyuki Noda, Hiroyuki Kawai, Hiroyuki Kondo:
Low-power multi-sensor system with normally-off sensing technology for IoT applications. ISOCC 2016: 195-196 - 2015
- [j11]Sugako Otani, Hiroyuki Kondo:
RX v2: Renesas's New-Generation MCU Processor. IEICE Trans. Electron. 98-C(7): 544-549 (2015) - [c21]Tadaaki Yamauchi, Hiroyuki Kondo, Koji Nii:
Automotive low power technology for IoT society. VLSIC 2015: 80- - 2013
- [c20]Sugako Otani, Naoshi Ishikawa, Hiroyuki Kondo:
RXv2 processor core for low-power microcontrollers. COOL Chips 2013: 1-3 - 2012
- [j10]Masanori Kurimoto, Takeshi Yamamoto, Satoshi Nakano, Atsuto Hanami, Hiroyuki Kondo:
Verification work reduction methodology in low-power chip implementation. ACM Trans. Design Autom. Electr. Syst. 18(1): 12:1-12:15 (2012) - 2011
- [j9]Toru Shimizu, Kazutami Arimoto, Osamu Nishii, Sugako Otani, Hiroyuki Kondo:
Low Power Platform for Embedded Processor LSIs. IEICE Trans. Electron. 94-C(4): 394-400 (2011) - [j8]Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Toshihiro Hanawa
Peach: A Multicore Communication System on Chip with PCI Express. IEEE Micro 31(6): 39-50 (2011) - [j7]Jumpei Arata, Hiroyuki Kondo, Norio Ikedo, Hideo Fujimoto:
Haptic Device Using a Newly Developed Redundant Parallel Mechanism. IEEE Trans. Robotics 27(2): 201-214 (2011) - [c19]Yasunobu Nakase, Shinichi Hirose, Toru Goda, Kehui Hu, Hiroshi Onoda, Yasuhiro Ido, Hiroyuki Kondo, Wei Kong, Wei Zhang, Tsukasa Oishi, Shintaro Mori, Toru Shimizu:
0.8V start-up 92% efficiency on-chip boost DC-DC converters for battery operation micro-computers. A-SSCC 2011: 21-24 - [c18]Masanori Kurimoto, Yasuhiko Takahashi, Yuji Fujiwara, Mamoru Sakugawa, Souichi Kobayashi, Hiroyuki Kondo:
System performance and energy consumption improvement methodology by delay adjustable synchronizer. A-SSCC 2011: 393-396 - [c17]Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa
An 80 Gbps dependable multicore communication SoC with PCI express I/F and intelligent interrupt controller. COOL Chips 2011: 1-3 - [c16]Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Yasushi Hayakawa, Takeshi Oshita, Satoshi Kaneko, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa
An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs. ISSCC 2011: 266-268 - 2010
- [c15]Yoshimasa Ochi, Hiroyuki Kondo:
PID controller design based on optimal servo and v-gap metric. ACC 2010: 1091-1096 - [c14]Hiroyuki Kondo, Yoshimasa Ochi:
Plant-model reduction for PID controller design. CDC 2010: 6201-6206
2000 – 2009
- 2009
- [j6]Hiroyuki Kondo, Sugako Otani, Masami Nakajima, Osamu Yamamoto, Norio Masui, Naoto Okumura, Mamoru Sakugawa, Masaya Kitao, Koichi Ishimi, Masayuki Sato, Fumitaka Fukuzawa, Satoshi Imasu, Nobuhiro Kinoshita, Yusuke Ota, Kazutami Arimoto, Toru Shimizu:
Heterogeneous Multicore SoC With SiP for Secure Multimedia Applications. IEEE J. Solid State Circuits 44(8): 2251-2259 (2009) - [c13]Jumpei Arata, Hiroyuki Kondo, Masamichi Sakaguchi, Hideo Fujimoto:
A haptic device DELTA-4: Kinematics and its analysis. WHC 2009: 452-457 - [c12]Jumpei Arata, Hiroyuki Kondo, Masamichi Sakaguchi, Hideo Fujimoto:
Development of a haptic device "DELTA-4" using parallel link mechanism. ICRA 2009: 294-300 - [c11]Hiroaki Ohshima
Web information credibility analysis by geographical social support. IUCS 2009: 193-196 - 2008
- [j5]Hiroyuki Kondo, Masami Nakajima, Norio Masui, Sugako Otani, Naoto Okumura, Yukari Takata, Takashi Nasu, Hirokazu Takata, Takashi Higuchi, Mamoru Sakugawa, Hayato Fujiwara, Kazuya Ishida, Koichi Ishimi, Satoshi Kaneko, Teruyuki Itoh, Masayuki Sato, Osamu Yamamoto, Kazutami Arimoto:
Design and Implementation of a Configurable Heterogeneous Multicore SoC With Nine CPUs and Two Matrix Processors. IEEE J. Solid State Circuits 43(4): 892-901 (2008) - [c10]Hiroyuki Kondo, Masami Nakajima, Sugako Otani, Osamu Yamamoto, Norio Masui, Naoto Okumura, Mamoru Sakugawa, Masaya Kitao, Koichi Ishimi, Masayuki Sato, Fumitaka Fukuzawa, Kazuhiro Inaoka, Yoshihiro Saito, Kazutami Arimoto, Toru Shimizu:
Heterogeneous multicore SoC for secure multimedia applications. CICC 2008: 675-678 - [c9]Taro Tezuka, Hiroyuki Kondo, Katsumi Tanaka:
Estimation of Geographic Relevance for Web Objects Using Probabilistic Models. W2GIS 2008: 124-139 - 2007
- [j4]Hideyuki Noda, Masami Nakajima, Katsumi Dosaka, Kiyoshi Nakata, Motoki Higashida, Osamu Yamamoto, Katsuya Mizumoto, Tetsushi Tanizaki, Takayuki Gyohten, Yoshihiro Okuno, Hiroyuki Kondo, Yukihiko Shimazu, Kazutami Arimoto, Kazunori Saito, Toru Shimizu:
The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture. IEEE J. Solid State Circuits 42(1): 183-192 (2007) - [c8]Satoshi Nakamura, Shinji Konishi, Adam Jatowt, Hiroaki Ohshima
Trustworthiness Analysis of Web Search Results. ECDL 2007: 38-49 - 2006
- [j3]Hitoshi Kubota, Kazumasa Suzuki, Isamu Kawakimi, Mamoru Sakugawa, Hiroyuki Kondo:
High frequency band dispersed-tone power line communication modem for networked appliances. IEEE Trans. Consumer Electron. 52(1): 44-50 (2006) - [c7]Masami Nakajima, Hideyuki Noda, Katsumi Dosaka, Kiyoshi Nakata, Motoki Higashida, Osamu Yamamoto, Katsuya Mizumoto, Hiroyuki Kondo, Yukihiko Shimazu, Kazutami Arimoto, Kazunori Saitoh, Toru Shimizu:
A 40GOPS 250mW massively parallel processor based on matrix architecture. ISSCC 2006: 1616-1625 - 2005
- [j2]Hiroyuki Kondo, Masami Nakajima, Miroslaw Bober, Krzysztof Kucharski, Osamu Yamamoto, Toru Shimizu:
Implementation of Face Recognition Processing Using an Embedded Processor. J. Robotics Mechatronics 17(4): 428-436 (2005) - 2004
- [j1]Satoshi Kaneko, Hiroyuki Kondo, Norio Masui, Koichi Ishimi, Teruyuki Itou, Masayuki Satou, Naoto Okumura, Yukari Takata, Hirokazu Takata, Mamoru Sakugawa, Takashi Higuchi, Sugako Ohtani, Kei Sakamoto, Naoshi Ishikawa, Masami Nakajima, Shunichi Iwata, Kiyoshi Hayase, Satoshi Nakano, Sachiko Nakazawa, Kunihiro Yamada, Toru Shimizu:
A 600-MHz single-chip multiprocessor with 4.8-GB/s internal shared pipelined bus and 512-kB internal memory. IEEE J. Solid State Circuits 39(1): 184-193 (2004) - 2001
- [c6]Akiyo Nadamoto, Hiroyuki Kondo, Katsumi Tanaka:
WebCarrousel: Restructuring Web Search Results for Passive Viewing in Mobile Environments. DASFAA 2001: 164-165 - [c5]Akiyo Nadamoto, Hiroyuki Kondo, Katsumi Tanaka:
WebCarousel: Automatic Presentation and Semantic Restructuring of Web Search Result for Mobile Environments. DEXA 2001: 712-722 - [c4]Takeshi Matsukura, Hiroyuki Kondo, Yoichi Hirata, Katsumi Tanaka:
Discovery of Semantic Relationships among Web Pages Based on Web Topic Structures. DS-9 2001: 171-185 - 2000
- [c3]Katsumi Tanaka, Akiyo Nadamoto, Machiko Kusahara, Taeko Hattori, Hiroyuki Kondo, Kazutoshi Sumiya:
Back to the TV: Information Visualization Interfaces based on TV-Program Metaphors. IEEE International Conference on Multimedia and Expo (III) 2000: 1229-1232
1990 – 1999
- 1999
- [c2]Qiang Ma, Hiroyuki Kondo, Kazutoshi Sumiya, Katsumi Tanaka:
Virtual TV Channel: Filtering, Merging and Presenting Internet Broadcasting Channels. WOWS 1999: 32-43 - 1994
- [c1]Masahito Matsuo, Hiroyuki Kondo, Yukari Takata, Souichi Kobayashi, Mitsugu Satoh, Toyohiko Yoshida, Yuichi Saitoh, Jun-ichi Hinata:
A 32-bit Superscalar Microprocessor with 64-Bit Processing and High Bandwidth DRAM Interface. ICCD 1994: 203-210
Coauthor Index
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