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Tadaaki Yamauchi
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2010 – 2019
- 2019
- [c13]Sugako Otani, Norimasa Otsuki, Yasufumi Suzuki, Naoto Okumura, Shohei Maeda, Tomonori Yanagita, Takao Koike, Yasuhisa Shimazaki, Masao Ito, Minoru Uemura, Toshihiro Hattori, Tadaaki Yamauchi, Hiroyuki Kondo:
A 28nm 600MHz Automotive Flash Microcontroller with Virtualization-Assisted Processor for Next-Generation Automotive Architecture Complying with ISO26262 ASIL-D. ISSCC 2019: 54-56 - 2018
- [p1]Takashi Kono, Tomoya Saito, Tadaaki Yamauchi:
Overview of Embedded Flash Memory Technology. Embedded Flash Memory for Embedded Systems 2018: 29-74 - 2016
- [j5]Yasuhiko Taito, Takashi Kono, Masaya Nakano, Tomoya Saito, Takashi Ito, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi:
A 28 nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macro for Automotive Achieving 6.4 GB/s Read Throughput by 200 MHz No-Wait Read Operation and 2.0 MB/s Write Throughput at Tj of 170°C. IEEE J. Solid State Circuits 51(1): 213-221 (2016) - [c12]Masami Nakajima, Ichiro Naka, Fumihiro Matsushima, Tadaaki Yamauchi:
A 20uA/MHz at 200MHz microcontroller with low power memory access scheme for small sensing nodes. COOL Chips 2016: 1-3 - [c11]Hidenori Mitani, Ken Matsubara, Hiroshi Yoshida, Takashi Hashimoto, Hideaki Yamakoshi, Shinichiro Abe, Takashi Kono, Yasuhiko Taito, Takashi Ito, Takashi Krafuji, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi:
7.6 A 90nm embedded 1T-MONOS flash macro for automotive applications with 0.07mJ/8kB rewrite energy and endurance over 100M cycles under Tj of 175°C. ISSCC 2016: 140-141 - 2015
- [c10]Yasuhiko Taito, Masaya Nakano, Hiromi Okimoto, Daisuke Okada, Takashi Ito, Takashi Kono, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi:
7.3 A 28nm embedded SG-MONOS flash macro for automotive achieving 200MHz read operation and 2.0MB/S write throughput at Ti, of 170°C. ISSCC 2015: 1-3 - [c9]Tadaaki Yamauchi:
Prospect of embedded non-volatile memory in the smart society. VLSI-DAT 2015: 1-2 - [c8]N. Sugii, G. Jurczak, Masanao Yamaoka, A. Molnar, J. Tham, T. Piliszczuk, O. Nalamasu, J. Hausner, Shu Tanaka, Tadaaki Yamauchi, S. Sivaram, C. Diaz, W. Dai:
Technology/circuits joint evening panel discussion semiconductor industry in 2020: Evolution or revolution? VLSIC 2015: 22- - [c7]Tadaaki Yamauchi, Hiroyuki Kondo, Koji Nii:
Automotive low power technology for IoT society. VLSIC 2015: 80- - 2014
- [j4]Takashi Kono, Takashi Ito, Tamaki Tsuruda, Takayuki Nishiyama, Tsutomu Nagasawa, Tomoya Ogawa, Yoshiyuki Kawashima, Hideto Hidaka, Tadaaki Yamauchi:
40-nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macros for Automotive With 160-MHz Random Access for Code and Endurance Over 10 M Cycles for Data at the Junction Temperature of 170°C. IEEE J. Solid State Circuits 49(1): 154-166 (2014) - 2013
- [c6]Takashi Kono, Takashi Ito, Tamaki Tsuruda, Takayuki Nishiyama, Tsutomu Nagasawa, Tomoya Ogawa, Yoshiyuki Kawashima, Hideto Hidaka, Tadaaki Yamauchi:
40nm embedded SG-MONOS flash macros for automotive with 160MHz random access for code and endurance over 10M cycles for data. ISSCC 2013: 212-213 - 2012
- [c5]Tadaaki Yamauchi, Satoru Hanzawa:
Session 25 overview: Non-volatile memory solutions: Memory subcommittee. ISSCC 2012: 420-421 - [c4]Ken Takeuchi, Jan Crols, Kevin Zhang, Mike Clinton, Tadaaki Yamauchi:
Robust VLSI circuit design & systems for sustainable society. ISSCC 2012: 500-501 - 2011
- [c3]Ken Takeuchi, Ken Chang, Kevin Zhang, Tadaaki Yamauchi, Roberto Gastaldi:
Ultra-low voltage VLSIs for energy efficient systems. ISSCC 2011: 514-515
2000 – 2009
- 2001
- [j3]Tadaaki Yamauchi, Mitsuya Kinoshita, Teruhiko Amano, Katsumi Dosaka, Kazutami Arimoto, Hideyuki Ozaki, Michihiro Yamada, Tsutomu Yoshihara:
Design methodology of embedded DRAM with virtual-socket architecture. IEEE J. Solid State Circuits 36(1): 46-54 (2001) - 2000
- [j2]Tadaaki Yamauchi, Fukashi Morishita
, Shigenobu Maeda, Kazutami Arimoto, Kazuyasu Fujishima, Hideyuki Ozaki, Tsutomu Yoshihara:
High-performance embedded SOI DRAM architecture for the low-power supply. IEEE J. Solid State Circuits 35(8): 1169-1178 (2000) - [c2]Mitsuya Kinoshita, Tadaaki Yamauchi, Teruhiko Amano, Katsumi Dosaka, Kenshin Arimoto:
Design methodology of the embedded DRAM with the virtual socket architecture. CICC 2000: 271-274
1990 – 1999
- 1997
- [c1]Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun:
The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors. ARVLSI 1997: 303-319 - 1996
- [j1]Tadaaki Yamauchi, Yoshikazu Morooka, Hideyuki Ozaki:
A low power and high speed data transfer scheme with asynchronous compressed pulse width modulation for AS-Memory. IEEE J. Solid State Circuits 31(4): 523-530 (1996)
Coauthor Index
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