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Alaa R. Alameldeen
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2020 – today
- 2022
- [j12]Hai Li
, Alaa R. Alameldeen, Onur Mutlu:
Guest Editors' Introduction: Near-Memory and In-Memory Processing. IEEE Des. Test 39(2): 46-47 (2022) - 2021
- [c27]Mohammad Behnia, Prateek Sahu, Riccardo Paccagnella
Speculative interference attacks: breaking invisible speculation schemes. ASPLOS 2021: 1046-1060 - [c26]Abanti Basak, Zheng Qu, Jilan Lin
Improving Streaming Graph Processing Performance using Input Knowledge. MICRO 2021: 1036-1050 - 2020
- [c25]Meysam Taassori, Rajeev Balasubramonian, Siddhartha Chhabra, Alaa R. Alameldeen, Manjula Peddireddy, Rajat Agarwal, Ryan Stutsman:
Compact Leakage-Free Support for Integrity and Reliability. ISCA 2020: 735-748 - [c24]Abanti Basak, Jilan Lin
SAGA-Bench: Software and Hardware Characterization of Streaming Graph Analytics Workloads. ISPASS 2020: 12-23 - [i4]Mohammad Behnia, Prateek Sahu, Riccardo Paccagnella, Jiyong Yu, Zirui Neil Zhao, Xiang Zou, Thomas Unterluggauer, Josep Torrellas, Carlos V. Rozas, Adam Morrison, Frank McKeen, Fangfei Liu, Ron Gabor, Christopher W. Fletcher, Abhishek Basak, Alaa R. Alameldeen:
Speculative Interference Attacks: Breaking Invisible Speculation Schemes. CoRR abs/2007.11818 (2020)
2010 – 2019
- 2019
- [j11]Berkin Akin
A Case For Asymmetric Processing in Memory. IEEE Comput. Archit. Lett. 18(1): 22-25 (2019) - [c23]Berkin Akin, Zeshan A. Chishti, Alaa R. Alameldeen:
ZCOMP: Reducing DNN Cross-Layer Memory Footprint Using Vector Extensions. MICRO 2019: 126-138 - 2018
- [j10]Esha Choukse
CompressPoints: An Evaluation Methodology for Compressed Memory Systems. IEEE Comput. Archit. Lett. 17(2): 126-129 (2018) - [c22]Alaa R. Alameldeen, Rajat Agarwal:
Opportunistic compression for direct-mapped DRAM caches. MEMSYS 2018: 129-136 - [c21]Jagadish B. Kotra, Haibo Zhang, Alaa R. Alameldeen, Chris Wilkerson, Mahmut T. Kandemir:
CHAMELEON: A Dynamically Reconfigurable Heterogeneous Memory System. MICRO 2018: 533-545 - [c20]Esha Choukse, Mattan Erez
Compresso: Pragmatic Main Memory Compression. MICRO 2018: 546-558 - [i3]Kevin K. Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Reducing DRAM Refresh Overheads with Refresh-Access Parallelism. CoRR abs/1805.01289 (2018) - 2017
- [j9]Samira Manabi Khan, Chris Wilkerson, Donghyuk Lee, Alaa R. Alameldeen, Onur Mutlu:
A Case for Memory Content-Based Detection and Mitigation of Data-Dependent Failures in DRAM. IEEE Comput. Archit. Lett. 16(2): 88-93 (2017) - [c19]Elizabeth Reed, Alaa R. Alameldeen, Helia Naeimi, Patrick Stolt:
Probabilistic replacement strategies for improving the lifetimes of NVM-based caches. MEMSYS 2017: 166-176 - [c18]Samira Manabi Khan, Chris Wilkerson, Zhe Wang, Alaa R. Alameldeen, Donghyuk Lee, Onur Mutlu:
Detecting and mitigating data-dependent DRAM failures by exploiting current memory content. MICRO 2017: 27-40 - [i2]Kevin K. Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Improving DRAM Performance by Parallelizing Refreshes with Accesses. CoRR abs/1712.07754 (2017) - 2016
- [c17]Jayesh Gaur, Alaa R. Alameldeen, Sreenivas Subramoney
Base-Victim Compression: An Opportunistic Cache Compression Architecture. ISCA 2016: 317-328 - [i1]Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Reducing Performance Impact of DRAM Refresh by Parallelizing Refreshes with Accesses. CoRR abs/1601.06352 (2016) - 2014
- [c16]Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Improving DRAM performance by parallelizing refreshes with accesses. HPCA 2014: 356-367 - [c15]Samira Manabi Khan, Alaa R. Alameldeen, Chris Wilkerson, Onur Mutlu, Daniel A. Jiménez
Improving cache performance using read-write partitioning. HPCA 2014: 452-463 - [c14]Jaewoong Sim, Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Hyesoon Kim:
Transparent Hardware Management of Stacked DRAM as Part of Memory. MICRO 2014: 13-24 - [c13]Samira Manabi Khan, Donghyuk Lee, Yoongu Kim, Alaa R. Alameldeen, Chris Wilkerson, Onur Mutlu:
The efficacy of error mitigation techniques for DRAM retention failures: a comparative experimental study. SIGMETRICS 2014: 519-532 - 2013
- [c12]Samira Manabi Khan, Alaa R. Alameldeen, Chris Wilkerson, Jaydeep Kulkarni, Daniel A. Jiménez
Improving multi-core performance using mixed-cell cache architecture. HPCA 2013: 119-130 - 2012
- [c11]Amr Helmy, Alaa R. Alameldeen:
Redundancy and ECC mechanisms to improve energy efficiency of on-die interconnects. ICEAC 2012: 1-6 - 2011
- [j8]Alaa R. Alameldeen:
Guest Editor's Introduction. J. Instr. Level Parallelism 13 (2011) - [j7]Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Wei Wu, Shih-Lien Lu:
Adaptive Cache Design to Enable Reliable Low-Voltage Operation. IEEE Trans. Computers 60(1): 50-63 (2011) - [c10]Alaa R. Alameldeen, Ilya Wagner, Zeshan Chishti, Wei Wu, Chris Wilkerson, Shih-Lien Lu:
Energy-efficient cache design using variable-strength error-correcting codes. ISCA 2011: 461-472 - 2010
- [c9]Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chishti, Wei Wu, Dinesh Somasekhar, Shih-Lien Lu:
Reducing cache power with low-cost, multi-bit error-correcting codes. ISCA 2010: 83-93
2000 – 2009
- 2009
- [j6]Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah
Trading Off Cache Capacity for Low-Voltage Operation. IEEE Micro 29(1): 96-103 (2009) - [j5]Keith A. Bowman
Impact of Die-to-Die and Within-Die Parameter Variations on the Clock Frequency and Throughput of Multi-Core Processors. IEEE Trans. Very Large Scale Integr. Syst. 17(12): 1679-1690 (2009) - [c8]Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Wei Wu, Shih-Lien Lu:
Improving cache lifetime reliability at ultra-low voltages. MICRO 2009: 89-99 - 2008
- [c7]Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah
Trading off Cache Capacity for Reliability to Enable Low Voltage Operation. ISCA 2008: 203-214 - 2007
- [c6]Alaa R. Alameldeen, David A. Wood:
Interactions Between Compression and Prefetching in Chip Multiprocessors. HPCA 2007: 228-239 - [c5]Keith A. Bowman
Impact of die-to-die and within-die parameter variations on the throughput distribution of multi-core processors. ISLPED 2007: 50-55 - 2006
- [j4]Alaa R. Alameldeen, David A. Wood:
IPC Considered Harmful for Multiprocessor Workloads. IEEE Micro 26(4): 8-17 (2006) - 2005
- [j3]Milo M. K. Martin, Daniel J. Sorin, Bradford M. Beckmann, Michael R. Marty, Min Xu, Alaa R. Alameldeen, Kevin E. Moore, Mark D. Hill, David A. Wood:
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset. SIGARCH Comput. Archit. News 33(4): 92-99 (2005) - 2004
- [c4]Alaa R. Alameldeen, David A. Wood:
Adaptive Cache Compression for High-Performance Processors. ISCA 2004: 212-223 - 2003
- [j2]Alaa R. Alameldeen, Milo M. K. Martin, Carl J. Mauer, Kevin E. Moore, Min Xu, Mark D. Hill, David A. Wood, Daniel J. Sorin:
Simulating a $2M Commercial Server on a $2K PC. Computer 36(2): 50-57 (2003) - [j1]Alaa R. Alameldeen, David A. Wood:
Addressing Workload Variability in Architectural Simulations. IEEE Micro 23(6): 94-98 (2003) - [c3]Alaa R. Alameldeen, David A. Wood:
Variability in Architectural Simulations of Multi-Threaded Workloads. HPCA 2003: 7-18 - 2001
- [c2]Ashraf Aboulnaga, Alaa R. Alameldeen, Jeffrey F. Naughton:
Estimating the Selectivity of XML Path Expressions for Internet Scale Applications. VLDB 2001: 591-600 - 2000
- [c1]Milo M. K. Martin, Daniel J. Sorin, Anastassia Ailamaki, Alaa R. Alameldeen, Ross M. Dickson, Carl J. Mauer, Kevin E. Moore, Manoj Plakal, Mark D. Hill, David A. Wood:
Timestamp snooping: an approach for extending SMPs. ASPLOS 2000: 25-36
Coauthor Index
aka: Zeshan A. Chishti
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