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Po-Yuan Chen
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2020 – today
- 2023
- [c21]Po-Yuan Chen, Hung-Che Lin, Jiun-In Guo:
Multi-Scale Dynamic Fixed-Point Quantization and Training for Deep Neural Networks. ISCAS 2023: 1-5 - [c20]Zhi-Hong Lee, Chen-Han Lu, Hsin-Hung Pan, Ting-Chi Wang, Po-Yuan Chen, Cindy Chin-Fang Shen:
A Robust Routing Guide Generation Approach for Mixed-Size Designs. MLCAD 2023: 1-6 - 2022
- [c19]Po-Yuan Chen, Fang-Yi Gu, Yu-Hong Huang, Ing-Chao Lin:
WRAP: Weight RemApping and Processing in RRAM-based Neural Network Accelerators Considering Thermal Effect. DATE 2022: 1245-1250 - [c18]Kuei-Huan Chang, Hsin-Hung Pan, Ting-Chi Wang, Po-Yuan Chen, Cindy Chin-Fang Shen:
On Predicting Solution Quality of Maze Routing Using Convolutional Neural Network. ISQED 2022: 1-6
2010 – 2019
- 2016
- [j11]Min-Hung Chen
, Po-Yuan Chen, Ching-Hsing Luo:
Quadratic adaptive algorithm for solving cardiac action potential models. Comput. Biol. Medicine 77: 261-273 (2016) - 2013
- [j10]Meng-Hui Wang
Using Extension Theory to Design a Low-Cost and High-Accurate Personal Recognition System. Int. J. Distributed Sens. Networks 9 (2013) - [j9]Po-Yuan Chen, Chin-Lung Su, Chao-Hsun Chen, Cheng-Wen Wu
Generalization of an Enhanced ECC Methodology for Low Power PSRAM. IEEE Trans. Computers 62(7): 1318-1331 (2013) - [c17]Po-Yuan Chen, San-Yih Hwang, Chien-Hsiang Lee:
A Dynamic Service Composition Architecture in Supporting Reliable Web Service Selection. ICSSI 2013: 237-238 - [c16]Po-Yuan Chen:
Optimal Bankruptcy Decisions of Supply Chain Agents under Uncertainty. TAAI 2013: 355-358 - 2012
- [j8]Po-Yuan Chen, Horng-Jinh Chang:
Decision support for foreign investment strategy under hybrid uncertainty. Expert Syst. Appl. 39(4): 4582-4589 (2012) - [j7]Masahito Jinno, Po-Yuan Chen, Ming-Shih Lin, Katsuaki Murata, Koosuke Harada:
Research on the Self Turn-On of Synchronous Rectifiers. IEICE Trans. Commun. 95-B(7): 2286-2295 (2012) - [c15]Tze-Hsin Wu, Po-Yuan Chen, Mincent Lee, Bin-Yen Lin, Cheng-Wen Wu
A memory yield improvement scheme combining built-in self-repair and error correction codes. ITC 2012: 1-9 - [c14]Ying-Wen Chou, Po-Yuan Chen, Mincent Lee, Cheng-Wen Wu
Cost modeling and analysis for interposer-based three-dimensional IC. VTS 2012: 108-113 - 2011
- [c13]Po-Yuan Chen
Predication the Suppressing Human Oral Cancer Cell Line by Curcumin through the Research of Fas Receptor. BIBE 2011: 209-212 - 2010
- [j6]Masahito Jinno, Po-Yuan Chen, Yu-Chun Lai, Koosuke Harada:
Investigation on the Ripple Voltage and the Stability of SR Buck Converters With High Output Current and Low Output Voltage. IEEE Trans. Ind. Electron. 57(3): 1008-1016 (2010) - [c12]Po-Yuan Chen, Cheng-Wen Wu
On-chip testing of blind and open-sleeve TSVs for 3D IC before bonding. VTS 2010: 263-268
2000 – 2009
- 2009
- [j5]Po-Yuan Chen, Kuan-Hsien Ho, TingTing Hwang:
Skew-aware polarity assignment in clock tree. ACM Trans. Design Autom. Electr. Syst. 14(2): 31:1-31:17 (2009) - [j4]Po-Yuan Chen, Chiao-Chen Fang, TingTing Hwang, Hsi-Pin Ma:
Leakage reduction, delay compensation using partition-based tunable body-biasing techniques. ACM Trans. Design Autom. Electr. Syst. 14(4): 53:1-53:22 (2009) - [c11]Po-Yuan Chen, Cheng-Wen Wu
On-Chip TSV Testing for 3D IC before Bonding Using Sense Amplification. Asian Test Symposium 2009: 450-455 - [c10]Po-Yuan Chen
Exploring the Receptor-Based Virtual Screening Study of the Aromatic Substituents for the Hepatitis C Virus NS5B Polymerase by Docking and Scoring. BIBE 2009: 284-289 - [c9]Po-Yuan Chen
The MAPK Signal Pathway Research and New Drug Discovery. BIBE 2009: 370-373 - 2008
- [j3]Po-Yuan Chen, Masahito Jinno, Yu-Min Shie:
Research on the Reverse Conduction of Synchronous Rectifiers. IEEE Trans. Ind. Electron. 55(4): 1570-1575 (2008) - [c8]Winston Yu-Chen Chen, Po-Yuan Chen
Exploring 3D-QSAR pharmacophore mapping of azaphenanthrenone derivatives for mPGES-1 inhibition Using HypoGen technique. CIBCB 2008: 207-213 - [c7]Po-Yuan Chen, Che-Yu Liu, TingTing Hwang:
Transition-aware decoupling-capacitor allocation in power noise reduction. ICCAD 2008: 426-429 - 2007
- [j2]Wen-Wen Hsieh, Po-Yuan Chen, Chun-Yao Wang, TingTing Hwang:
A Bus-Encoding Scheme for Crosstalk Elimination in High-Performance Processor Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(12): 2222-2227 (2007) - [c6]Po-Yuan Chen, Kuan-Hsien Ho, TingTing Hwang:
Skew aware polarity assignment in clock tree. ICCAD 2007: 376-379 - [c5]Ching-Hsing Luo, Po-Yuan Chen, Chun-Hao Teng, Sheng-Nan Wu
Reliability Analysis of Physiological Phenomena by Cardiac Action Potential Model. ISCAS 2007: 2890-2893 - 2006
- [j1]Tai-Yi Huang, Chih-Chieh Chou, Po-Yuan Chen:
Bounding DMA Interference on Hard-Real-Time Embedded Systems. J. Inf. Sci. Eng. 22(5): 1229-1247 (2006) - [c4]Yu-Hui Huang, Po-Yuan Chen, TingTing Hwang:
Switching-activity driven gate sizing and Vth assignment for low power design. ASP-DAC 2006: 576-581 - [c3]Wen-Wen Hsieh, Po-Yuan Chen, TingTing Hwang:
A bus architecture for crosstalk elimination in high performance processor design. CODES+ISSS 2006: 247-252 - [c2]Po-Yuan Chen, Yi-Ting Yeh, Chao-Hsun Chen, Jen-Chieh Yeh, Cheng-Wen Wu
An Enhanced EDAC Methodology for Low Power PSRAM. ITC 2006: 1-10 - 2003
- [c1]Tai-Yi Huang, Chih-Chieh Chou, Po-Yuan Chen:
Bounding the Execution Times of DMA I/O Tasks on Hard-Real-Time Embedded Systems. RTCSA 2003: 499-512
Coauthor Index
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