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Chih-Chieh Chou
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2020 – today
- 2022
- [j4]Chandrahas Tirumalasetty
, Chih-Chieh Chou
Reducing Minor Page Fault Overheads through Enhanced Page Walker. ACM Trans. Archit. Code Optim. 19(4): 57:1-57:26 (2022) - 2021
- [i1]Chandrahas Tirumalasetty, Chih-Chieh Chou, A. L. Narasimha Reddy, Paul Gratz, Ayman Abouelwafa:
Reducing Minor Page Fault Overheads through Enhanced Page Walker. CoRR abs/2112.14013 (2021) - 2020
- [j3]Chih-Chieh Chou
Virtualize and share non-volatile memories in user space. CCF Trans. High Perform. Comput. 2(1): 16-35 (2020)
2010 – 2019
- 2019
- [c4]Chih-Chieh Chou
vNVML: An Efficient User Space Library for Virtualizing and Sharing Non-Volatile Memories. MSST 2019: 103-115 - [c3]Chih-Chieh Chou
Optimizing Post-Copy Live Migration with System-Level Checkpoint Using Fabric-Attached Memory. MCHPC@SC 2019: 16-24
2000 – 2009
- 2006
- [j2]Tai-Yi Huang, Chih-Chieh Chou, Po-Yuan Chen:
Bounding DMA Interference on Hard-Real-Time Embedded Systems. J. Inf. Sci. Eng. 22(5): 1229-1247 (2006) - [j1]Chih-Chieh Chou
A Necessary and Sufficient Condition for the Construction of 2-to-1 Optical FIFO Multiplexers by a Single Crossbar Switch and Fiber Delay Lines. IEEE Trans. Inf. Theory 52(10): 4519-4531 (2006) - 2005
- [c2]Liang-Yu Lin, Cheng-Yeh Wang, Pao-Jui Huang, Chih-Chieh Chou, Jing-Yang Jou:
Communication-driven task binding for multiprocessor with latency insensitive network-on-chip. ASP-DAC 2005: 39-44 - 2003
- [c1]Tai-Yi Huang, Chih-Chieh Chou, Po-Yuan Chen:
Bounding the Execution Times of DMA I/O Tasks on Hard-Real-Time Embedded Systems. RTCSA 2003: 499-512
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