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ACM Journal on Emerging Technologies in Computing Systems, Volume 17
Volume 17, Number 1, October 2020
- Muhammad Kamran Ayub, Muhammad Abdullah Hanif, Osman Hasan, Muhammad Shafique
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PEAL: Probabilistic Error Analysis Methodology for Low-power Approximate Adders. 1:1-1:37 - Ghasem Pasandi
Depth-bounded Graph Partitioning Algorithm and Dual Clocking Method for Realization of Superconducting SFQ Circuits. 2:1-2:22 - Manaar Alam
Neural Network-based Inherently Fault-tolerant Hardware Cryptographic Primitives without Explicit Redundancy Checks. 3:1-3:30 - Arnab Kumar Biswas
Network-on-Chip Intellectual Property Protection Using Circular Path-based Fingerprinting. 4:1-4:22 - Nandan Kumar Jha, Sparsh Mittal, Binod Kumar, Govardhan Mattela:
DeepPeep: Exploiting Design Ramifications to Decipher the Architecture of Compact DNNs. 5:1-5:25 - Yunfeng Lu, Huaxi Gu, Xiaoshan Yu, Krishnendu Chakrabarty
Lotus: A New Topology for Large-scale Distributed Machine Learning. 7:1-7:21 - Janibul Bashir
GPUOPT: Power-efficient Photonic Network-on-Chip for a Scalable GPU. 8:1-8:26
Volume 17, Number 2, April 2021
- Michiel Van Beirendonck
A Side-Channel-Resistant Implementation of SABER. 10:1-10:26 - Qutaiba Alasad, Jie Lin, Jiann-Shuin Yuan, Deliang Fan, Amro Awad:
Resilient and Secure Hardware Devices Using ASL. 11:1-11:26 - Anand Kumar Mukhopadhyay, Atul Sharma, Indrajit Chakrabarti, Arindam Basu
Power-efficient Spike Sorting Scheme Using Analog Spiking Neural Network Classifier. 12:1-12:29 - Anwesha Chatterjee, Shouvik Musavvir, Ryan Gary Kim
Power Management of Monolithic 3D Manycore Chips with Inter-tier Process Variations. 13:1-13:19 - Manaar Alam
Victims Can Be Saviors: A Machine Learning-based Detection for Micro-Architectural Side-Channel Attacks. 14:1-14:31 - Chia-Cheng Wu, Yi-Hsiang Hu, Chia-Chun Lin
Diagnosis for Reconfigurable Single-Electron Transistor Arrays with a More Generalized Defect Model. 15:1-15:23 - Shashank Adavally, Mahzabeen Islam, Krishna Kavi:
Dynamically Adapting Page Migration Policies Based on Applications' Memory Access Behaviors. 16:1-16:24 - Dat Tran, Christof Teuscher:
Computational Capacity of Complex Memcapacitive Networks. 17:1-17:25
- Yiran Chen, Qinru Qiu, Yingyan Lin:
Introduction of Special Issue on Hardware and Algorithms for Efficient Machine Learning-Part 1. 18:1-18:2 - Morteza Hosseini, Tinoosh Mohsenin:
Binary Precision Neural Network Manycore Accelerator. 19:1-19:27 - Nathan Zhang, Kevin Robert Canini, Sean Silva, Maya R. Gupta:
Fast Linear Interpolation. 20:1-20:15 - Alexis Asseman
Accelerating Deep Neuroevolution on Distributed FPGAs for Reinforcement Learning Problems. 21:1-21:17 - Palash Das, Hemangee K. Kapoor:
CLU: A Near-Memory Accelerator Exploiting the Parallelism in Convolutional Neural Networks. 22:1-22:25 - Mohit Khatwani, Hasib-Al Rashid, Hirenkumar Paneliya, Mark Horton, Nicholas R. Waytowich, W. David Hairston, Tinoosh Mohsenin:
A Flexible Multichannel EEG Artifact Identification Processor using Depthwise-Separable Convolutional Neural Networks. 23:1-23:21 - Adi Eliahu, Ronny Ronen, Pierre-Emmanuel Gaillardon, Shahar Kvatinsky:
multiPULPly: A Multiplication Engine for Accelerating Neural Networks on Ultra-low-power Architectures. 24:1-24:27 - Saman Biookaghazadeh, Pravin Kumar Ravi, Ming Zhao:
Toward Multi-FPGA Acceleration of the Neural Networks. 25:1-25:23
Volume 17, Number 3, July 2021
- Sourabh Kulkarni, Sachin Bhat, Csaba Andras Moritz:
Architecting for Artificial Intelligence with Emerging Nanotechnology. 26:1-26:33 - Heewoo Kim
A Survey Describing Beyond Si Transistors and Exploring Their Implications for Future Processors. 27:1-27:44 - Advait Madhavan
Temporal State Machines: Using Temporal Memory to Stitch Time-based Graph Computations. 28:1-28:27
- Domenic Forte
Introduction to the Special Issue on Emerging Challenges and Solutions in Hardware Security. 29:1-29:4 - Dominik Sisejkovic
Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach. 30:1-30:26 - Jun Zhou, Mengquan Li, Pengxing Guo, Weichen Liu:
Attack Mitigation of Hardware Trojans for Thermal Sensing via Micro-ring Resonator in Optical NoCs. 31:1-31:23 - Ioannis Tsiokanos, Jack Miskelly, Chongyan Gu, Máire O'Neill, Georgios Karakonstantis:
DTA-PUF: Dynamic Timing-aware Physical Unclonable Function for Resource-constrained Devices. 32:1-32:24 - Tapobrata Dhar
Hardware Trojan Horse Detection through Improved Switching of Dormant Nets. 33:1-33:22 - K. A. Asha, Li En Hsu, Abhishek Patyal, Hung-Ming Chen:
Improving the Quality of FPGA RO-PUF by Principal Component Analysis (PCA). 34:1-34:25 - Eros Camacho-Ruiz
Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm. 35:1-35:16 - Noor Ahmad Hazari, Ahmed Oun
Machine Learning Vulnerability Analysis of FPGA-based Ring Oscillator PUFs and Counter Measures. 36:1-36:20 - Yuntao Liu
Robust and Attack Resilient Logic Locking with a High Application-Level Impact. 37:1-37:22 - Johan Laurent, Christophe Deleuze, Florian Pebay-Peyroula, Vincent Beroulle:
Bridging the Gap between RTL and Software Fault Injection. 38:1-38:24 - M. Tanjidur Rahman
CONCEALING-Gate: Optical Contactless Probing Resilient Design. 39:1-39:25 - Unai Rioja
The Uncertainty of Side-channel Analysis: A Way to Leverage from Heuristics. 40:1-40:27 - Damien Robissout, Lilian Bossuet, Amaury Habrard, Vincent Grosso:
Improving Deep Learning Networks for Profiled Side-channel Analysis Using Performance Improvement Techniques. 41:1-41:30 - Lauren Biernacki
Software-driven Security Attacks: From Vulnerability Sources to Durable Hardware Defenses. 42:1-42:38 - Nico Mexis
A Lightweight Architecture for Hardware-Based Security in the Emerging Era of Systems of Systems. 43:1-43:25 - Shubhra Deb Paul
SILVerIn: Systematic Integrity Verification of Printed Circuit Board Using JTAG Infrastructure. 44:1-44:28
Volume 17, Number 4, October 2021
- Yiran Chen, Qinru Qiu, Yingyan Lin:
Introduction to the Special Issue on Hardware and Algorithms for Efficient Machine Learning - Part 2. 45:1-45:2 - Urmish Thakker, Igor Fedorov, Chu Zhou, Dibakar Gope, Matthew Mattina, Ganesh Dasika, Jesse G. Beu:
Compressing RNNs to Kilobyte Budget for IoT Devices Using Kronecker Products. 46:1-46:18 - Victor M. Gan, Yibin Liang, Lianjun Li, Lingjia Liu, Yang Yi:
A Cost-Efficient Digital ESN Architecture on FPGA for OFDM Symbol Detection. 47:1-47:15 - Chuliang Guo, Li Zhang, Xian Zhou, Grace Li Zhang, Bing Li, Weikang Qian, Xunzhao Yin, Cheng Zhuo:
A Reconfigurable Multiplier for Signed Multiplications with Asymmetric Bit-Widths. 48:1-48:16 - Dharanidhar Dang
BPLight-CNN: A Photonics-Based Backpropagation Accelerator for Deep Learning. 49:1-49:26 - He Wang, Nicoleta Cucu Laurenciu, Yande Jiang, Sorin Cotofana
Graphene-Based Artificial Synapses with Tunable Plasticity. 50:1-50:21 - Qing Yang, Jiachen Mao, Zuoguan Wang, Hai (Helen) Li:
Dynamic Regularization on Activation Sparsity for Neural Network Efficiency Improvement. 51:1-51:16 - Sumon Dey, Lee Baker, Joshua Schabel, Weifu Li, Paul D. Franzon
A Scalable Cluster-based Hierarchical Hardware Accelerator for a Cortically Inspired Algorithm. 52:1-52:29 - Bruno Henrique Meyer, Aurora Trinidad Ramirez Pozo
Improving Barnes-Hut t-SNE Algorithm in Modern GPU Architectures with Random Forest KNN and Simulated Wide-Warp. 53:1-53:26 - Wentao Chen, Hailong Qiu, Jian Zhuang, Chutong Zhang, Yu Hu, Qing Lu
Quantization of Deep Neural Networks for Accurate Edge Computing. 54:1-54:11 - Serena Lutong Wang
Quit When You Can: Efficient Evaluation of Ensembles by Optimized Ordering. 55:1-55:20 - Md Musabbir Adnan, Sagarvarma Sayyaparaju, Samuel D. Brown, Mst Shamim Ara Shawkat
Design of a Robust Memristive Spiking Neuromorphic System with Unsupervised Learning in Hardware. 56:1-56:26 - Mahmoud Masadeh
A Quality-assured Approximate Hardware Accelerators-based on Machine Learning and Dynamic Partial Reconfiguration. 57:1-57:19 - Xiaowei Xu
Multi-Cycle-Consistent Adversarial Networks for Edge Denoising of Computed Tomography Images. 58:1-58:16
- Shijun Gong, Jiajun Li, Wenyan Lu, Guihai Yan, Xiaowei Li:
ShuntFlowPlus: An Efficient and Scalable Dataflow Accelerator Architecture for Stream Applications. 59:1-59:24 - Wen Xie
Artificial Intelligence-based Computed Tomography Processing Framework for Surgical Telementoring of Congenital Heart Disease. 60:1-60:24 - Febin P. Sunny, Ebadollah Taheri, Mahdi Nikdast, Sudeep Pasricha:
A Survey on Silicon Photonics for Deep Learning. 61:1-61:57 - Ulbert J. Botero, Ronald Wilson
Hardware Trust and Assurance through Reverse Engineering: A Tutorial and Outlook from Image Analysis and Machine Learning Perspectives. 62:1-62:53 - Shihao Song, Jui Hanamshet, Adarsha Balaji, Anup Das
Dynamic Reliability Management in Neuromorphic Computing. 63:1-63:27
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