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Mrigank Sharad
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2020 – today
- 2024
- [i18]Arkapravo Ghosh, Hemkar Reddy Sadana, Mukut Debnath, Panthadip Maji, Shubham Negi, Sumeet Gupta, Mrigank Sharad, Kaushik Roy:
Approximate ADCs for In-Memory Computing. CoRR abs/2408.06390 (2024) - 2022
- [j8]Anand Kumar Mukhopadhyay
, Naligala Moses Prabhakar, Divya Lakshmi Duggisetty, Indrajit Chakrabarti, Mrigank Sharad:
Acoustic scene analysis using analog spiking neural network. Neuromorph. Comput. Eng. 2(4): 44003 (2022) - 2021
- [j7]Anand Kumar Mukhopadhyay, Atul Sharma, Indrajit Chakrabarti, Arindam Basu
Power-efficient Spike Sorting Scheme Using Analog Spiking Neural Network Classifier. ACM J. Emerg. Technol. Comput. Syst. 17(2): 12:1-12:29 (2021)
2010 – 2019
- 2019
- [j6]Arvind Srivastav
An Adaptive Low-Complexity Abnormality Detection Scheme for Wearable Ultrasonography. IEEE Trans. Circuits Syst. II Express Briefs 66-II(8): 1466-1470 (2019) - [c30]Niraj Kumar Jha, Dishank Yadav, Anuj Maheshwari, Mrigank Sharad:
Radiation Hardened High-Speed LVDS compliant Transceiver. CONIELECOMP 2019: 55-59 - [c29]Gopabandhu Hota, Hardik Agrawal, Mrigank Sharad:
An Area Effective Programmable Front-end Amplifier for Neural Signal Acquisition. ISVLSI 2019: 207-211 - [c28]Shubham Negi, Ashis Maity
Adaptive Fractional Open Circuit Voltage Method for Maximum Power Point Tracking in a Photovoltaic Panel. VLSID 2019: 482-487 - [i17]Harshit Roy, Mrigank Sharad:
Current Mode Neuron for the Memristor based synapse. CoRR abs/1905.05307 (2019) - [i16]Sudarshan Sharma, Dhruv Thapar, Nikhil Bhelave, Mrigank Sharad:
Adaptive Multi-bit SRAM Topology Based Analog PUF. CoRR abs/1912.06901 (2019) - [i15]Anand Kumar Mukhopadhyay, Naligala Moses Prabhakar, Divya Lakshmi Duggisetty, Indrajit Chakrabarti, Mrigank Sharad:
Intelligent Wireless Sensor Nodes for Human Footstep Sound Classification for Security Application. CoRR abs/1912.10905 (2019) - 2018
- [c27]Anand Kumar Mukhopadhyay, Indrajit Chakrabarti, Mrigank Sharad:
Classification of Hand Movements by Surface Myoelectric Signal Using Artificial-Spiking Neural Network Model. IEEE SENSORS 2018: 1-4 - [i14]Anand Kumar Mukhopadhyay, Indrajit Chakrabarti, Arindam Basu, Mrigank Sharad:
Power efficient Spiking Neural Network Classifier based on memristive crossbar network for spike sorting application. CoRR abs/1802.09047 (2018) - 2017
- [c26]Anand Kumar Mukhopadhyay, Indrajit Chakrabarti, Mrigank Sharad:
Real-time digitized neural-spike storage scheme in multiple channels for biomedical applications. APSIPA 2017: 1430-1435 - [c25]Anindya Shankar Bhandari, Arjun Chaudhuri, Swarnabha Roy, Shubham Negi, Mrigank Sharad:
Single chip self-tunable N-input N-output PID control system with integrated analog front-end for miniature robotics. ICNSC 2017: 109-114 - [c24]Mannem Naga Sasikanth, Sashank Gambhira, Mrigank Sharad:
Design Optimization of DSP for Wearable Biomedical Device. iNIS 2017: 1-5 - [c23]Saranyu Chattopadhyay
STT-MRAM for Low Power Access for Read-Intensive Parallel Deep-Learning Architectures. iNIS 2017: 61-65 - [c22]Sangamesh Kodge, Himanshu Chaudhary, Mrigank Sharad:
Low Power Image Acquisition Scheme Using On-Pixel Event Driven Halftoning. ISVLSI 2017: 260-265 - [c21]Rakshit Pathak, Saurav Dash, Anand Kumar Mukhopadhyay, Arindam Basu
Low Power Implantable Spike Sorting Scheme Based on Neuromorphic Classifier with Supervised Training Engine. ISVLSI 2017: 266-271 - [c20]Himanshu Chaudhary, Sangamesh Kodge, Mrigank Sharad:
Digitally assisted analog processing unit for MPG based wearable device. MWSCAS 2017: 257-260 - [c19]Saransh Sharma
Ultra Low Power Sensor Node for Security Applications, Facilitated by Algorithm-Architecture Co-design. VLSID 2017: 101-106 - 2016
- [j5]Rangharajan Venkatesan, Vivek Joy Kozhikkottu, Mrigank Sharad, Charles Augustine, Arijit Raychowdhury, Kaushik Roy, Anand Raghunathan
Cache Design with Domain Wall Memory. IEEE Trans. Computers 65(4): 1010-1024 (2016) - [j4]Deliang Fan, Mrigank Sharad, Abhronil Sengupta, Kaushik Roy:
Hierarchical Temporal Memory Based on Spin-Neurons and Resistive Memory for Energy-Efficient Brain-Inspired Computing. IEEE Trans. Neural Networks Learn. Syst. 27(9): 1907-1919 (2016) - [c18]Vikash Sehwag, Saurav Maji, Mrigank Sharad:
Variation Aware Performance Analysis of TFETs for Low-Voltage Computing. iNIS 2016: 93-97 - [c17]Sohail Ahasan, Saurav Maji, Kaushik Roy, Mrigank Sharad:
Digital LDO with Time-Interleaved Comparators for Fast Response and Low Ripple. ISVLSI 2016: 337-342 - [i13]Anindya Shankar Bhandari, Arjun Chaudhuri, Mrigank Sharad:
Single Chip Self-Tunable N-Input N-Output PID Control System with Integrated Analog Front-end for Miniature Robotics. CoRR abs/1611.05164 (2016) - 2015
- [j3]Kaushik Roy, Deliang Fan, Xuanyao Fong
Exploring Spin Transfer Torque Devices for Unconventional Computing. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(1): 5-16 (2015) - [j2]Rangharajan Venkatesan, Mrigank Sharad, Kaushik Roy, Anand Raghunathan
Energy-Efficient All-Spin Cache Hierarchy Using Shift-Based Writes and Multilevel Storage. ACM J. Emerg. Technol. Comput. Syst. 12(1): 4:1-4:27 (2015) - [i12]Tathagata Srimani, Bibhas Manna
High Sensitivity Biosensor using Injection Locked Spin Torque Nano-Oscillators. CoRR abs/1511.09072 (2015) - [i11]Sohail Ahasan, Saurav Maji, Kaushik Roy, Mrigank Sharad:
Digital LDO with Time-Interleaved Comparators for Fast Response and Low Ripple. CoRR abs/1511.09074 (2015) - [i10]Aranya Goswamy, Sagar Kumashi, Vikash Sehwag, Siddharth Singh, Manny Jain, Kaushik Roy, Mrigank Sharad:
Energy Efficient and High Performance Current-Mode Neural Network Circuit using Memristors and Digitally Assisted Analog CMOS Neurons. CoRR abs/1511.09085 (2015) - 2014
- [b1]Mrigank Sharad:
Energy efficient hybrid computing systems using spin devices. Purdue University, USA, 2014 - [c16]Kaushik Roy, Mrigank Sharad, Deliang Fan, Karthik Yogendra:
Brain-inspired computing with spin torque devices. DATE 2014: 1-6 - [c15]Shankar Ganesh Ramasubramanian
SPINDLE: SPINtronic deep learning engine for large-scale neuromorphic computing. ISLPED 2014: 15-20 - [c14]Kaushik Roy, Mrigank Sharad, Deliang Fan, Karthik Yogendra:
Computing with Spin-Transfer-Torque Devices: Prospects and Perspectives. ISVLSI 2014: 398-402 - [i9]Deliang Fan, Mrigank Sharad, Kaushik Roy:
Design and Synthesis of Ultra Low Energy Spin-Memristor Threshold Logic. CoRR abs/1402.2648 (2014) - [i8]Deliang Fan, Mrigank Sharad, Abhronil Sengupta, Kaushik Roy:
Hierarchical Temporal Memory Based on Spin-Neurons and Resistive Memory for Energy-Efficient Brain-Inspired Computing. CoRR abs/1402.2902 (2014) - 2013
- [c13]Mrigank Sharad, Deliang Fan, Kaushik Roy:
Ultra low power associative computing with spin neurons and resistive crossbar memory. DAC 2013: 107:1-107:6 - [c12]Rangharajan Venkatesan, Mrigank Sharad, Kaushik Roy, Anand Raghunathan
DWM-TAPESTRI - an energy efficient all-spin cache using domain wall shift based writes. DATE 2013: 1825-1830 - [c11]Kaushik Roy, Mrigank Sharad, Deliang Fan, Karthik Yogendra:
Exploring Boolean and non-Boolean computing with spin torque devices. ICCAD 2013: 576-580 - [c10]Mrigank Sharad, Rangharajan Venkatesan, Anand Raghunathan
Multi-level magnetic RAM using domain wall shift for energy-efficient, high-density caches. ISLPED 2013: 64-69 - [c9]Kaushik Roy, Mrigank Sharad, Deliang Fan, Karthik Yogendra:
Beyond charge-based computation: Boolean and non-Boolean computing with spin torque devices. ISLPED 2013: 139-142 - [c8]Mrigank Sharad, Deliang Fan
Low power and compact mixed-mode signal processing hardware using spin-neurons. ISQED 2013: 189-195 - [c7]Mrigank Sharad, Karthik Yogendra, Kon-Woo Kwon, Kaushik Roy:
Design of ultra high density and low power computational blocks using nano-magnets. ISQED 2013: 223-230 - [c6]Mrigank Sharad, Karthik Yogendra, Kaushik Roy:
Energy efficient computing using coupled Dual-Pillar Spin Torque Nano Oscillators. NANOARCH 2013: 28-29 - [c5]Mrigank Sharad, Rangharajan Venkatesan, Xuanyao Fong
Reading spin-torque memory with spin-torque sensors. NANOARCH 2013: 40-41 - [i7]Mrigank Sharad, Kaushik Roy:
Spintronic Switches for Ultra Low Energy On-Chip and Inter-Chip Current-Mode Interconnects. CoRR abs/1304.2213 (2013) - [i6]Mrigank Sharad, Deliang Fan, Kaushik Roy:
Ultra Low Power Associative Computing with Spin Neurons and Resistive Crossbar Memory. CoRR abs/1304.2281 (2013) - [i5]Kaushik Roy, Mrigank Sharad, Deliang Fan, Karthik Yogendra:
Exploring Boolean and Non-Boolean Computing Applications of Spin Torque Devices. CoRR abs/1308.2745 (2013) - [i4]Mrigank Sharad, Deliang Fan, Kaushik Roy:
Ultra-low Energy, High Performance and Programmable Magnetic Threshold Logic. CoRR abs/1308.4169 (2013) - [i3]Mrigank Sharad, Deliang Fan, Kaushik Roy:
Ultra-low Energy, High-Performance Dynamic Resistive Threshold Logic. CoRR abs/1308.4672 (2013) - [i2]Mrigank Sharad, Deliang Fan, Kaushik Roy:
Spin Neurons: A Possible Path to Energy-Efficient Neuromorphic Computers. CoRR abs/1309.3303 (2013) - 2012
- [j1]Mrigank Sharad, Sumeet Kumar Gupta, Shriram Raghunathan, Pedro P. Irazoqui, Kaushik Roy:
Low-Power Architecture for Epileptic Seizure Detection Based on Reduced Complexity DWT. ACM J. Emerg. Technol. Comput. Syst. 8(2): 10:1-10:14 (2012) - [c4]Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy:
Cognitive computing with spin-based neural networks. DAC 2012: 1262-1263 - [c3]Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy:
Spin based neuron-synapse module for ultra low power programmable computational networks. IJCNN 2012: 1-7 - [c2]Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy:
Ultra low energy analog image processing using spin based neurons. NANOARCH 2012: 211-217 - [i1]Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy:
Proposal For Neuromorphic Hardware Using Spin Devices. CoRR abs/1206.3227 (2012) - 2011
- [c1]Mrigank Sharad, Vijaya Sankara Rao Pasupureddi, Pradip Mandal:
A New Double Data Rate(DDR) Dual-Mode Duobinary Transmitter Architecture. VLSI Design 2011: 12-17
Coauthor Index
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last updated on 2024-09-25 00:42 CEST by the dblp team
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