Lecture 7
Lecture 7
Lecture 7
REGISTERS
ADD A,B ;A = A + B
SHL C,3 ;Shift C left 3 bits
1 ADDRESS
INSTRUCTIONS
When only a single reference is allowed in an instruction, another
reference must be included as part of the instruction
Traditional accumulator-based operations
Example: Acc = Acc + X
For an instruction such as A += B, code must first load A into an
accumulator, then add B.
LOAD A
ADD B
0 ADDRESS
INSTRUCTIONS
All addresses are implied, as in register-based operations – e.g., TBA
(transfer register B to A)
Zero address instructions imply stack-based operations
All operations are based on the use of a stack in memory to store
operands
Interact with the stack (simulate the loading of registers) using push
and pop operations
EXAMPLE: 3 ADDRESSES
Y = (A-B) / (C+D*E)
SUB Y,A,B
MUL T,D,E
ADD T,T,C
DIV Y,Y,T
EXAMPLE: 2 ADDRESS
Y = (A-B) / (C+D*E)
MOV Y,A
SUB Y,B
MOV T,D
MUL T,E
ADD T,C
DIV Y,T
EXAMPLE: 1 ADDRESS
Y = (A-B) / (C+D*E)
LOAD D
MUL E
ADD C
STORE Y
LOAD A
SUB B
DIV Y
STORE Y
EXAMPLE:
0 ADDRESS – CONVERT TO POSTFIX
(REVERSE POLISH)
NOTATION:
PUSH A
Y = (A-B) / (C+D*E)
PUSH B
SUB
becomes
PUSH C
PUSH D
Y = AB–CDE*+/
PUSH E
MUL
This is "Postfix" or "Reverse ADD
Polish Form" from tree DIV
searching. POP Y
CPU INTERNAL DESIGN
ISSUES
From our discussion of the architecture of the computer,
we've put some requirements on the CPU.
CPU fetches instructions from memory
CPU interprets instructions to determine action that is
required
CPU fetches data that may be required for execution
(could come from memory or I/O)
CPU processes data with arithmetic, logic, or some
movement of data
CPU writes data (results) to memory or I/O
CPU INTERNAL
STRUCTURE
Design decisions here affect instruction set design
CPU INTERNAL STRUCTURE –
ALU, INTERNAL CPU BUS, AND
CONTROL UNIT
Arithmetic Logic Unit
Status flags
Shifter
Complementer
Arithmetic logic
Boolean logic