Comparch 03 CPU
Comparch 03 CPU
Comparch 03 CPU
1
Computer
Architecture and Organization
Computer Architecture and Organization
LEARNING OBJECTIVES
instructions.
instruction sets.
instruction sets.
Source and result operands can be in one of four areas: Main or virtual
memory, Processor register, immediate and I/O Device
Y = (A - B)/[C + (D * E)]
Note that there are four instructions and that the original expression had
five operands.
Try not to alter the value of any of the operand locations.
Try to compute the expression with smallest no of instructions possible.
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SO HOW MANY ADDRESSES?
The number of addresses per instruction is a basic design decision.
More addresses
More complex instructions
Fewer instructions per program
Fewer addresses
Less complex instructions
More instructions per program
Require less complex processor
It also results in instructions of shorter length.
Results in longer execution times
Characters
ASCII etc.
Logical Data
Bits or flags
Data Transfer
Arithmetic
Logical
Conversion
I/O
System Control
Transfer of Control
INPUT/OUTPUT
For i/o operation
SYSTEM CONTROL
Executed only while the processor is in a certain privileged state or is
executing a program in a special privileged area of memory.
Typically, these instructions are reserved for the use of the operating
system.
Immediate
Direct how the processor can determine which address
mode is being used in a particular instruction?
Indirect
Register
Register Indirect
Displacement (Indexed)
Stack
Pros
Fast:- No memory reference to fetch data
Cons
Limited range: - the size of the number is restricted to the size of the address
field
EA = A
e.g. ADD A
Add contents of memory address A to accumulator
Look in memory at address A for operand
Pros
Increased address space
Cons
Instruction execution requires two memory references to fetch the operand:
one to get its address and a second to get its value.
EA = R
Pros
Only a small address field is needed in the instruction
Very fast: - No time-consuming memory references are required.
Cons
Address space is very limited
Limited number of registers
EA = (R)
Operand is in memory cell pointed to by contents of register R
Pros
Large address space (2n)
One fewer memory access than indirect addressing
Cons
Extra memory access
Cons
Limited applicability
Chapter 2: CPU
Discuss the inputs and outputs of Control Unit and how it works.
Reading
Assignments
Page 469
Computer Architecture and Organization 38
PROCESSOR
ORGANIZATION
What is the requirements placed on the processor, (the things that it must
do) ?
Fetch instruction
To do these things, it should be clear that the
processor needs to store some
Interpret instruction data temporarily.
Fetch data
Example: Multiply the content of two memory locations and store the result to
another memory location?
The CISC Approach
The primary goal of CISC architecture is to complete a task in as few lines of assembly
as possible.
This is achieved by building processor hardware that is capable of understanding and
executing a complex instruction.
MULTI [loc 3] , [loc 1], [loc 2]
When executed, this instruction loads the two values from memory into separate
registers, multiplies the operands in the execution unit, and then stores the product in
the appropriate register (R1).
A single instruction takes
Computer Architecture and Organization 54
more than 1 clock cycle to finish
CONT…THE CISC APPROACH
Instructions for CISC arc closely resembles a command in a higher level
language.
Potential advantage ? the compiler has to do very little work to translate a high-level
Because the length of the code is relatively short, very little RAM is required to
store instructions.
The emphasis is put on building complex instructions directly into the hardware.
Because there are more lines of code, more RAM is needed to store the
assembly level instructions.
The compiler must also perform more work to convert a high-level
language statement into code of this form.
The RISC approach reduces the cycles per instruction at the cost of the
number of instructions per program.
hardware space than the complex instructions, leaving more room for general
purpose registers.
Because all of the instructions execute in a uniform amount of time (i.e. one
needs to be used for another computation, the processor must re-load the data
from the memory bank into a register.
In RISC:- the operand will remain in the register until another value is loaded in
its place.
Computer Architecture and Organization 57
CISC RISC
The original ISA Redesigned on the original ISA
Instruction can take several clock cycle Instruction take one clock cycle
Grouping rule
Examples
Implementation of CU
For example, the micro- operations (MBR Memory) and (IR MBR) should not occur
Note: As long as each 𝝁OP follows the above rules and do not interfere with one
another, several of them can take place during one step, to saving time.
Computer Architecture and Organization 63
OP’S IN INDIRECT CYCLE
let us assume a one-address instruction format, with direct and indirect
addressing allowed.
The address field of the instruction is transferred to the MAR.
This is then used to fetch the address of the operand.
Finally, the address field of the IR is updated from the MBR, so that it
now contains a direct rather than an indirect address.
At the end of each of the four cycles, the ICC is set appropriately.
Flags
State of processor
Results of previous ALU operations
language programs.
architectures processors
Computer Architecture and Organization 82
SOME IMPORTANT TERMS IN
MICRO-PROGRAMMED CU
Control Word : is a word whose individual bits represent various control
signals.
Micro-instruction : Individual control words in this micro-routine are
referred to as microinstructions.
Micro-program : A sequence of micro-instructions is called a micro-
program, which is stored in a ROM.
Micro-routine : Group of micro-instructions each stored in control
word that belongs to same routine.
Control Memory : the micro-routines for all instructions in the
instruction set of a computer are stored in a special memory called the
Control Memory.
Disadvantage