UNIT-3

Instruction Representation
Within the computer, each instruction is represented by a sequence of bits. The instruction is
divided into fields,corresponding to the constituent elements of the instruction. The instruction
format is highly machine specific and it mainly depends on the machine architecture. A simple
example of an instruction format is shown in the figure. It is assume that it is a 16-bit CPU. 4 bits
are used to provide the operation code. So, we may have to 16 (24 = 16)
Opcodes are represented by abbreviations, called mnemonics, that indicate the operations.
Common examples include:
ADD Add
SUB Subtract
MUL Multiply
DIV Division
LOAD Load data from memory to CPU
STORE Store data to memory from CPU.

Operands are also represented symbolically. For example, the instruction

MULT R, X : R R x X
may mean multiply the value contained in the data location X by the contents of register R and
put the result in register R
In this example, X refers to the address of a location in memory and R refers to a particular
register.
Thus, it is possible to write a machine language program in symbolic form. Each symbolic
opcode has a fixed binary representation, and the programmer specifies the location of each
symbolic operand.
Instruction Types
The instruction set of a CPU can be categorized as follows:
Data Processing:
Arithmatic and Logic instructions Arithmatic instructions provide computational capabilities for
processing numeric
data. Logic (Boolean) instructions operate on the bits of a word as bits rather than as numbers.
Logic instructions
thus provide capabilities for processing any other type of data. There operations are performed
primarily on data in
CPU registers.
Data Storage:
Memory instructions Memory instructions are used for moving data between memory and CPU
registers.
Data Movement:
I/O instructions I/O instructions are needed to transfer program and data into memory from
storage device or input
device and the results of computation back to the user.
Control:
Test and branch instructions
Test instructions are used to test the value of a data word or the status of a computation.
Branch instructions are then
used to branch to a different set of instructions depending on the decision made.
Instruction Set Design
One of the most interesting, and most analyzed, aspects of computer design is instruction set
design. The instruction set defines the functions performed by the CPU. The instruction set is
the programmer's means of controlling the CPU. Thus programmer requirements must be
considered in designing the instruction set.
Most important and fundamental design issues:

Operation : How many and which operations to provide, and how complex operations
should be.
Data Types : The various type of data upon which operations are performed.
Instruction format : Instruction length (in bits), number of addresses, size of various fields and
so on.
Registers : Number of CPU registers that can be referenced by instructions and their
use.
Addressing : The mode or modes by which the address of an operand is specified.

Types of Operands
Machine instructions operate on data. Data can be categorised as follows :
Addresses: It basically indicates the address of a memory location. Addresses are nothing but
the unsigned integer, but treated in a special way to indicate the address of a memory location.
Address arithmatic is somewhat different from normal arithmatic and it is related to machine
architecture.
Numbers: All machine languages include numeric data types. Numeric data are classified into
two broad categories:
integer or fixed point and floating point.
Characters: A common form of data is text or character strings. Since computer works with bits,
so characters are represented by a sequence of bits. The most commonly used coding scheme
is ASCII (American Standard Code for
Information Interchange) code.
Logical Data: Normally each word or other addressable unit (byte, halfword, and so on) is
treated as a single unit of data. It is sometime useful to consider an n-bit unit as consisting of n
1-bit items of data, each item having the value 0
or 1. When data are viewed this way, they are considered to be logical data. Generally 1 is
treated as true and 0 is
treated as false.

Types of Opearations
The number of different opcodes and their types varies widely from machine to machine.
However, some general type of operations are found in most of the machine architecture. Those
operations can be categorized as follows:
n Data Transfer

n Arithmatic

n Logical
n Input Output [ I/O ]
n System Control
n Transfer

Data Transfer:
The most fundamental type of machine instruction is the data transfer instruction. The data
transfer instruction must specify several things. First, the location of the source and destination
operands must be specified. Each location could be memory, a register, or the top of the stack.
Second, the length of data to be transferred must be indicated. Third, as with all instructions
with operands, the mode of addressing for each operand must be specified.
The CPU has to perform several task to accomplish a data transfer operation. If both source
and destination are registers, then the CPU simply causes data to be transferred from one
register to another; this is an operation internal to the CPU.
If one or both operands are in memory, then the CPU must perform some or all of the following
actions:
a) Calculate the memory address, based on the addressing mode.
b) If the address refers to virtual memory, translate from virtual to actual memory address.
c) Determine whether the addressed item is in cache.
d) If not, issue a command to the memory module.

Commonly used data transfer operation:

Operation Name Description

Move (Transfer) Transfer word or block from source to destination
Store Transfer word from processor to memory
Load (fetch) Transfer word from memory to processor
Exchange Swap contents of source and destination
Clear (reset) Transfer word of 0s to destination
Set Transfer word of 1s to destination
Push Transfer word from source to top of stack
Pop Transfer word from top of stack to destination

Arithmatic:
Most machines provide the basic arithmatic operations like add, subtract, multiply, divide etc.
ALU input and to deliver the result of the ALU operation.

Commonly used data transfer operation:

Operation Name Description

Add Compute sum of two operands
Subtract Compute difference of two operands
Multiply Compute product of two operands
Divide Compute quotient of two operands
Absolute Replace operand by its absolute value
Negate Change sign of operand
Increment Add 1 to operand
Decrement Subtract 1 from operand
Logical:
Most machines also provide a variety of operations for manipulating individual bits of a word or
other addressable units.
Most commonly available logical operations are:

Operation Name Description

AND Performs the logical operation AND bitwise
OR Performs the logical operation OR bitwise
NOT Performs the logical operation NOT bitwise
Exclusive OR Performs the specified logical operation Exculsive-OR bitwise
Test Test specified condition; set flag(s) based on outcome
Compare Make logical or arithmatic comparison Set flag(s) based on outcome
Set Control Variables Class of instructions to set controls for protection purposes,
interrupt
handling, timer control etc.
Shift Left (right) shift operand, introducing constant at end
Rotate Left (right) shift operation, with wraparound end

Input/Output :

Input/Output instructions are used to transfer data between input/output devices and
memory/CPU register. Commonly available I/O operations are:
Operation Name Description
Input (Read) Transfer data from specified I/O port or device to destination
(e.g., main memory or processor register)
Output (Write) Transfer data from specified source to I/O port or device.
Start I/O Transfer instructions to I/O processor to initiate I/O
operation.
Test I/O Transfer status information from I/O system to specified destination

Branch Instruction
A branch instruction, also called a jump instruction, has one of its operands as the address of
the next instruction to be executed. Basically there are two types of branch instructions:
Conditional Branch instruction and unconditionla branch instruction. In case of unconditional
branch instruction, the branch is made by updating the program counter to address specified in
operand. In case of conditional branch instruction, the branch is made only if a certain condition
is met. Otherwise, the next instruction in sequence is executed.
There are two common ways of generating the condition to be tested in a conditional branch
instruction
First most machines provide a 1-bit or multiple-bit condition code that is set as the result of
some operations. As an example, an arithmetic operation could set a 2-bit condition code with
one of the following four values: zero, positive,negative and overflow. On such a machine, there
could be four different conditional branch instructions:
BRP X Branch to location X if result is positive
BRN X Branch to location X if result is negative
BRZ X Branch to location X is result is zero
BRO X Branch to location X if overflow occurs
In all of these cases, the result referred to is the result of the most recent operation that set the
condition code.

Instruction Formats (Zero, One, Two

and Three Address Instruction)
Computer perform task on the basis of instruction provided. A instruction in computer comprises
of groups called fields. These field contains different information as for computers every thing is
in 0 and 1 so each field has different significance on the basis of which a CPU decide what so
perform. The most common fields are:

● Operation field which specifies the operation to be performed like addition.

● Address field which contain the location of operand, i.e., register or memory location.
● Mode field which specifies how operand is to be founded.

A instruction is of various length depending upon the number of addresses it contain. Generally
CPU organization are of three types on the basis of number of address fields:

1. Single Accumulator organization

2. General register organization
3. Stack organization

In first organization operation is done involving a special register called accumulator. In second
on multiple registers are used for the computation purpose. In third organization the work on
stack basis operation due to which it does not contain any address field. It is not necessary that
only a single organization is applied a blend of various organization is mostly what we see
generally.

On the basis of number of address instruction are classified as:

Note that we will use X = (A+B)*(C+D) expression to showcase the procedure.

1. Zero Address Instructions –

A stack based computer do not use address field in instruction.To evaluate a expression
first it is converted to revere Polish Notation i.e. Post fix Notation.
Expression: X = (A+B)*(C+D)
Postfixed : X = AB+CD+*
TOP means top of stack
M[X] is any memory location
 A TOP = A
PUSH
PUSH B TOP = B
ADD TOP = A+B
PUSH C TOP = C
PUSH D TOP = D
ADD TOP = C+D
MUL TOP = (C+D)*(A+B)
POP X M[X] = TOP

2. One Address Instructions –

This use a implied ACCUMULATOR register for data manipulation.One operand is in
accumulator and other is in register or memory location.Implied means that the CPU
already know that one operand is in accumulator so there is no need to specify it.

Expression: X = (A+B)*(C+D)
AC is accumulator
M[] is any memory location
M[T] is temporary location
 LOAD A AC = M[A]
ADD B AC = AC + M[B]
STORE T M[T] = AC
LOAD C AC = M[C]
ADD D AC = AC + M[D]
MUL T AC = AC * M[T]
STORE X M[X] = AC

3. Two Address Instructions –

This is common in commercial computers.Here two address can be specified in the
instruction.Unlike earlier in one address instruction the result was stored in
accumulator here result cab be stored at different location rather than just accumulator,
but require
uire more number of bit to represent address.

Here destination address can also contain operand.

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location

MOV R1, A R1 = M[A]

ADD R1, B R1 = R1 + M[B]
MOV R2, C R2 = M[C]
ADD R2, D R2 = R2 +M[D]
MUL R1, R2 R1 = R1 * R2
M[X] = R1
MOV X, R1

4. Three Address Instructions –

This has three address field to specify a register or a memory location. Program created
are much short in size but number of bits per instruction increase. These instructions
make creation of program much easier but it does not mean that program will run much
faster because now instruction only contain more information but each micro operation
(changing content of register, loading address in address bus etc.) will be performed in
one cycle only.
 Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location

ADD R1, A, B R1 = M[A] + M[B]

ADD R2, C, D R2 = M[C] + M[D]
MUL X, R1, R2 M[X] = R1 * R2

Instruction Cycle
A program residing in the memory unit of a Computer consists of a sequence of
instructions. These instructions are executed by the processor by going through a cycle
for each instruction.

In a basic computer, each instruction cycle consists of the followi

following phases:

1. Fetch instruction from memory.

2. Decode the instruction.
3. Read the effective address from memory.
4. Execute the instruction.
 Program control
Program control is how a program makes decisions or organizes its activities. Program control
typically involves executing particular code based on the outcome of a prior operation or a user
input.

Program control instructions change or modify the flow of a program.

Program Control

Branch Instruction: The program counter is changed to the new (branch destination) location.

Call Subroutine: The program counter is pushed onto the stack, and the program counter is then is changed to

the first instruction of the subroutine.

● Straight Line Sequencing

 Conditional Branches

Examples:

Unconditional Jump and Function Calls

Example 1: The Main program calls a subroutine. The return address is stored in a register.

Unconditional Jump and Function Calls

Example 1: The Main program calls a subroutine. The return address is stored in a register.

Unconditional Jump and Function Calls

Example 1: The Main program calls a subroutine. The return address is stored in a register.
Three major issues in subroutine calls:

● Linkage

(1) Jump to function:

Two things need to be done when jumping from the invoking routine, say MAIN, to the
invoked routine, say SUB:

o Push updated PC content on a stack;

o Load PC with the starting address of SUB, the address of the first instruction
in SUB.

(2) Return from function:

Pop the top item on stack, the return address, to PC.

● Parameter/Result Passing

Either or both of two types of operations may be needed:

(1) Pass parameters (variables) to be used in the function or their addresses from
MAIN to SUB.

(2) Return the results from SUB to MAIN.

 Both operations can be carried out through either CPU registers or MM (main
memory)locations.

● Data Protection

If function SUB need some CPU registers whose contents will be used by MAIN again
after SUB is executed, these registers need to be saved somewhere before SUB and then
restored after SUB. The most suitable place to save them is a stack in MM, where both
the return addresses and the contents of registers used by previous routines are stored to
accommodate both nested and recursive function calls.

RISC (reduced instruction set computer) is a microprocessor that is designed to perform a

smaller number of types of computer instructions so that it can operate at a higher speed
(perform more millions of instructions per second, or MIPS). Reduced Instruction Set Computer.
It is a type of microprocessor that has a limited number of instructions. They can execute their
instructions very fast because instructions are very small and simple.

RISC chips require fewer transistors which make them cheaper to design and produce. In RISC,
the instruction set contains simple and basic instructions from which more complex instruction
can be produced. Most instructions complete in one cycle, which allows the processor to handle
many instructions at same time.

In this instructions are register based and data transfer takes place from register to register.

Characteristic of RISC –

1. Simpler instruction, hence simple instruction decoding.

2. Instruction come under size of one word.
 3. Instruction take single clock cycle to get executed.
4. More number of general purpose register.
5. Simple Addressing Modes.
6. Less Data types.

7. Pipeling can be achieved.

CISC Processor

● It is known as Complex Instruction Set Computer.

● It was first developed by Intel.
● It contains large number of complex instructions.
● In this instructions are not register based.
● Instructions cannot be completed in one machine cycle.
● Data transfer is from memory to memory.
● Micro programmed control unit is found in CISC.
● Also they have variable instruction formats.

Difference Between CISC and RISC

Architectural Reduced Instruction Set
Complex Instruction Set Computer(CISC)
Characterstics Computer(RISC)

Instruction size and Large set of instructions with variable formats Small set of instructions with
format (16-64 bits per instruction). fixed format (32 bit).

Data transfer Memory to memory. Register to register.

Most micro coded using control memory (ROM) Mostly hardwired without
CPU control
but modern CISC use hardwired control. control memory.

Instruction type Not register based instructions. Register based instructions.

Memory access More memory access. Less memory access.

Clocks Includes multi-clocks. Includes single clock.

Instructions are reduced and

Instruction nature Instructions are complex.
simple.

Sometimes called CP, the Clock pulse is located inside a computer and is used to synchronize the timing of
hardware components. The speed of the computer's processor, measured in MHz or GHz, refers to its number
of clock pulse cycles per second. Every microprocessor has an internal clock that regulates the speed at
which it executes instructions and also synchronizes it with other components. The speed at which
the microprocessor executes instructions is called clock speed.

Example – Suppose we have to add two 8-bit number:

 ● CISC approach: There will be a single command or instruction for this like ADD
which will perform the task.
● RISC approach: Here programmer will write first load command to load data in
registers then it will use suitable operator and then it will store result in desired
location.
So, add operation is divided into parts i.e. load, operate, store due to which RISC programs are
longer and require more memory to get stored but require less transistors due to less complex
command.

What is Pipelining?
Pipelining is the process of accumulating instruction from the processor through a pipeline. It
allows storing and executing instructions in an orderly process. It is also known as pipeline
processing.

Pipelining is a technique where multiple instructions are overlapped during execution. Pipeline is
divided into stages and these stages are connected with one another to form a pipe like structure.
Instructions enter from one end and exit from another end.

Pipelining increases the overall instruction throughput.

In pipeline system, each segment consists of an input register followed by a combinational

circuit. The register is used to hold data and combinational circuit performs operations on it. The
output of combinational circuit is applied to the input register of the next segment.
 Pipeline system is like the modern day assembly line setup in factories. For example in a car
manufacturing industry, huge assembly lines are setup and at each point, there are robotic arms
to perform a certain task, and then the car moves on ahead to the next arm.

In digital computers, an interrupt is a response by the processor to an event that needs attention from the
software. An interrupt condition alerts the processor and serves as a request for the processor to interrupt
the currently executing code when permitted, so that the event can be processed in a timely manner.
An interrupt is a signal sent to the processor that interrupts the current process. ... For example, if you are
using a word processor and press a key, the program must process the input immediately.

Types of Pipeline

It is divided into 2 categories:

1. Arithmetic Pipeline
2. Instruction Pipeline
Arithmetic Pipeline

Arithmetic pipelines are usually found in most of the computers. They are used for floating point
operations, multiplication of fixed point numbers etc. For example: The input to the Floating
Point Adder pipeline is:

X=A*2a
X=B*2b

Here A and B are mantissas (significant digit of floating point numbers), while a and b are
exponents.

1. Compare the exponents.

2. Align the mantissas.
3. Add or subtract mantissas
4. Produce the result.

Registers are used for storing the intermediate results between the above operations.

Instruction Pipeline

In this a stream of instructions can be executed by overlapping fetch, decode and execute phases
of an instruction cycle. This type of technique is used to increase the throughput of the
computer system.

An instruction pipeline reads instruction from the memory while previous instructions are being
executed in other segments of the pipeline. Thus we can execute multiple instructions
simultaneously. The pipeline will be more efficient if the instruction cycle is divided into
segments of equal duration

Advantages of Pipelining

1. The cycle time of the processor is reduced.

2. It increases the throughput of the system
3. It makes the system reliable.

Disadvantages of Pipelining

1. The design of pipelined processor is complex and costly to manufacture.

2. The instruction latency is more.
Hardwired v/s Micro-programmed Control Unit

To execute an instruction, there are two types of control units Hardwired Control unit and Micro-
programmed control unit.

1. Hardwired control units are generally faster than microprogrammed designs

2. Microprogrammed control unit is a relatively simple logic circuit that is capable of (1)
sequencing through microinstructions and (2) generating control signals to execute each
microinstruction.

Hardwired Control Unit Microprogrammed Control Unit

Micrprogrammed control unit generates the
Hardwired control unit generates the control
control signals with the help of micro
signals needed for the processor using logic
instructions stored in control memory
circuits
Hardwired control unit is faster when compared to
This is slower than the other as micro
microprogrammed control unit as the required
instructions are used for generating signals
control signals are generated with the help of
here
hardwares
Difficult to modify as the control signals that need Easy to modify as the modification need to
to be generated are hard wired be done only at the instruction level
Less costlier than hardwired control as only
More costlier as everything has to be realized in
micro instructions are used for generating
terms of logic gates
control signals
It cannot handle complex instructions as the circuit
It can handle complex instructions
design for it becomes complex
Only limited number of instructions are used due to Control signals for many instructions can be
the hardware implementation generated
Used in computer that makes use of Reduced Used in computer that makes use of
Instruction Set Computers(RISC) Complex Instruction Set Computers(CISC)
 Control Unit Implementation
• Hardwired
Memory Instruction code

. Control
Sequence Counter Combinational . signals
Logic Circuits

• Microprogrammed
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Microprogrammed Control Unit

• Control signals
– Group of bits used to select paths in
multiplexers, decoders, arithmetic logic units
• Control variables
– Binary variables specify microoperations
• Certain microoperations initiated while others idle
• Control word
– String of 1’s and 0’s represent control variables

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 Microprogrammed Control Unit
• Control memory
– Memory contains control words
• Microinstructions
– Control words stored in control memory
– Specify control signals for execution of
microoperations
• Microprogram
– Sequence of microinstructions

Control Memory
• Read-only memory (ROM)
• Content of word in ROM at given address specifies
microinstruction
• Each computer instruction initiates series of
microinstructions (microprogram) in control memory
• These microinstructions generate microoperations to
– Fetch instruction from main memory
– Evaluate effective address
– Execute operation specified by instruction
– Return control to fetch phase for next instruction

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• Control memory
– Contains microprograms (set of microinstructions)
– Microinstruction contains
• Bits initiate microoperations
• Bits determine address of next microinstruction
• Control address register (CAR)
– Specifies address of next microinstruction
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Microprogrammed Control Organization

• Next address generator (microprogram

sequencer)
– Determines address sequence for control memory
• Microprogram sequencer functions
– Increment CAR by one
– Transfer external address into CAR
– Load initial address into CAR to start control
operations

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 Microprogram Routines
• Routine
– Group of microinstructions stored in control
memory
• Each computer instruction has its
own microprogram routine to
generate microoperations that
execute the instruction

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Microprogram Routines
• Subroutine
– Sequence of microinstructions used by other routines
to accomplish particular task
• Example
– Subroutine to generate effective address of
operand for memory reference instruction
• Subroutine register (SBR)
– Stores return address during subroutine call

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 Conditional Branching
• Branching from one routine to another
depends on status bit conditions
• Status bits provide parameter info such as
– Carry-out of adder
– Sign bit of number
– Mode bits of instruction
• Info in status bits can be tested and actions
initiated based on their conditions: 1 or 0
• Unconditional branch
– Fix value of status bit to 1

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Mapping of Instruction
• Each computer instruction has its own
microprogram routine stored in a
given location of the control memory
• Mapping
– Transformation from instruction code bits to
address in control memory where routine is
located

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 Mapping of Instruction
• Example
– Mapping 4-bit operation code to 7-bit address

OP-codes of Instructions
ADD AND 0000
LDA 0001
0010
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Address Sequencing
• Address sequencing capabilities
required in control unit
– Incrementing CAR
– Unconditional or conditional branch,
depending on status bit conditions
– Mapping from bits of instruction to address for
control memory
– Facility for subroutine call and return

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What is microprogram sequencer?

A sequencer or microsequencer generates the addresses used to step through the
microprogram of a control store. It is used as a part of the control unit of a CPU or as a stand-
alone generator for address ranges.
Microprogram Sequencer

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