WO2013094601A1 - 発光ダイオード及びその製造方法 - Google Patents
発光ダイオード及びその製造方法 Download PDFInfo
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- WO2013094601A1 WO2013094601A1 PCT/JP2012/082790 JP2012082790W WO2013094601A1 WO 2013094601 A1 WO2013094601 A1 WO 2013094601A1 JP 2012082790 W JP2012082790 W JP 2012082790W WO 2013094601 A1 WO2013094601 A1 WO 2013094601A1
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- layer
- light
- light emitting
- emitting diode
- mesa structure
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/385—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0025—Processes relating to coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/405—Reflective materials
Definitions
- the present invention relates to a light emitting diode and a method for manufacturing the same.
- This application claims priority based on Japanese Patent Application No. 2011-277536 for which it applied to Japan on December 19, 2011, and uses the content here.
- a point light source type light emitting diode that extracts light generated in the light emitting layer from a part of the upper surface of the element is known.
- this type of light emitting diode one having a current confinement structure for limiting a current-carrying region in a light emitting layer to a part of the surface is known (for example, Patent Document 1).
- a light emitting diode having a current confinement structure a light emitting region is limited. Since light is emitted from the light emission hole provided immediately above the region, high light output can be obtained and the emitted light can be efficiently taken into an optical component or the like.
- an active layer or the like has a pillar structure in order to narrow a light emitting region in a direction parallel to the substrate, and a light emitting opening (light emitting hole) is formed on the light extraction surface of the top surface of the pillar structure.
- the structure provided with the layer which has this is known (for example, patent document 2).
- FIG. 15 shows a light emitting diode in which a lower mirror layer 132, an active layer 133, an upper mirror layer 134, and a contact layer 135 are sequentially provided on a substrate 131.
- the active layer 133, the upper mirror layer 134, The contact layer 135 is formed as a pillar structure 137, and the pillar structure 137 and its periphery are covered with a protective film 138.
- An electrode film 139 is formed on the protective film 138, and a top surface 137a (light extraction surface) of the pillar structure 137 is formed.
- 5 shows a resonator type light emitting diode in which an opening 139a for light emission is formed in the electrode film 139.
- Reference numeral 140 denotes a back electrode.
- the side surface 137 b of the pillar structure 137 is formed to be perpendicular or steeply inclined with respect to the substrate 131.
- a protective film is usually formed on the side surface of the pillar structure by vapor deposition or sputtering, and then a metal (for example, Au) film for electrodes is formed by vapor deposition.
- Au for example, Au
- the electrode metal film When the protective film becomes a discontinuous film (symbol A in FIG. 15), the electrode metal film enters the discontinuous portion and contacts the active layer or the like, causing a leak. Further, when the electrode metal film becomes a discontinuous film (reference numeral B in FIG. 15), it causes a conduction failure.
- the point light source type light emitting diode having the light emitting hole on the top surface of the pillar structure as shown in FIG. 15 a current flows through the entire light emitting layer in the pillar structure. Therefore, the amount of light emitted from the light emitting layer other than the portion immediately below the light emitting hole is large, and the light emitted from the portion other than directly below the light emitting hole is a light emitting diode compared to the light emitted directly below the light emitting hole. The probability of injecting outside is low. For this reason, improvement in light extraction efficiency has been hindered.
- the present invention has been made in view of the above circumstances, and a light-emitting diode having a uniform film thickness and a high light extraction efficiency as well as a leakage and energization, and a protective film and an electrode film formed thereon. It is an object of the present invention to provide a method of manufacturing a light-emitting diode that can be manufactured at a lower cost than conventional ones while reducing defects and improving yield.
- a light emitting diode that includes a reflective layer made of metal, a transparent film, a compound semiconductor layer including an active layer and a contact layer in order on a support substrate, and emits light to the outside from a light emitting hole.
- a flat portion and a mesa structure portion having an inclined side surface and a top surface on the upper portion, and at least a part of the flat portion and the mesa structure portion are sequentially covered with a protective film and an electrode film.
- the mesa structure portion includes at least a part of the active layer, and the inclined side surface is formed by wet etching, and the horizontal cross-sectional area is continuously reduced toward the top surface.
- the protective film covers at least a part of the flat portion, the inclined side surface of the mesa structure portion, and a peripheral region of the top surface of the mesa structure portion, and is viewed in a plan view.
- An energization window that is disposed inside the edge region and around the light emission hole and exposes part of the surface of the compound semiconductor layer, and the electrode film is exposed from the energization window.
- a continuous film that is in direct contact with the surface of the semiconductor layer, covers at least a part of the protective film formed on the flat portion, and has the light emission hole on the top surface of the mesa structure portion
- the transparent film is formed between the reflective layer and the compound semiconductor layer, and is within the transparent film and in a range overlapping the light emission hole in a plan view.
- a light-emitting diode wherein a through electrode is provided so as to be in contact with the reflective layer.
- a light emitting diode comprising, in order, a reflective layer made of metal, a transparent film, a compound semiconductor layer including an active layer and a contact layer in order on a support substrate, and taking out light from a light emitting hole, A flat portion and a mesa structure portion having an inclined side surface and a top surface are provided on the upper portion, and each of the flat portion and the mesa structure portion is sequentially covered with a protective film and an electrode film, respectively.
- the mesa structure portion includes at least a part of the active layer, and the inclined side surface is formed by wet etching, and a horizontal sectional area is continuously reduced toward the top surface.
- the protective film covers at least a part of the flat portion, the inclined side surface of the mesa structure portion, and the peripheral region of the top surface of the mesa structure portion, and is a flat surface.
- an energizing window that is disposed inside the peripheral region and around the light emitting hole and exposes a part of the surface of the compound semiconductor layer, and the electrode film is exposed from the energizing window.
- the compound semiconductor layer is formed so as to directly contact the surface of the compound semiconductor layer, cover at least a part of the protective film formed on the flat portion, and have the light emission hole on the top surface of the mesa structure portion.
- the transparent film is formed between the reflective layer and the compound semiconductor layer, and is located in the transparent film and in a position overlapping the current-carrying window in plan view.
- the transparent electrode is formed by extending the line segment connecting the points between the outer periphery of the energization window and the outer periphery of the figure obtained by projecting the light emission hole on the active layer at the shortest distance.
- the light-emitting diode according to (1) wherein the light-emitting diode is formed within a range of a reduced projection figure of the light emitting hole that is reduced and projected upward.
- the through electrode is made of either AuBe or AuZn.
- the transparent film is made of any one of SiO 2 , SiN, SiON, Al 2 O 3 , MgF 2 , TiO 2 , TiN, and ZnO.
- (6) The light emitting diode according to any one of (1) to (5), wherein the contact layer is in contact with the electrode film.
- the light emitting layer included in the active layer is ((Al X1 Ga 1-X1 ) Y1 In 1-Y1 P (0 ⁇ X1 ⁇ 1, 0 ⁇ Y1 ⁇ 1), (Al X2 Ga 1-X2 ) As (0 ⁇ X2 ⁇ 1), (In X3 Ga 1-X3 ) As (0 ⁇ X3 ⁇ 1)), according to any one of (1) to (13), Light emitting diode.
- a method for manufacturing a light emitting diode comprising: a reflective substrate made of metal; a transparent film; and a compound semiconductor layer including an active layer and a contact layer in order on a support substrate, and emitting light from the light emission hole to the outside.
- Continuous area Forming a small mesa structure portion and a flat portion disposed around the mesa structure portion, at least a part of the flat portion, the inclined side surface of the mesa structure portion, and A portion of the surface of the compound semiconductor layer that covers at least the peripheral region of the top surface of the mesa structure and is disposed inside the peripheral region and around the light emission hole in plan view.
- a protective film so as to have a current-carrying window that exposes a portion of the protective film, and directly contacting the surface of the compound semiconductor layer exposed from the current-carrying window and a part of the protective film formed on the flat portion And a step of forming at least an electrode film, which is a continuous film formed so as to have the light emission hole, on the top surface of the mesa structure portion.
- a method for manufacturing a light-emitting diode comprising: a reflective layer made of metal; a transparent film; and a compound semiconductor layer including an active layer and a contact layer in order on a support substrate; A step of forming a compound semiconductor layer including a contact layer and an active layer in order on a growth substrate; a transparent film on the compound semiconductor layer; formed in a plan view in the transparent film A step of forming a penetrating electrode penetrating the compound semiconductor layer and the reflective layer at a position overlapping a predetermined energization window; and a reflective layer made of metal on the transparent film and the penetrating electrode.
- the wet etching is performed using at least one selected from the group consisting of a phosphoric acid / hydrogen peroxide mixture, an ammonia / hydrogen peroxide mixture, a bromomethanol mixture, and potassium iodide / ammonia.
- a light-emitting diode includes a reflective layer made of metal, a transparent film, and a compound semiconductor layer including an active layer and a contact layer in order on a support substrate, and emits light from a light emission hole to the outside.
- a protective film is disposed inside the peripheral region of the top surface of the mesa structure and around the light emission hole, and has a current-carrying window that exposes part of the surface of the compound semiconductor layer.
- the electrode film is in direct contact with the surface of the compound semiconductor layer exposed from the current-carrying window, and is in contact with the compound semiconductor layer and the reflective layer within a range of the transparent film that overlaps the light emission hole in plan view.
- the structure by which the penetration electrode was penetrated was employ
- the amount of light emitted from is increased.
- the ratio of light toward the light exit hole is increased, and the light extraction efficiency is improved.
- a configuration having a flat portion and a mesa structure portion having an inclined side surface and a top surface on the upper portion thereof is adopted.
- the light emitting diode of the present invention employs a configuration in which the inclined side surface of the mesa structure portion is formed by wet etching and the horizontal cross-sectional area is continuously reduced toward the top surface.
- a protective film and an electrode film thereon are more easily formed on the side surface than in the case of the vertical side surface, a continuous film with a uniform film thickness is formed. Therefore, there is no leakage or poor conduction due to the discontinuous film, and stable and bright light emission is ensured.
- Such an effect is achieved as long as a mesa structure portion having an inclined side surface formed by wet etching is provided, and is an effect obtained regardless of the laminated structure inside the light emitting diode and the configuration of the substrate.
- a light-emitting diode includes a reflective layer made of metal, a transparent film, and a compound semiconductor layer including an active layer and a contact layer in order on a support substrate, and emits light from a light emission hole to the outside.
- a structure was adopted in which a through electrode was provided so as to be in contact with the compound semiconductor layer and the reflective layer at a position in the transparent film that overlaps the energization window in plan view. As a result, current concentrates between the portion of the electrode film in which the conduction window is filled and the through electrode.
- the amount of light emitted from a portion of the active layer immediately below the energization window is larger than the amount of light emitted from a portion other than the portion directly below it.
- the ratio of light toward the light exit hole is increased, and the light extraction efficiency is improved.
- the through electrode extends the line segment connecting the points between the outer periphery of the energization window and the outer periphery of the figure in which the light emission hole is projected on the active layer at the shortest distance.
- a configuration is adopted in which the light emission hole projected on the transparent film is projected within the range of the reduced projection figure.
- the amount of light emitted in the portion immediately below the range of the active layer that is narrower than the range overlapping the light emission hole is larger than the amount of light emitted in the portion other than the portion directly below the active layer.
- the ratio of the light toward the light exit hole is further increased, and the light extraction efficiency is further improved.
- the light emitting diode according to one aspect of the present invention employs a configuration in which the through electrode is made of either AuBe or AuZn. As a result, the contact resistance between the compound semiconductor layer and the reflective layer is low, and low voltage driving is possible.
- the light-emitting diode according to one embodiment of the present invention employs a structure in which the transparent film is made of any one of SiO 2 , SiN, SiON, Al 2 O 3 , MgF 2 , TiO 2 , TiN, and ZnO. As a result, high output is achieved while ensuring high transparency of light reflected from the reflective layer.
- the light emitting diode according to one embodiment of the present invention employs a configuration in which the contact layer is in contact with the electrode film. As a result, the contact resistance of the ohmic electrode is lowered and low voltage driving is possible.
- the light emitting diode according to an aspect of the present invention employs a configuration in which the mesa structure portion is rectangular in plan view.
- the mesa shape is prevented from changing depending on the etching depth due to the influence of anisotropy in the wet etching during manufacturing. Therefore, since the mesa portion area can be easily controlled, a highly accurate dimensional shape is obtained.
- the light emitting diode according to one aspect of the present invention employs a configuration in which each inclined side surface of the mesa structure portion is formed to be offset with respect to the orientation flat of the substrate. As a result, the influence of anisotropy due to the substrate orientation is mitigated with respect to the four sides constituting the rectangular mesa structure, and a uniform mesa shape / gradient is obtained.
- the light emitting diode according to one embodiment of the present invention employs a configuration in which the height of the mesa structure portion is 3 to 7 ⁇ m and the width of the inclined side surface in plan view is 0.5 to 7 ⁇ m.
- the light emitting diode according to one aspect of the present invention employs a configuration in which the light emission hole is circular or elliptical in plan view. As a result, it is easier to form a uniform contact region than a structure having corners such as a rectangle, and the occurrence of current concentration at the corners can be suppressed. Further, it is suitable for coupling to a fiber or the like on the light receiving side.
- the light emitting diode according to one aspect of the present invention employs a configuration in which the diameter of the light emission hole is 50 to 150 ⁇ m.
- the diameter of the light emission hole is 50 to 150 ⁇ m.
- the light emitting diode according to one embodiment of the present invention employs a configuration having a bonding wire in a portion on the flat portion of the electrode film. As a result, since wire bonding is performed on the flat portion to which a sufficient load (and ultrasonic waves) can be applied, wire bonding with high bonding strength is realized.
- the light emitting diode of the present invention employs a configuration in which the light emitting layer included in the active layer is composed of multiple quantum wells. As a result, sufficient injected carriers are confined in the well layer, thereby increasing the carrier density in the well layer. As a result, the light emission recombination probability increases and the response speed is high.
- a method for manufacturing a light-emitting diode includes, on a support substrate, a reflective layer made of metal, a transparent film, and a compound semiconductor layer including an active layer and a contact layer in order.
- a method for manufacturing a light emitting diode for extracting light to the outside comprising: forming a compound semiconductor layer including a contact layer and an active layer in order on a growth substrate; a transparent film on the compound semiconductor layer; and the transparent film And a step of forming a penetrating electrode penetrating in contact with the compound semiconductor layer and the reflective layer in a range overlapping with the light emission hole to be formed in plan view. .
- a configuration including a step of bonding a support substrate on a reflective layer and a step of removing a growth substrate is employed.
- a method for manufacturing a light-emitting diode according to an aspect of the present invention includes a mesa structure portion in which a compound semiconductor layer is wet-etched so that a horizontal cross-sectional area is continuously reduced toward a top surface, and the mesa structure A mesa structure part and a flat part so as to have a step of forming a flat part arranged around the structure part and an energization window exposing a part of the surface of the compound semiconductor layer on the top surface of the mesa structure part A step of forming a protective film thereon, and a direct contact with the surface of the compound semiconductor layer exposed from the energization window, covering at least a part of the protective film formed on the flat portion, and the top surface of the mesa structure portion And a step of forming an
- the pillar structure is formed by conventional anisotropic dry etching, the side surface is formed vertically, but by forming the mesa structure portion by wet etching, the side surface can be formed with a gently inclined side surface. Further, by forming the mesa structure portion by wet etching, the formation time can be shortened as compared with the case where the pillar structure is formed by conventional dry etching.
- a method for manufacturing a light-emitting diode includes, on a support substrate, a reflective layer made of metal, a transparent film, and a compound semiconductor layer including an active layer and a contact layer in order.
- a method for manufacturing a light emitting diode for extracting light to the outside comprising: forming a compound semiconductor layer including a contact layer and an active layer in order on a growth substrate; a transparent film on the compound semiconductor layer; and the transparent film And a step of forming a through electrode penetrating in contact with the compound semiconductor layer and the reflective layer at a position overlapping the energization window to be formed in plan view.
- the amount of light emitted from a portion of the active layer immediately below the energization window is larger than the amount of light emitted from portions other than the portion directly below the energizing window. Therefore, the ratio of the light toward the light exit hole is increased, and a light emitting diode with improved light extraction efficiency can be manufactured.
- FIG. 1 is a schematic cross-sectional view of an example of a light emitting diode to which the present invention is applied.
- FIG. 2 is a perspective view of a light emitting diode formed on a wafer including the light emitting diode shown in FIG.
- a light emitting diode according to an embodiment to which the present invention is applied will be described in detail with reference to FIGS. 1 and 2.
- a light-emitting diode 100 shown in FIG. 1 includes a reflective layer 2 made of metal, a transparent film 30, a compound semiconductor layer 20 including an active layer 4 and a contact layer 5 in this order (see FIG. 4) in order. And a light emitting diode that emits light to the outside from the light emitting hole 9b.
- the light-emitting diode includes a flat portion 6 and a mesa structure portion 7 having an inclined side surface 7a and a top surface 7b on the top thereof. Each of the flat portion 6 and the mesa structure portion 7 is covered with a protective film 8 and an electrode film 9 in order.
- the mesa structure portion 7 includes at least a part of the active layer 4, and the inclined side surface 7a is not formed by wet etching, and the horizontal sectional area is continuously reduced toward the top surface 7b. It becomes.
- the protective film 8 covers at least a part of the flat portion 6, the inclined side surface 7 a of the mesa structure portion 7, and the peripheral region 7 ba of the top surface 7 b of the mesa structure portion 7.
- the protective film 8 is also disposed inside the peripheral region 7ba and around the light emission hole 9b in a plan view, and exposes a part of the surface of the compound semiconductor layer 20 (contact layer 5).
- Have The electrode film 9 is in contact with the surface of the compound semiconductor layer 20 (contact layer 5) exposed from the energization window 8b.
- the electrode film 9 is a continuous film formed so as to cover at least a part of the protective film 8 formed on the flat portion 6 and to have the light emission hole 9 b on the top surface 7 b of the mesa structure portion 7.
- the transparent film 30 is formed between the reflective layer 2 and the compound semiconductor layer 20.
- a through electrode 31 is provided in the transparent film 30 so as to be in contact with the compound semiconductor layer 20 and the reflective layer 2 within a range overlapping the light emitting hole 9b in plan view.
- a junction (contact) layer 3 is provided between the reflective layer 2 and the active layer 4.
- the mesa structure portion 7 of the light emitting diode of the present embodiment is rectangular in plan view, and the light emission hole 9b of the electrode film 9 is circular in plan view.
- the plan view of the mesa structure 7 is not limited to a rectangle, and the plan view of the light emission hole 9b is not limited to a circle.
- a light leakage prevention film 16 for preventing light leakage from the side surface is provided on the electrode film of the mesa structure 7. Further, a back electrode 40 is provided on the lower surface side of the substrate 1.
- streets (scheduled cutting lines) 21 (dotted lines 22 are It can be manufactured by cutting along a longitudinal centerline. That is, by applying a laser, a blade, or the like to the portion of the street 21 along the alternate long and short dash line 22, each light emitting diode can be cut into individual pieces.
- the mesa structure portion 7 has a structure protruding upward with respect to the flat portion 6 and has an inclined side surface 7a and a top surface 7b.
- the inclined side surface 7 a is composed of the entire layer of the active layer 4 and the inclined cross section of the contact layer 5, and a protective film 8 and an electrode film (front surface electrode film) are formed on the inclined side surface 7 a.
- a light leakage prevention film 16 is sequentially provided.
- the top surface 7b is made of the surface of the contact layer 5, and a protective film 8 (parts 8ba and 8d) and an electrode film 9 (parts 9ba, 9bb and 9d) are provided on the top surface 7b. It has been.
- the mesa structure 7 of the present invention includes the contact layer 5 and at least a part of the active layer 4.
- the mesa structure 7 includes the contact layer 5 and the entire active layer 4. Only a part of the active layer 4 may be included in the mesa structure portion 7.
- the entire active layer 4 is preferably included in the mesa structure 7. This is because all the light emitted from the active layer 4 is generated in the mesa structure, and the light extraction efficiency is improved.
- the mesa structure portion 7 has an inclined side surface 7a formed by wet etching. Further, the mesa structure portion 7 is formed such that the horizontal cross-sectional area continuously decreases from the support substrate 1 side toward the top surface 7b. Since the inclined side surface 7a is formed by wet etching, the inclined side surface 7a is formed so as to be gradually inclined from the top surface side to the support substrate 1 side.
- the height h of the mesa structure 7 is preferably 3 to 7 ⁇ m, and the width w of the inclined side surface 7a in plan view is preferably 0.5 to 7 ⁇ m.
- the height h is more preferably 5 to 7 ⁇ m.
- the width w is more preferably 3 to 7 ⁇ m, and further preferably 4 to 6 ⁇ m.
- the side surface of the mesa structure portion 7 is not vertical or steeply inclined but gently inclined, it becomes easy to form the protective film and the electrode metal film with a uniform film thickness, resulting in a discontinuous film. This is because there is no fear, and therefore there is no leakage or poor conduction due to the discontinuous film, and stable and high-luminance emission is ensured. Further, it is not preferable to perform wet etching until the height exceeds 7 ⁇ m because the inclined side surface tends to be in an overhang shape (reverse taper shape). This is because, in the overhang shape (reverse taper shape), it is more difficult to form the protective film and the electrode film with a uniform film thickness without discontinuous portions than in the case of the vertical side surface.
- the height h is an electrode that covers the portion 8ba of the protective film 8 from the surface of the electrode film 9 (portion 9c) formed through the protective film on the flat portion 6. This refers to the vertical distance (see FIG. 1) to the surface of the film 9 (portion 9ba).
- the width w is the lowest of the electrode film 9 (reference numeral 9a) on the inclined side surface connected to the edge from the edge of the electrode film 9 (reference numeral 9ba) covering the protective film 8 at the reference numeral 8ba. The horizontal distance of the edge (see FIG. 1).
- FIG. 3 is an electron micrograph of a cross section in the vicinity of the mesa structure portion 7.
- the layer configuration of the example shown in FIG. 3 is the same as that of the example described later except that the contact layer is made of Al 0.3 Ga 0.7 As and the layer thickness is 3 ⁇ m.
- the mesa structure portion of the present invention is formed by wet etching, the horizontal cross-sectional area (or width or diameter) of the mesa structure portion increases from the top surface side to the substrate side (downward in the figure). ) To increase. With this shape, it can be determined that the mesa structure is formed not by dry etching but by wet etching. In the example shown in FIG. 3, the height h is 7 ⁇ m and the width w is 3.5 to 4.5 ⁇ m.
- the mesa structure 7 is preferably rectangular in plan view.
- the mesa shape can be prevented from changing depending on the etching depth due to the influence of anisotropy in wet etching during manufacturing, and the area of each surface of the mesa structure can be easily controlled, so a highly accurate dimensional shape can be obtained. It is.
- the position of the mesa structure portion 7 in the light emitting diode is preferably shifted to one side in the long axis direction of the light emitting diode in order to reduce the size of the element. Since the flat portion 6 needs to have a size required for attaching a bonding wire (not shown), there is a limit to making it narrow. This is because by bringing the mesa structure 7 to the other side, the range of the flat portion 6 can be minimized and the device can be miniaturized.
- the flat part 6 is a part arranged around the mesa structure part 7.
- wire bonding is performed at a portion located on the flat portion of the electrode film to which a sufficient load and / or ultrasonic wave can be applied, so that wire bonding with high bonding strength can be realized.
- a protective film 8 and an electrode film (front surface electrode film) 9 are sequentially formed on the flat portion 6, and a bonding wire (not shown) is attached on the electrode film 9.
- the material disposed immediately below the protective film 8 of the flat portion 6 is determined by the internal configuration of the mesa structure portion 7.
- the protective film 8 includes a portion 8a that covers the inclined side surface 7a of the mesa structure portion 7 and a portion 8c that covers at least a portion of the flat portion 6 (a portion 8cc that covers the flat portion on the opposite side across the mesa structure portion 7).
- the protective film 8 has a current-carrying window 8b that exposes a part of the surface of the contact layer 5 inside the peripheral region 7ba in plan view.
- the energization window 8b of the present embodiment is a portion of the surface of the contact layer 5 on the top surface 7b of the mesa structure 7 that is located below the portion 8ba located below the peripheral region 7ba and the portion 8d covering the central portion.
- a region (annular region) between two concentric circles with different diameters between the two is exposed.
- the first function of the protective film 8 is to dispose the light emitting region and the light extraction range in a lower layer of the front surface electrode film 9, and the compound semiconductor of the front surface electrode film 9. This is to restrict the inflow or outflow of current between the compound semiconductor layer 20 in contact with the layer 20 to the portion of the energization window 8b on the top surface. That is, after the protective film 8 is formed, a front electrode film is formed on the entire surface including the protective film 8, and then the front electrode film is patterned. Thus, no current flows even if the surface electrode film is not removed. An energization window 8b of the protective film 8 is formed at a place where current is desired to flow.
- the shape and position of the energization window 8b is the shape as shown in FIG. It is not limited to or position.
- the second function of the protective film 8 is not an essential function.
- the protective film 8 shown in FIG. 1 as a second function, the protective film 8 is arranged on the surface of the contact layer 5 in the light emission hole 9 a of the surface electrode film 9 in plan view, and light is transmitted through the protective film 8. Is to protect the surface of the contact layer 5 from which light can be extracted.
- the second embodiment to be described later there is no protective film under the light emitting hole, and the light is directly extracted from the light emitting hole 9b without the protective film, and the second function is provided. No.
- the material of the protective film 8 a known material can be used as the insulating layer.
- a silicon oxide film is preferable because it is easy to form a stable insulating film.
- the protective film 8 since light is extracted through the protective film 8 (8d), the protective film 8 needs to have translucency.
- the thickness of the protective film 8 is preferably 0.3 to 1 ⁇ m, and more preferably 0.5 to 0.8 ⁇ m. This is because if the thickness is less than 0.3 ⁇ m, the insulation is not sufficient, and if it exceeds 1 ⁇ m, it takes too much time to form.
- the film thickness of the protective film is a film thickness in a flat portion such as the upper surface of the support structure portion or the top surface of the mesa structure portion.
- the electrode film (front surface electrode film) 9 is a portion that covers a portion 9 a that covers the inclined side surface 7 a of the protective film 8 and a portion 8 c that covers at least a part of the flat portion 6 of the protective film 8. 9c, a portion 9ba of the protective film 8 that covers the portion 8ba that covers the peripheral region 7ba of the top surface 7b of the mesa structure portion 7, and a portion 9bb that embeds the current-carrying window 8b of the protective film 8 (hereinafter referred to as “contact” as appropriate) And a portion 9d that covers the outer peripheral edge portion of the portion 8d that covers the central portion of the top surface 7b of the protective film 8 on the top surface 7b of the mesa structure portion 7.
- the first function of the electrode film (front surface electrode film) 9 is a function as an electrode for flowing current, and the second function is to limit the range in which the emitted light is emitted.
- the contact portion 9bb is responsible for the first function
- the portion 9d covering the outer peripheral edge of the portion 8d covering the central portion is responsible for the second function.
- a non-translucent protective film may be used so that the protective film bears it.
- the electrode film 9 may cover the entire protective film 8 of the flat portion 6 or a part thereof. It is preferable to cover as wide a range as possible in order to properly attach the bonding wire. From the viewpoint of cost reduction, as shown in FIG. 2, it is preferable not to cover the electrode film on the street 21 when cutting each light emitting diode.
- the electrode film 9 is in contact with the contact layer 5 only at the contact portion 9bb on the top surface 7b of the mesa structure portion 7. Therefore, the current that has flowed inside the light emitting diode flows only through the contact portion 9bb.
- the electrode film 9 As a material of the electrode film 9, a known electrode material that can obtain a good ohmic contact with the contact layer can be used. For example, when an n-type electrode is used, a layer structure (AuGe / Ni / Au) in which an AuGe layer, a Ni layer, and an Au layer are sequentially formed can be used.
- the film thickness of the electrode film 9 is preferably 0.5 to 2.0 ⁇ m, more preferably 1.2 to 1.8 ⁇ m. This is because it is difficult to obtain a uniform and good ohmic contact if the thickness is less than 0.5 ⁇ m, and the strength and thickness at the time of bonding are insufficient, and if it exceeds 2.0 ⁇ m, the cost is excessive.
- the film thickness of the electrode film refers to the film thickness in a flat portion such as the upper surface of the support structure portion or the top surface of the mesa structure portion.
- the transparent film 30 is formed between the reflective layer 2 and the compound semiconductor layer 20.
- the material constituting the transparent film 30 is not limited as long as it is a material having translucency and lower conductivity than the through electrode 31.
- the film thickness of the transparent film 30 is determined by the film thickness of the through electrode. As will be described later, since the thickness of the through electrode 31 is preferably 0.05 to 2 ⁇ m, the thickness of the transparent film 30 is also preferably 0.05 to 2 ⁇ m.
- the through electrode 31 is provided so as to be in contact with the compound semiconductor layer 20 and the reflective layer 2 in a range (R2 (see FIG. 4)) that overlaps the light emission hole 9b in plan view in the transparent film 30. ing.
- the through electrode 31 is disposed within this range, the current concentrates between the portion of the electrode film 9 in which the conduction window is filled (contact portion 9bb) and the through electrode 31.
- the amount of light emitted in the portion immediately below the range of the active layer that overlaps the light emission hole 9b is larger than the amount of light emitted in the portion other than the portion immediately below the active layer.
- the ratio of light toward the light exit hole is increased, and the light extraction efficiency is improved.
- the through electrode 31 is formed on the transparent film 30 by extending the line segment connecting the points at the shortest distance between the outer periphery of the energization window 8b and the outer periphery of the figure formed by projecting the light emission hole 9b on the active layer 4. It is preferable that the light emission hole 9b projected to be reduced is formed within the range of the reduced projection figure (R4 (see FIG. 4)).
- R4 the reduced projection figure
- the through electrode 31 is disposed within this range, the amount of light emitted in a portion immediately below the range 9b of the active layer that is narrower than the range 9b overlapping the light emitting hole (see R5 (see FIG. 4)) The amount of light emitted from the portion increases. As a result, the ratio of the light toward the light exit hole is further increased, and the light extraction efficiency is further improved.
- the shape of the through electrode 31 is not particularly limited, and may be composed of a plurality of electrodes arranged discretely.
- the metal material constituting the through electrode 31 is not limited as long as it is a material that can make ohmic contact with the bonding (contact) layer 5.
- AuBe or AuZn can be used.
- the film thickness of the through electrode 31 is preferably 0.05 to 2 ⁇ m. If the thickness is less than 0.05 ⁇ m, it is difficult to form a through electrode, and if it exceeds 2 ⁇ m, the cost increases.
- FIG. 4 shows an enlarged sectional view of the vicinity of the through electrode 31 and the energization window 8b of the light emitting diode shown in FIG.
- FIG. 4 shows an enlarged sectional view of the vicinity of the through electrode 31 and the energization window 8b of the light emitting diode shown in FIG.
- R1 indicates the inside of the outer periphery of the energization window 8b (the range S (see FIG. 1) surrounded by the energization window 8b and the energization window 8b).
- R2 indicates the range (expansion) of the light emission hole 9b.
- R3 indicates the inside of the outer periphery of the figure in which the light emission hole 9b is projected onto the active layer 4.
- R3 is the same size as R2.
- R4 is the outer periphery of the energizing window 8b (point P is one point on the outer periphery) and the outer periphery of the figure in which the light emission hole 9b is projected onto the active layer 4 (point Q is one point on the outer periphery.
- the thickness of the layer 9 is arbitrary, but the effect of the present invention can be obtained at any position), and the line segment connecting each point (one of which is between the PQ) is extended as it is with the shortest distance.
- R5 indicates a range where the through electrode 31 is actually formed.
- the through electrode 31 is formed so as to fill the range of R5, which is within the range of R4 in plan view. Since the through electrode 31 is formed in this range, the current concentrates in a range connecting the contact portion 9bb of the electrode film 9 (portion where the energization window 8b is filled) and the through electrode 31. As a result, the amount of light emitted from the portion of the active layer 4 disposed between TT and QQ is greater than the amount of light emitted from other portions. As a result, the amount of light emitted immediately below the light exit hole 9b is significantly greater than the amount of light emitted elsewhere. As a result, the ratio of the light emitted from the light emission hole 9b increases, and the light extraction efficiency is improved.
- a light leakage prevention film 16 that prevents light emitted from the active layer from leaking from the side surface of the mesa structure 7 to the outside of the device may be provided.
- the material of the light leakage prevention film 16 a known reflective material can be used.
- the same AuGe / Ni / Au can be used.
- a protective film 8d (8) is formed under the light emitting hole 9b, and light is emitted from the light emitting hole 9b through the protective film 8d (8) on the top surface of the mesa structure portion 7. It is the structure to take out.
- the shape of the light exit hole 9b is preferably circular or elliptical in plan view. Compared to a structure having a corner such as a rectangle, a uniform contact region can be easily formed, and current concentration at the corner can be suppressed. Moreover, it is because it is suitable for the coupling
- the diameter of the light exit hole 9b is preferably 50 to 150 ⁇ m. If it is less than 50 ⁇ m, the current density at the emission part becomes high and the output is saturated at a low current. On the other hand, if it exceeds 150 ⁇ m, it is difficult to diffuse the current to the whole emission part, and the light emission efficiency with respect to the injection current decreases. It is.
- the material of the support substrate 1 metal, Ge, Si, GaP, GaInP, SiC, or the like can be used.
- Ge substrates and Si substrates are advantageous in that they are inexpensive and have excellent moisture resistance.
- GaP, GaInP, and SiC substrates have the advantage that they have a thermal expansion coefficient close to that of the light emitting portion, excellent moisture resistance, and good thermal conductivity.
- the metal substrate is excellent from the viewpoints of cost, mechanical strength, and heat dissipation. Further, as will be described later, the structure in which a plurality of metal layers (metal plates) are laminated has an advantage that the thermal expansion coefficient can be adjusted as a whole metal substrate.
- a structure in which a plurality of metal layers (metal plates) are stacked can be employed.
- the number of layers of these two types of metal layers is preferably an odd number in total.
- the first metal layer is preferably made of a material having a larger thermal expansion coefficient than the compound semiconductor layer. Since the thermal expansion coefficient of the metal substrate as a whole is close to the thermal expansion coefficient of the compound semiconductor layer, it is possible to suppress warping and cracking of the metal substrate when the compound semiconductor layer and the metal substrate are joined, and the light emitting diode This is because the production yield can be improved.
- the first metal layer made of a material having a smaller thermal expansion coefficient than that of the compound semiconductor layer. Since the thermal expansion coefficient of the metal substrate as a whole is close to the thermal expansion coefficient of the compound semiconductor layer, it is possible to suppress warping and cracking of the metal substrate when joining the compound semiconductor layer and the metal substrate, and the production yield of light emitting diodes It is because it can improve. From the above viewpoint, any of the two types of metal layers may be the first metal layer or the second metal layer.
- a preferred example is a metal substrate composed of three layers of Cu / Mo / Cu. From the above viewpoint, the same effect can be obtained with a metal substrate composed of three layers of Mo / Cu / Mo, but the metal substrate composed of three layers of Cu / Mo / Cu is a Cu layer that has high mechanical strength and is easy to process Mo. Therefore, there is an advantage that processing such as cutting is easier than a metal substrate composed of three layers of Mo / Cu / Mo.
- the thermal expansion coefficient of the entire metal substrate is, for example, 6.1 ppm / K for a three-layer metal substrate of Cu (30 ⁇ m) / Mo (25 ⁇ m) / Cu (30 ⁇ m), and Mo (25 ⁇ m) / Cu (70 ⁇ m). In the case of a metal substrate composed of three layers of / Mo (25 ⁇ m), it is 5.7 ppm / K.
- the metal layer constituting the metal substrate is preferably made of a material having high thermal conductivity. This is because the heat dissipation of the metal substrate can be increased, the light emitting diode can emit light with high brightness, and the life of the light emitting diode can be extended.
- thermo conductivity 420 W / m ⁇ K
- alloys thereof are preferably used.
- the metal layers are made of a material having a thermal expansion coefficient substantially equal to that of the compound semiconductor layer.
- the material of the metal layer is preferably a material having a thermal expansion coefficient that is within ⁇ 1.5 ppm / K of the thermal expansion coefficient of the compound semiconductor layer.
- the thermal conductivity of the entire metal substrate is, for example, 250 W / m ⁇ K for a three-layer metal substrate of Cu (30 ⁇ m) / Mo (25 ⁇ m) / Cu (30 ⁇ m), and Mo (25 ⁇ m) / Cu (70 ⁇ m) / In the case of a metal substrate composed of three layers of Mo (25 ⁇ m), it is 220 W / m ⁇ K.
- the metal substrate is bonded, and when the growth substrate is removed using an etching solution, the upper surface of the metal substrate is avoided in order to avoid deterioration due to the etching solution. It is preferable to cover the lower surface with a metal protective film. Further, it is preferable to cover the side surface with a metal protective film.
- the material for the metal protective film is preferably made of a metal containing at least one of chromium, nickel, chemically stable platinum, and gold having excellent adhesion.
- the metal protective film is optimally composed of a layer combining nickel having good adhesion and gold having excellent chemical resistance.
- the thickness of the metal protective film is not particularly limited, but is 0.2 to 5 ⁇ m from the balance between resistance to the etching solution and cost. Preferably, 0.5 to 3 ⁇ m is an appropriate range. In the case of expensive gold, the thickness is desirably 2 ⁇ m or less.
- a known functional layer can be added to the structures of the reflective layer 2 and the compound semiconductor layer 20 (bonding layer 3, active layer 4, contact layer 5) as appropriate.
- a known layer structure such as a current diffusion layer for planarly diffusing the element driving current over the entire light emitting portion, or a current blocking layer or a current constricting layer for limiting the area through which the element driving current flows is used. Can be provided.
- the active layer 4 includes a lower clad layer 11, a lower guide layer 12, a light emitting layer 13, an upper guide layer 14, and an upper clad layer 15 which are sequentially laminated. That is, the active layer 4 includes a lower clad layer 11 disposed on the lower side and the upper side of the light-emitting layer 13 in order to “confine” the light-emitting layer 13 with a carrier (carrier) that causes radiative recombination.
- DH double hetero
- the light emitting layer 13 can have a quantum well structure in order to control the light emission wavelength of a light emitting diode (LED). That is, the light emitting layer 13 can have a multilayer structure (laminated structure) of the well layer 17 and the barrier layer 18 having a barrier layer (also referred to as a barrier layer) 18 at both ends.
- a barrier layer also referred to as a barrier layer
- the thickness of the light emitting layer 13 is preferably in the range of 0.02 to 2 ⁇ m.
- the conductivity type of the light emitting layer 13 is not particularly limited, and any of undoped, p-type and n-type can be selected. In order to increase the light emission efficiency, it is desirable to have an undoped crystallinity with a good crystallinity or a carrier concentration of less than 3 ⁇ 10 17 cm ⁇ 3 .
- a known well layer material can be used.
- AlGaAs, InGaAs, or AlGaInP can be used.
- the layer thickness of the well layer 17 is preferably in the range of 3 to 30 nm. More preferably, it is in the range of 3 to 10 nm.
- the material of the barrier layer 18 it is preferable to select a material suitable for the material of the well layer 17. In order to prevent the absorption in the barrier layer 18 and increase the light emission efficiency, it is preferable that the composition has a band gap larger than that of the well layer 17.
- AlGaAs or InGaAs is used as the material of the well layer 17
- AlGaAs or AlGaInP is preferable as the material of the barrier layer 18.
- AlGaInP is used as the material of the barrier layer 18, it does not contain As which tends to create defects, so that it has high crystallinity and contributes to high output.
- Al X1 Ga 1-X1 ) Y1 In 1-Y1 P (0 ⁇ X1 ⁇ 1, 0 ⁇ Y1 ⁇ 1) is used as the material of the well layer 17, the Al composition is higher than the material of the barrier layer 18 ( Al X4 Ga 1-X4 ) Y1 In 1-Y1 P (0 ⁇ X4 ⁇ 1, 0 ⁇ Y1 ⁇ 1, X1 ⁇ X4) or well layer (Al X1 Ga 1-X1 ) Y1 In 1-Y1 P (0 ⁇ AlGaAs whose band gap energy is larger than X1 ⁇ 1, 0 ⁇ Y1 ⁇ 1) can be used.
- the layer thickness of the barrier layer 18 is preferably equal to or greater than the layer thickness of the well layer 17.
- the number of pairs in which the well layers 17 and the barrier layers 18 are alternately stacked is not particularly limited, but is preferably 2 or more and 40 or less. . That is, the light emitting layer 13 preferably includes 2 to 40 well layers 17. Here, as a suitable range of the luminous efficiency of the light emitting layer 13, it is preferable that the well layer 17 is five or more layers. On the other hand, since the well layer 17 and the barrier layer 18 have a low carrier concentration, the forward voltage (V F ) increases when the number of pairs is increased. For this reason, it is preferable that it is 40 pairs or less, and it is more preferable that it is 20 pairs or less.
- the lower guide layer 12 and the upper guide layer 14 are provided on the lower surface and the upper surface of the light emitting layer 13, respectively, as shown in FIG. Specifically, the lower guide layer 12 is provided on the lower surface of the light emitting layer 13, and the upper guide layer 14 is provided on the upper surface of the light emitting layer 13.
- the material of the lower guide layer 12 and the upper guide layer 14 a known compound semiconductor material can be used. It is preferable to select a material suitable for the material of the light emitting layer 13. For example, AlGaAs or AlGaInP can be used.
- the material of the lower guide layer 12 and the upper guide layer 14 is preferably AlGaAs or AlGaInP.
- AlGaInP is used as the material of the lower guide layer 12 and the upper guide layer 14, since it does not contain As which tends to form defects, the crystallinity is high and contributes to high output.
- Al composition is higher than the material of the guide layer 14 ( Al X4 Ga 1-X4 ) Y1 In 1-Y1 P (0 ⁇ X4 ⁇ 1, 0 ⁇ Y1 ⁇ 1, X1 ⁇ X4) or well layer (Al X1 Ga 1-X1 ) Y1 In 1-Y1 P (0 ⁇ AlGaAs whose band gap energy is larger than X1 ⁇ 1, 0 ⁇ Y1 ⁇ 1) can be used.
- the lower guide layer 12 and the upper guide layer 14 are provided in order to reduce the propagation of defects between the lower cladding layer 11 and the upper cladding layer 15 and the light emitting layer 13, respectively.
- the layer thickness of the lower guide layer 12 and the upper guide layer 14 is preferably 10 nm or more, and more preferably 20 nm to 100 nm.
- the conductivity types of the lower guide layer 12 and the upper guide layer 14 are not particularly limited, and any of undoped, p-type, and n-type can be selected. In order to increase the light emission efficiency, it is desirable to have an undoped crystallinity with a good crystallinity or a carrier concentration of less than 3 ⁇ 10 17 cm ⁇ 3 .
- the lower clad layer 11 and the upper clad layer 15 are provided on the lower surface of the lower guide layer 12 and the upper surface of the upper guide layer 14, respectively, as shown in FIG.
- a known compound semiconductor material can be used as the material of the lower cladding layer 11 and the upper cladding layer 15. It is preferable to select a material suitable for the material of the light emitting layer 13. For example, AlGaAs or AlGaInP can be used.
- the material of the lower cladding layer 11 and the upper cladding layer 15 is preferably AlGaAs or AlGaInP.
- AlGaInP is used as the material of the lower clad layer 11 and the upper clad layer 15, it does not contain As which easily creates defects, so that the crystallinity is high and contributes to high output.
- Al composition is higher than the material of the cladding layer 15 ( Al X4 Ga 1-X4 ) Y1 In 1-Y1 P (0 ⁇ X4 ⁇ 1, 0 ⁇ Y1 ⁇ 1, X1 ⁇ X4) or well layer (Al X1 Ga 1-X1 ) Y1 In 1-Y1 P (0 ⁇ AlGaAs whose band gap energy is larger than X1 ⁇ 1, 0 ⁇ Y1 ⁇ 1) can be used.
- the lower cladding layer 11 and the upper cladding layer 15 are configured to have different polarities.
- the carrier concentration and thickness of the lower clad layer 11 and the upper clad layer 15 can be in a known suitable range. It is preferable to optimize the conditions so that the luminous efficiency of the light emitting layer 13 is increased.
- the lower and upper clad layers need not be provided. Further, by controlling the composition of the lower clad layer 11 and the upper clad layer 15, the warpage of the compound semiconductor layer 20 can be reduced.
- the contact layer 5 is provided in order to reduce the contact resistance with the electrode.
- the material of the contact layer 5 is preferably a material having a band gap larger than that of the light emitting layer 13.
- the lower limit value of the carrier concentration of the contact layer 5 is preferably 5 ⁇ 10 17 cm ⁇ 3 or more and more preferably 1 ⁇ 10 18 cm ⁇ 3 or more in order to reduce the contact resistance with the electrode.
- the upper limit value of the carrier concentration is desirably 2 ⁇ 10 19 cm ⁇ 3 or less at which the crystallinity is likely to decrease.
- the thickness of the contact layer 5 is preferably 0.05 ⁇ m or more.
- the upper limit value of the thickness of the contact layer 5 is not particularly limited, but is desirably 10 ⁇ m or less in order to make the cost for epitaxial growth within an appropriate range.
- the light-emitting diode of the present invention can be incorporated into electronic devices such as lamps, backlights, mobile phones, displays, various panels, computers, game machines, lighting, etc., and machinery such as automobiles incorporating such electronic devices. it can.
- FIG. 6 shows a modified example of the light emitting diode to which the present invention is applied, and shows an enlarged cross-sectional view in the vicinity of the through electrode 32 and the energizing window 8b.
- the through electrode 31 is formed in a range (R2 or R3) (particularly in R4) overlapping the light emission hole 9b in plan view, but in the second embodiment, the through electrode 32 is formed. Is different in that it is formed at a position overlapping the energizing window 8b in plan view.
- the shape of the through electrode 32 is not particularly limited, and may be composed of a plurality of electrodes arranged discretely.
- R1 indicates the inside of the outer periphery of the energization window 8b (range S (see FIG. 1) surrounded by the energization window 8b and the energization window 8b), and R2 indicates the range (expansion) of the light emission hole 9b.
- the point is the same as in FIG.
- R6 indicates the width of the energization window 8b and indicates a position (range) overlapping the energization window 8b.
- the dotted line is drawn downward from the outer periphery and inner periphery of the energization window 8b to indicate the range.
- R7 indicates a range where the through electrode 32 is actually formed.
- the through electrode 32 is formed in the transparent film 2 at a position R6 that overlaps the energizing window 8b in plan view.
- the through electrode 32 is disposed within this range, current concentrates between the portion of the electrode film 9 in which the conduction window is filled (contact portion 9bb) and the through electrode 32.
- the portion where the current is concentrated is a portion near the light exit hole 9b. Since the amount of light emission increases at the portion where the current is concentrated, the ratio of the light toward the light exit hole is increased, and the light extraction efficiency is improved.
- FIG. 7 is a schematic sectional view showing a modification of the light emitting diode of the first embodiment to which the present invention is applied.
- a protective film is formed under the light emitting hole, and light is extracted from the light emitting hole through the protective film on the top surface of the mesa structure portion.
- a protective film is not provided under the light emitting hole, and light is directly extracted from the light emitting hole 9b without using the protective film.
- the protective film 28 includes at least a part 28 c of the flat portion 6, the inclined side surface 7 a of the mesa structure portion 7, and the top surface 7 b of the mesa structure portion 7. Covers the peripheral region 7ba.
- the protective film 28 also has a current-carrying window 28b that exposes the surface of the contact layer 5 inside the peripheral region 7ba in plan view.
- the electrode film 29 includes at least a part of the flat portion 6 through the protective film 28, the inclined side surface 7 a of the mesa structure portion 7 through the protective film 28, and the top of the mesa structure portion 7 through the protective film 28. Covering the peripheral area 7ba of the surface 7b. Further, the electrode film 29 covers only a part of the surface of the contact layer 5 exposed from the energizing window 28 b on the top surface of the mesa structure portion 7 and exposes the other part 5 a of the surface of the contact layer 5. 29b.
- the protective film 28 includes a portion 28 a that covers the inclined side surface 7 a of the mesa structure portion 7 and a portion 28 c that covers at least a part of the flat portion 6 (the mesa structure portion 7. And a portion 28ba that covers the peripheral region 7ba of the top surface 7b of the mesa structure 7).
- the protective film 28 also has a current-carrying window 28b that exposes the surface of the contact layer 5 inside the peripheral region 7ba in plan view. That is, the energization window 28 b exposes the surface of the contact layer 5 other than the portion located below the peripheral region 7 ba on the top surface 7 b of the mesa structure 7.
- An electrode film (front electrode film) 9 is formed on the protective film 8, but the protective film 8 is formed in a portion where no current flows.
- the electrode film (front surface electrode film) 29 of the second embodiment includes a portion 29 a that covers a portion 28 a that covers the inclined side surface 7 a of the protective film 28, and a protective film 28.
- the top surface 7b of the structure portion 7 includes a portion 29bb that covers the contact layer 5 so as to open the light emission hole 29b beyond the portion 28ba of the protective film 28.
- the portion 29bb has both the first function and the second function.
- FIG. 8A to FIG. 8C are schematic cross-sectional views of a part of the metal substrate for explaining the manufacturing process of the metal substrate.
- a first metal layer (first metal plate) 51b having a thermal expansion coefficient larger than the material of the active layer and a second metal layer (second metal) having a thermal expansion coefficient smaller than the material of the active layer Plate) 51a and hot-pressed to form.
- first metal layers 51b and one substantially flat plate-like second metal layer 51a are prepared.
- Cu having a thickness of 10 ⁇ m is used as the first metal layer 51b
- Mo having a thickness of 75 ⁇ m is used as the second metal layer 51a.
- the second metal layer 51a is inserted between the two first metal layers 51b, and these are overlapped.
- the first metal layer 51b is Cu
- the second metal layer 51a is Mo
- a metal substrate 1 having three layers is formed.
- the metal substrate 1 has a thermal expansion coefficient of 5.7 ppm / K and a thermal conductivity of 220 W / m ⁇ K.
- a metal protective film 51c that covers the entire surface of the metal substrate 1, that is, the upper surface, the lower surface, and the side surfaces is formed.
- the side surface covered by the metal protective film is the outer peripheral side surface of the metal substrate (plate). Therefore, when the side surface of the metal substrate 1 of each light-emitting diode after separation is covered with the metal protective film 51c, a step of covering the side surface with the metal protective film is performed separately.
- FIG. 8C shows a part of the metal substrate (plate) that is not on the outer peripheral end side, so that the metal protective film on the outer peripheral side surface does not appear in the figure.
- the metal substrate may be configured without a metal protective film.
- a known film forming method can be used for the metal protective film, but a plating method capable of forming a film on the entire surface including the side surface is most preferable.
- nickel is then plated with gold, and the metal substrate 1 in which the upper surface, the side surface, and the lower surface of the metal substrate are sequentially covered with the nickel film and the gold film (metal protective film) can be produced.
- the plating material is not particularly limited, and known materials such as copper, silver, nickel, chromium, platinum, and gold can be applied. However, a layer that combines nickel having good adhesion and gold having excellent chemical resistance is optimal.
- known techniques and chemicals can be used as the plating method.
- An electroless plating method that does not require an electrode is simple and desirable.
- an epitaxial stacked body 80 including the active layer 4 is formed by growing a plurality of epitaxial layers on one surface 61 a of a semiconductor substrate (growth substrate) 61.
- the semiconductor substrate 61 is a substrate for forming the epitaxial laminated body 80, and is, for example, a Si-doped n-type GaAs single crystal substrate in which one surface 61a is inclined by 15 ° from the (100) plane.
- a gallium arsenide (GaAs) single crystal substrate can be used as a substrate on which the epitaxial laminated body 80 is formed.
- the active layer 4 may be formed by metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), liquid phase epitaxy (Liquid Phase EpiLex), or the like. Can be used.
- MOCVD metal organic chemical vapor deposition
- MBE molecular beam epitaxy
- Liquid Phase EpiLex liquid phase epitaxy
- Each layer is epitaxially grown using Note that biscyclopentadienyl magnesium ((C 5 H 5 ) 2 Mg) is used as a Mg doping material. Further, disilane (Si 2 H 6 ) is used as a Si doping raw material. Further, phosphine (PH 3 ) or arsine (AsH 3 ) is used as a raw material for the group V constituent element.
- the p-type GaP layer 3 is grown at 750 ° C., for example, and the other epitaxial growth layers are grown at 730 ° C., for example.
- a buffer layer 62 a made of n-type GaAs doped with Si is formed on one surface 61 a of the growth substrate 61.
- the buffer layer 62a for example, n-type GaAs doped with Si is used, the carrier concentration is 2 ⁇ 10 18 cm ⁇ 3 , and the layer thickness is 0.2 ⁇ m.
- the etching stop layer 62b is formed on the buffer layer 62a.
- the etching stop layer 62b is a layer for preventing the cladding layer and the light emitting layer from being etched when the semiconductor substrate is etched away.
- the contact layer 5 made of, for example, Si-doped n-type Al X Ga 1-X As (0.1 ⁇ X ⁇ 0.3) is formed on the etching stop layer 62b.
- a clad layer 63 a made of n-type (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P doped with Si is formed on the contact layer 5.
- a light emitting layer 64 having a laminated structure of three pairs of a well layer / barrier layer made of Al 0.17 Ga 0.83 As / Al 0.3 Ga 0.7 As is formed on the cladding layer 63a. Form a film.
- a clad layer 63b made of p-type (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P doped with Mg is formed on the light emitting layer 64.
- a bonding (contact) layer 3 of a p-type GaP layer doped with Mg is formed on the cladding layer 63b.
- the affixing surface is adjusted (that is, mirror-finished. For example, the surface roughness is 0.2 nm or less).
- a guide layer may be provided between the clad layer and the light emitting layer.
- the transparent film 30 and the through electrode 31 that penetrates the transparent film 30 in the transparent film 30 are formed.
- Either the transparent film 30 or the through electrode 31 may be formed first using a known method, but the case where the transparent film 30 and the through electrode 31 are formed in this order will be described below.
- the transparent film 30 is formed on the entire surface of the bonding (contact) layer 3 by, for example, the CDV method.
- the transparent film 30 is formed on the entire surface of the bonding (contact) layer 3 by, for example, the CDV method.
- a technique of photolithography and etching within the range overlapping the light emission hole to be formed in plan view of the transparent film 30 (in the case of the second embodiment, “the energization window to be formed in plan view”).
- a hole for the through electrode is formed at a position overlapping with “)”.
- a resist pattern having openings corresponding to the through-electrode holes is formed on the transparent film 30, and etching is performed to form through-holes in the transparent film 30.
- a film made of a metal material constituting the through electrode is formed on the entire surface by, for example, vapor deposition, and the through electrode hole of the transparent film 30 is filled, and the through electrode 31 is formed in the transparent film 30. Form. Thereafter, the resist pattern is removed.
- the reflective layer 2 made of, for example, Au is formed on the transparent film 30.
- ⁇ Support substrate bonding process> [1]
- a Ge substrate is used as the support substrate 1 (see FIG. 10A for the reference)
- the above-described support substrate 1 prepared by forming a layer 42 made of Ti / Au / In on the front surface of the germanium substrate 41 and forming a layer 43 made of Ti / Au on the back surface.
- the layer and the reflective layer 2 made of Au of the structure shown in FIG. 10A are overlaid and heated at 320 ° C. and pressurized with 500 g / cm 2 , for example, and the support substrate 1 is epitaxially grown as shown in FIG. 10A. Bonded to a structure including a laminate.
- a barrier layer (not shown), a bonding layer (not shown), or any of them are sequentially formed on the reflective layer 2. Such a layer may be formed.
- the barrier layer can suppress the metal contained in the metal substrate from diffusing and reacting with the reflective layer 2.
- a material for the barrier layer nickel, titanium, platinum, chromium, tantalum, tungsten, molybdenum, or the like can be used.
- the barrier layer can improve the performance of the barrier by a combination of two or more kinds of metals, for example, a combination of a platinum layer and a titanium layer in order from the reflective layer side. Even if a barrier layer is not provided, the bonding layer can have the same function as the barrier layer by adding these materials to the bonding layer.
- the bonding layer is a layer for bonding the compound semiconductor layer 20 including the active layer 4 to the metal substrate 1 with good adhesion.
- an Au-based eutectic metal that is chemically stable and has a low melting point is used.
- the Au-based eutectic metal include eutectic compositions of alloys such as AuGe, AuSn, AuSi, and AuIn.
- the semiconductor substrate 61 on which the epitaxial laminated body 80, the reflective layer 2 and the like are formed, and the metal substrate 1 formed in the metal substrate manufacturing process are carried into a decompression device, and the reflective layer (If the bonding layer or the like is provided, the bonding surface (the bonding layer or the like is not shown in FIG. 10B) and the bonding surface 1A of the metal substrate 1 are arranged so as to face each other.
- a load of 500 kg is applied to apply the bonding surface of the reflective layer. (If there is a bonding layer or the like, the bonding surface) and the bonding surface 1A of the metal substrate 1 are bonded to form a bonded structure 90.
- the semiconductor substrate 61 and the buffer layer 62a are selectively removed from the bonded structure 90 with an ammonia-based etching solution.
- the metal substrate of this embodiment is covered with the metal protective film and has high resistance to the etching solution, it can be avoided that the metal substrate is deteriorated in quality.
- the etching stop layer 62b is selectively removed with a hydrochloric acid-based etching solution. Since the metal substrate of the present embodiment is covered with a metal protective film and has high resistance to the etching solution, the metal substrate is prevented from being deteriorated in quality.
- a back electrode 40 is formed on the back surface of the metal substrate 1.
- the back electrode 40 need not be formed.
- a compound semiconductor layer other than the mesa structure portion that is, at least a part of the contact layer and the active layer, or the contact layer
- the active layer and at least part of the bonding (contact) layer are wet-etched.
- the contact layer 5 and the active layer 4 are wet-etched. Specifically, first, as shown in FIG. 12, a photoresist is deposited on the contact layer which is the uppermost layer of the compound semiconductor layer, and a resist pattern 65 having an opening 65a in addition to the mesa structure is formed by photolithography. To do.
- the plan view shape of the mesa structure portion is determined by the shape of the opening 65 a of the resist pattern 65.
- An opening 65 a having a shape corresponding to a desired shape in plan view is formed in the resist pattern 65.
- the size of the mesa-type structure portion scheduled to be formed is larger than the top surface of the “mesa-type structure portion” by about 10 ⁇ m above, below, left and right of each side.
- the depth of etching that is, to which layer of the compound semiconductor layer is removed by etching depends on the type of etchant and the etching time. After performing wet etching, the resist is removed.
- An etchant used for wet etching is not limited, but an ammonia-based etchant (for example, a mixed solution of ammonia / hydrogen peroxide solution) is suitable for an As-based compound semiconductor material such as AlGaAs, and P such as AlGaInP.
- An iodine-based etchant (for example, potassium iodide / ammonia) is suitable for a compound semiconductor material, a phosphoric acid / hydrogen peroxide mixture is suitable for an AlGaAs system, and a bromomethanol mixture is suitable for a P-system. Yes.
- a phosphoric acid mixed solution may be used in a structure formed only of an As system
- an ammonia mixed solution may be used in an As system structure portion
- an iodine mixed solution may be used in a P system structure portion in a structure in which an As / P system is mixed.
- the compound semiconductor layer as described above that is, in the case of the uppermost AlGaAs contact layer 5, the AlGaInP clad layer 63a, the AlGaAs light emitting layer 64, the AlGaInP clad layer 63b, and the GaP layer 3.
- etchants having high etching rates for the As-based contact layer 5 and the light-emitting layer 64 and the other P-based layers.
- iodine-based etchant for example, an etchant in which iodine (I), potassium iodide (KI), pure water (H 2 O), and ammonia water (NH 4 OH) are mixed can be used.
- ammonia-based etchant for example, an ammonia / hydrogen peroxide mixed solution (NH 4 OH: H 2 O 2 : H 2 O) can be used.
- the contact layer 5 made of AlGaAs in the portion other than the mesa structure portion is removed by etching using an ammonia-based etchant.
- the cladding layer 63a made of AlGaInP which is the next layer, functions as an etching stop layer. Therefore, it is not necessary to strictly control the etching time.
- the thickness of the contact layer 5 is 0.05 ⁇ m. If so, etching may be performed for about 10 seconds.
- the cladding layer 63a made of AlGaInP other than the mesa structure is removed by etching using an iodine-based etchant.
- the etching rate is 0 when an etchant mixed at a ratio of 500 cc of iodine (I), 100 g of potassium iodide (KI), 2000 cc of pure water (H 2 O) and 90 cc of aqueous ammonia hydroxide (NH 4 OH) is used. It was 72 ⁇ m / min.
- the thickness of the cladding layer 63a If the thickness is about 4 ⁇ m, etching may be performed for about 6 minutes.
- the light emitting layer 64 made of AlGaAs other than the mesa structure is removed by etching using an ammonia-based etchant. Also in this etching, the cladding layer 63b made of AlGaInP, which is the next layer, functions as an etching stop layer, so that it is not necessary to strictly control the etching time, but the thickness of the light emitting layer 64 is about 0.25 ⁇ m. Then, the etching may be performed for about 40 seconds.
- the cladding layer 63b made of AlGaInP other than the mesa structure portion is etched away using an iodine-based etchant.
- an iodine-based etchant it is necessary to stop the etching up to the GaP layer 3.
- the etching time needs to be 4 minutes or less.
- the wet etching time is set to 30 to The etching removal can be performed for 120 seconds.
- FIG. 13 and Table 1 show that the etching depth (corresponding to “h” in FIG. 1) is substantially proportional to the etching time (sec), but the increasing rate of the etching width increases as the etching time increases. That is, as shown in FIG. 13, the increase rate of the horizontal cross-sectional area (or width or diameter) of the mesa structure portion increases as the depth increases (as it goes downward in the drawing).
- This etching shape is different from the etching shape by dry etching. Therefore, it can be determined from the shape of the inclined slope of the mesa structure portion whether the mesa structure portion is formed by dry etching or wet etching.
- a material for the protective film 8 is formed on the entire surface. Specifically, for example, SiO 2 is formed on the entire surface by sputtering.
- Step of removing the protective film on the street and contact layer a photoresist is deposited on the entire surface, and a resist pattern having openings corresponding to the energizing windows 8b on the contact layer and portions corresponding to the streets is formed by photolithography.
- the material of the protective film 8 in the portion corresponding to the current-carrying window 8b on the top surface of the mesa structure portion and the portion corresponding to the street is removed by wet etching using buffered hydrofluoric acid.
- FIG. 14 shows a plan view of the protective film 8 in the vicinity of the energization window 8b. Thereafter, the resist is removed.
- the front surface electrode film 9 is formed. That is, the front electrode film 9 having the light emission holes 9 b is formed on the protective film 8 and on the contact layer 5 exposed from the energization window 8 b of the protective film 8. Specifically, a photoresist is deposited on the entire surface, and an electrode film including a portion corresponding to the light emission hole 9b by photolithography and a cut portion (street) between a plurality of light emitting diodes on the wafer substrate is unnecessary. A resist pattern having openings other than the portions is formed. Next, an electrode film material is deposited.
- the deposited metal tends to wrap around in order to deposit the electrode film material on the inclined side surface of the mesa structure.
- Vapor deposition is performed using a type of vapor deposition apparatus. Thereafter, the resist is removed.
- the shape of the light emission hole 9b is determined by the shape of the opening of the resist pattern (not shown). A resist pattern having the opening shape corresponding to the shape of the desired light emission hole 9b is formed.
- the light emitting diodes on the wafer substrate are separated into individual pieces. Specifically, for example, the street portion is cut by a dicing saw or a laser and cut into individual light emitting diodes on the wafer substrate.
- Metal protective film forming process on the side of the metal substrate When a metal substrate is used as the support substrate, a metal protective film is formed on the side surface of the cut metal substrate of the singulated light emitting diode under the same conditions as those for forming the upper and lower metal protective films. May be.
- the light-emitting diode of the present invention will be described in more detail with reference to the example of the first embodiment, but the present invention is not limited to this example.
- a light-emitting diode lamp in which a light-emitting diode chip was mounted on a substrate was prepared for characteristic evaluation.
- the outer diameter R1 of the conduction window 8b is 166 ⁇ m
- the inner diameter is 154 ⁇ m
- the diameter R2 of the light emission hole is 150 ⁇ m
- the outer diameter R5 of the through electrode 31 is 100 ⁇ m. .
- a layer 42 made of Ti / Au / In was formed on the surface of the germanium substrate 41 with a thickness of 0.1 ⁇ m / 0.5 ⁇ m / 0.3 ⁇ m.
- a layer 43 made of Ti / Au was formed on the back surface of the germanium substrate 41 with a thickness of 0.1 ⁇ m / 0.5 ⁇ m.
- an epitaxial wafer having an emission wavelength of 730 nm was fabricated by sequentially laminating compound semiconductor layers on a GaAs substrate made of n-type GaAs single crystal doped with Si.
- the GaAs substrate the plane inclined by 15 ° from the (100) plane in the (0-1-1) direction was used as the growth plane, and the carrier concentration was set to 2 ⁇ 10 18 cm ⁇ 3 .
- the layer thickness of the GaAs substrate was about 0.5 ⁇ m.
- an n-type buffer layer 62a made of GaAs doped with Si
- an etching stop layer 62b made of Si-doped (Al 0.5 Ga 0.5 ) 0.5 In 0.5 P
- Si-doped the n-type contact layer 5 made of Al0.3GaAs of doped Si (Al 0.7 Ga 0.3) 0.5 in consisting 0.5 P n-type upper cladding layer 63a, Al 0.4 Ga
- An upper guide layer made of 0.6 As, a well layer / barrier layer 64 made of a pair of Al 0.17 Ga 0.83 As / Al 0.3 Ga 0.7 As, and Al 0.4 Ga 0.6 As
- a lower guide layer Mg-doped (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P p-type lower cladding layer 63b, (Al 0.5 Ga 0.5 ) 0.5 In 0.
- a compound semiconductor layer was epitaxially grown on a GaAs substrate having a diameter of 50 mm and a thickness of 250 ⁇ m by using a low pressure metal organic chemical vapor deposition apparatus method (MOCVD apparatus) to form an epitaxial wafer.
- MOCVD apparatus metal organic chemical vapor deposition apparatus method
- trimethylaluminum ((CH 3 ) 3 Al), trimethylgallium ((CH 3 ) 3 Ga) and trimethylindium ((CH 3 ) 3 In) are used as the raw material for the group III constituent element did.
- biscyclopentadienyl magnesium bis- (C 5 H 5 ) 2 Mg
- disilane (Si 2 H 6 ) was used as a Si doping material.
- phosphine (PH 3 ) and arsine (AsH 3 ) were used as raw materials for the group V constituent elements.
- the growth temperature of each layer the p-type GaP layer was grown at 750 ° C. The other layers were grown at 700 ° C.
- the buffer layer made of GaAs has a carrier concentration of about 2 ⁇ 10 18 cm ⁇ 3 and a layer thickness of about 0.5 ⁇ m.
- the etching stop layer had a carrier concentration of 2 ⁇ 10 18 cm ⁇ 3 and a layer thickness of about 0.5 ⁇ m.
- the contact layer had a carrier concentration of about 2 ⁇ 10 18 cm ⁇ 3 and a layer thickness of about 0.05 ⁇ m.
- the upper cladding layer had a carrier concentration of about 1 ⁇ 10 18 cm ⁇ 3 and a layer thickness of about 3.0 ⁇ m.
- the well layer was undoped Al 0.17 Ga 0.83 As with a thickness of about 7 nm, and the barrier layer was undoped Al 0.3 Ga 0.7 As with a thickness of about 19 nm.
- the lower guide layer was undoped and had a thickness of about 50 nm.
- the lower cladding layer had a carrier concentration of about 8 ⁇ 10 17 cm ⁇ 3 and a layer thickness of about 0.5 ⁇ m.
- the intermediate layer had a carrier concentration of about 8 ⁇ 10 17 cm ⁇ 3 and a layer thickness of about 0.05 ⁇ m.
- the GaP layer had a carrier concentration of about 3 ⁇ 10 18 cm ⁇ 3 and a layer thickness of about 3.5 ⁇ m.
- the GaP layer 3 was polished to a region extending from the surface to a depth of about 1 ⁇ m and mirror-finished.
- the surface roughness of the GaP layer was set to 0.18 nm.
- a through electrode 31 made of AuBe having a thickness of 500 nm and an outer diameter R5 (see FIG. 4) of 100 ⁇ m and a transparent film 30 made of SiO 2 having a thickness of 500 nm were formed on the GaP layer 3.
- the reflective layer 2 made of Au was formed to a thickness of 0.7 ⁇ m on the transparent film 30 and the through electrode 31. Further, a Ti layer having a thickness of 0.5 ⁇ m was formed as a barrier layer on the reflective layer, and an AuGe layer having a thickness of 1.0 ⁇ m was formed as a bonding layer on the barrier layer.
- a structure in which a compound semiconductor layer, a reflective layer, and the like are formed on a GaAs substrate and a metal substrate are arranged so as to face each other and carried into a decompression device, and heated at 400 ° C., They were joined under a load of 500 kg to form a joined structure.
- the GaAs substrate which is a growth substrate for the compound semiconductor layer, and the buffer layer were selectively removed from the bonded structure with an ammonia-based etchant, and the etching stop layer was selectively removed with a hydrochloric acid-based etchant.
- a protective film made of SiO 2 was formed to a thickness of about 0.5 ⁇ m. Thereafter, after forming a resist pattern, an opening (see FIG. 11) having a concentric circular shape (outer diameter dout: 166 ⁇ m, inner diameter din: 154 ⁇ m) and a street portion opening were formed using buffered hydrofluoric acid.
- a front surface electrode (film)
- vacuum deposition is performed so that the thickness of AuGe and Ni alloy is 0.5 ⁇ m, Pt is 0.2 ⁇ m, and Au is 1 ⁇ m.
- a front surface electrode (n-type ohmic electrode) having a long side of 350 ⁇ m and a short side of 250 ⁇ m having a light emission hole 9b having a circular shape (diameter: 150 ⁇ m) in plan view was formed by lift-off. Thereafter, heat treatment was performed at 450 ° C. for 10 minutes to form an alloy, and a low-resistance n-type ohmic electrode was formed.
- This light-emitting diode lamp was manufactured by supporting (mounting) a mount with a die bonder, wire-bonding a p-type ohmic electrode and a p-electrode terminal with a gold wire, and sealing with a general epoxy resin.
- All of the 100 light-emitting diode lamps produced have the same characteristics, leak (short circuit) when the protective film becomes discontinuous, and the electrode metal film becomes discontinuous. There was no defect that was thought to be due to poor energization.
- the light emitting diode of the comparative example was formed by a liquid phase epitaxial method which is a conventional technique. This is a light emitting diode having a light emitting part of a double hetero structure having an Al 0.2 Ga 0.8 As light emitting layer on a GaAs substrate.
- the light-emitting diode of the comparative example is manufactured by forming an n-type upper clad layer made of Al 0.7 Ga 0.3 As on an n-type (100) GaAs single crystal substrate with a thickness of 20 ⁇ m and Al 0. .2 Ga 0.8 As, an undoped light-emitting layer of 2 ⁇ m, a p-type lower cladding layer of Al 0.7 Ga 0.3 As, 20 ⁇ m, and Al 0.6 Ga 0.
- a p-type thick film layer made of 4 As was produced by a liquid phase epitaxial method so as to be 120 ⁇ m. After this epitaxial growth, the GaAs substrate was removed.
- an n-type ohmic electrode having a diameter of 100 ⁇ m was formed on the surface of the n-type AlGaAs.
- p-type ohmic electrodes having a diameter of 20 ⁇ m were formed on the back surface of the p-type AlGaAs at intervals of 80 ⁇ m.
- the crushed layer was removed by etching to produce a comparative light-emitting diode chip.
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Abstract
Description
本願は、2011年12月19日に日本に出願された特願2011-277536号に基づき優先権を主張し、その内容をここに援用する。
図15は、基板131上に、下部ミラー層132と、活性層133と、上部ミラー層134と、コンタクト層135とを順に備えた発光ダイオードであって、活性層133と、上部ミラー層134と、コンタクト層135とをピラー構造137とし、ピラー構造137及びその周囲を保護膜138で被覆し、その保護膜138上に電極膜139を形成し、ピラー構造137の頂面137a(光取り出し面)において電極膜139に光出射用の開口139aを形成した共振器型発光ダイオードを示す。符号140は裏面電極である。
(1)支持基板上に、金属からなる反射層と、透明膜と、活性層及びコンタクト層を順に含む化合物半導体層とを順に備え、光射出孔から光を外部に射出する発光ダイオードであって、その上部に平坦部と、傾斜側面及び頂面を有するメサ型構造部とを備え、前記平坦部及び前記メサ型構造部はそれぞれ、少なくとも一部は保護膜、電極膜によって順に覆われてなり、前記メサ型構造部は少なくとも前記活性層の一部を含むものであって、前記傾斜側面はウェットエッチングによって形成されてなると共に前記頂面に向かって水平方向の断面積が連続的に小さく形成されてなり、前記保護膜は、前記平坦部の少なくとも一部と、前記メサ型構造部の前記傾斜側面と、前記メサ型構造部の前記頂面の周縁領域とを覆うとともに、平面視して前記周縁領域の内側であってかつ前記光射出孔の周囲に配置して、前記化合物半導体層の表面の一部を露出する通電窓を有し、前記電極膜は、前記通電窓から露出された化合物半導体層の表面に直接接触すると共に、前記平坦部上に形成された保護膜の一部を少なくとも覆い、前記メサ型構造部の頂面上に前記光射出孔を有するように形成された連続膜であり、前記透明膜は、前記反射層と前記化合物半導体層との間に形成され、前記透明膜内であって平面視して前記光射出孔に重なる範囲内に、前記化合物半導体層及び前記反射層に接触するように、貫通電極が貫設されている、ことを特徴とする発光ダイオード。
(2)支持基板上に、金属からなる反射層と、透明膜と、活性層及びコンタクト層を順に含む化合物半導体層とを順に備え、光射出孔から光を外部に取り出す発光ダイオードであって、その上部に平坦部と、傾斜側面及び頂面を有するメサ型構造部とを備え、前記平坦部及び前記メサ型構造部はそれぞれ、少なくとも一部は保護膜、電極膜によって順に覆われてなり、前記メサ型構造部は少なくとも前記活性層の一部を含むものであって、前記傾斜側面はウェットエッチングによって形成されてなると共に前記頂面に向かって水平方向の断面積が連続的に小さく形成されてなり、前記保護膜は、前記平坦部の少なくとも一部と、前記メサ型構造部の前記傾斜側面と、前記メサ型構造部の前記頂面の周縁領域とを少なくとも覆うとともに、平面視して前記周縁領域の内側であってかつ前記光射出孔の周囲に配置して、前記化合物半導体層の表面の一部を露出する通電窓を有し、前記電極膜は、前記通電窓から露出された化合物半導体層の表面に直接接触すると共に、前記平坦部上に形成された保護膜の一部を少なくとも覆い、前記メサ型構造部の頂面上に前記光射出孔を有するように形成された連続膜であり、前記透明膜は、前記反射層と前記化合物半導体層との間に形成され、前記透明膜内であって平面視して前記通電窓に重なる位置に、前記化合物半導体層及び前記反射層に接触するように、貫通電極が貫設されている、ことを特徴とする発光ダイオード。
(3)前記貫通電極が、前記通電窓の外周と前記光射出孔を前記活性層に投影させた図形の外周とを最短距離で各点間を結ぶ線分をそのまま延長することで前記透明膜上に縮小投影される前記光射出孔の縮小投影図形の範囲内に形成されている、ことを特徴とする(1)に記載の発光ダイオード。
(4)前記貫通電極がAuBe、AuZnのいずれかからなることを特徴とする(1)~(3)のいずれか一項に記載の発光ダイオード。
(5)前記透明膜がSiO2、SiN、SiON、Al2O3、MgF2、TiO2、TiN、ZnO、のいずれかからなることを特徴とする(1)~(4)のいずれか一項に記載の発光ダイオード。
(6)前記コンタクト層は前記電極膜に接触することを特徴とする(1)~(5)のいずれか一項に記載の発光ダイオード。
(7)前記メサ型構造部は平面視して矩形であることを特徴とする(1)~(6)のいずれか一項に記載の発光ダイオード。
(8)前記メサ型構造部の各傾斜側面は前記基板のオリエンテーションフラットに対してオフセットして形成されていることを特徴とする(7)に記載の発光ダイオード。
(9)前記メサ型構造部の高さが3~7μmであって、平面視した前記傾斜側面の幅が0.5~7μmであることを特徴とする(1)~(8)のいずれか一項に記載の発光ダイオード。
(10)前記光出射孔は平面視して円形又は楕円であることを特徴とする(1)~(9)のいずれか一項に記載の発光ダイオード。
(11)前記光出射孔の径が50~150μmであることを特徴とする(10)に記載の発光ダイオード。
(12)前記電極膜の前記平坦部上の部分にボンディングワイヤを有することを特徴とする(1)~(11)のいずれか一項に記載の発光ダイオード。
(13)前記活性層に含まれる発光層が多重量子井戸からなることを特徴とする(1)~(12)のいずれか一項に記載の発光ダイオード。
(14)前記活性層に含まれる発光層が((AlX1Ga1-X1)Y1In1-Y1P(0≦X1≦1,0<Y1≦1)、(AlX2Ga1-X2)As(0≦X2≦1)、(InX3Ga1-X3)As(0≦X3≦1))のいずれかからなることを特徴とする(1)~(13)のいずれか一項に記載の発光ダイオード。
(15)支持基板上に、金属からなる反射層と、透明膜と、活性層及びコンタクト層を順に含む化合物半導体層とを順に備え、光射出孔から光を外部に射出する発光ダイオードの製造方法であって、成長用基板上に、コンタクト層及び活性層を順に含む化合物半導体層を形成する工程と、前記化合物半導体層上に、透明膜と、該透明膜内であって平面視して形成予定の前記光射出孔に重なる範囲内に、前記化合物半導体層及び前記反射層に接触するように貫設された貫通電極とを形成する工程と、前記透明膜及び前記貫通電極上に金属からなる反射層を形成する工程と、前記反射層上に支持基板を接合する工程と、前記成長用基板を除去する工程と、前記化合物半導体層をウェットエッチングして、頂面に向かって水平方向の断面積が連続的に小さく形成されてなるメサ型構造部と該メサ型構造部の周囲に配置する平坦部とを形成する工程と、前記平坦部の少なくとも一部と、前記メサ型構造部の前記傾斜側面と、前記メサ型構造部の前記頂面の周縁領域とを少なくとも覆うとともに、平面視して前記周縁領域の内側であってかつ前記光射出孔の周囲に配置して、前記化合物半導体層の表面の一部を露出する通電窓を有するように、保護膜を形成する工程と、前記通電窓から露出された化合物半導体層の表面に直接接触すると共に、前記平坦部上に形成された保護膜の一部を少なくとも覆い、前記メサ型構造部の頂面上に前記光射出孔を有するように形成された連続膜である電極膜を形成する工程と、を有することを特徴とする発光ダイオードの製造方法。
(16)支持基板上に、金属からなる反射層と、透明膜と、活性層及びコンタクト層を順に含む化合物半導体層とを順に備え、光射出孔から光を外部に射出する発光ダイオードの製造方法であって、成長用基板上に、コンタクト層及び活性層を順に含む化合物半導体層を形成する工程と、前記化合物半導体層上に、透明膜と、該透明膜内であって平面視して形成予定の通電窓に重なる位置に、前記化合物半導体層及び前記反射層に接触するように貫設された貫通電極とを形成する工程と、前記透明膜及び前記貫通電極上に金属からなる反射層を形成する工程と、前記反射層上に支持基板を接合する工程と、前記成長用基板を除去する工程と、前記化合物半導体層をウェットエッチングして、頂面に向かって水平方向の断面積が連続的に小さく形成されてなるメサ型構造部と該メサ型構造部の周囲に配置する平坦部とを形成する工程と、前記平坦部の少なくとも一部と、前記メサ型構造部の前記傾斜側面と、前記メサ型構造部の前記頂面の周縁領域とを少なくとも覆うとともに、平面視して前記周縁領域の内側であってかつ前記光射出孔の周囲に配置して、前記化合物半導体層の表面の一部を露出する前記通電窓を有するように、保護膜を形成する工程と、前記通電窓から露出された化合物半導体層の表面に直接接触すると共に、前記平坦部上に形成された保護膜の一部を少なくとも覆い、前記メサ型構造部の頂面上に前記光射出孔を有するように形成された連続膜である電極膜を形成する工程と、を有することを特徴とする発光ダイオードの製造方法。
(17)前記ウェットエッチングを、リン酸/過酸化水素水混合液、アンモニア/過酸化水素水混合液、ブロムメタノール混合液、ヨウ化カリウム/アンモニアの群から選択される少なくとも1種以上を用いて行うことを特徴とする(15)又は(16)のいずれかに記載の発光ダイオードの製造方法。
本発明の一態様に係る発光ダイオードによれば、その上部に平坦部と、傾斜側面及び頂面を有するメサ型構造部とを有する構成を採用した。その結果、高い光出力が得られると共に射出させた光を光学部品等に効率良く取り込むことが可能である。
本発明の発光ダイオードは、メサ型構造部の傾斜側面はウェットエッチングによって形成されてなると共に頂面に向かって水平方向の断面積が連続的に小さく形成されてなる構成を採用した。その結果、垂直側面の場合に比べて側面に保護膜及びその上の電極膜を形成しやすいために均一な膜厚で連続な膜が形成される。そのため、不連続な膜に起因したリークや通電不良がなく、安定で高輝度の発光が担保されている。かかる効果は、ウェットエッチングによって形成されてなる傾斜側面を有するメサ型構造部を備えていれば奏する効果であり、発光ダイオードの内部の積層構造や基板の構成によらずに得られる効果である。
本発明の発光ダイオードの製造方法によれば、反射層上に支持基板を接合する工程と、成長用基板を除去する工程とを有する構成を採用した。その結果、化合物半導体層の成長基板として通常用いられるGaAs基板等の成長用基板による光の吸収を回避して、発光出力が向上した発光ダイオードを製造することができる。
本発明の一態様に係る発光ダイオードの製造方法は、化合物半導体層をウェットエッチングして、頂面に向かって水平方向の断面積が連続的に小さく形成されてなるメサ型構造部と該メサ型構造部の周囲に配置する平坦部とを形成する工程と、メサ型構造部の頂面に、化合物半導体層の表面の一部を露出する通電窓を有するように、メサ型構造部及び平坦部上に保護膜を形成する工程と、通電窓から露出された化合物半導体層の表面に直接接触すると共に、平坦部上に形成された保護膜の一部を少なくとも覆い、メサ型構造部の頂面上に光射出孔を有するように、連続膜である電極膜を形成する工程と、を有する構成を採用した。その結果、高い光出力を有すると共に射出させた光を光学部品等に効率良く取り込むことが可能である。さらに、垂直側面の場合に比べて傾斜斜面に保護膜及びその上の電極膜を形成しやすいために均一な膜厚で連続な膜が形成される。そのため、不連続な膜に起因したリークや通電不良がなく、安定で高輝度の発光が担保された発光ダイオードを製造することができる。従来の異方性のドライエッチングによりピラー構造を形成すると側面が垂直に形成されるが、ウェットエッチングによりメサ型構造部を形成することにより、側面を緩やかな傾斜の側面を形成することができる。また、ウェットエッチングによりメサ型構造部を形成することにより、従来のドライエッチングによってピラー構造を形成する場合に比べて形成時間が短縮することができる。
なお、本発明の効果を損ねない範囲で以下に記載していない層を備えてもよい。
図1に、本発明を適用した発光ダイオードの一例の断面模式図である。図2は、図1で示した発光ダイオードを含むウェハ上に形成された発光ダイオードの斜視図である。
以下に、図1及び図2を参照して、本発明を適用した一実施形態の発光ダイオードについて詳細に説明する。
本実施形態の発光ダイオードのメサ型構造部7は、平面視して矩形であり、電極膜9の光射出孔9bは平面視して円形である。メサ型構造部7の平面視は矩形に限定されず、また、光射出孔9bの平面視も円形に限定されない。
メサ型構造部7の電極膜上に、側面からの光の漏れを防止するための光漏れ防止膜16を備えている。
また、基板1の下面側には裏面電極40を備えている。
図1で示した例の場合、メサ型構造部7の内部には、コンタクト層5と、活性層4の全層とが含まれる。メサ型構造部7の内部には、活性層4の一部だけが含まれてもよい。活性層4の全層がメサ型構造部7の内部に含まれるのが好ましい。活性層4で発光した光を全てメサ型構造部内で生ずることになり、光取り出し効率が向上するからである。
また、高さが7μmを超えるまでウェットエッチングを行うと、傾斜側面がオーバーハング形状(逆テーパ状)になりやすくなるので好ましくない。オーバーハング形状(逆テーパ状)では保護膜や電極膜を均一な膜厚で不連続箇所なく形成することが垂直側面の場合よりもさらに困難になるからである。
なお、本明細書において、高さhとは、平坦部6上の保護膜を介して形成された電極膜9(符号9cの部分)の表面から、保護膜8の符号8baの部分を覆う電極膜9(符号9baの部分)の表面までの垂直方向の距離(図1参照)をいう。また、幅wとは、保護膜8の符号8baの部分を覆う電極膜9(符号9baの部分)のエッジからそのエッジにつながった傾斜側面の電極膜9(符号9aの部分)の最下のエッジの水平方向の距離(図1参照)をいう。
図3で示した例の層構成は、コンタクト層がAl0.3Ga0.7Asからなり、層厚が3μmである点以外は、後述する実施例と同様な構成である。
図3で示した例では、高さhは7μmであり、幅wは3.5~4.5μmであった。
本実施形態の通電窓8bは、メサ型構造部7の頂面7bにおいてコンタクト層5の表面のうち、周縁領域7baの下に位置する部分8baと中央部分を覆う部分8dの下に位置する部分との間の径の異なる2つの同心円間の領域(環状領域)を露出する。
通電窓8bの形状に制限はない。環状でなくてもよく、連続するものでなく離散する複数の領域からなってもよい。
従って、第1の機能を持たせるように、メサ型構造部7の頂面7bの一部に通電窓8bを形成する構成であれば、通電窓8bの形状や位置は図1のような形状や位置に限定されない。
なお、後述する第2の実施形態では、光射出孔の下に保護膜を有さず、保護膜を介さずに光射出孔9bから直接、光を取り出す構成であり、第2の機能を有さない。
なお、本実施形態では、この保護膜8(8d)越しに光を取り出すので、保護膜8は透光性を有する必要がある。
ここで、保護膜の膜厚とは、支持構造部の上面やメサ型構造部の頂面等の平坦部分における膜厚のことである。
第2の機能については非透光性の保護膜を用いることにより、その保護膜に担わせる構成でもよい。
また、電極膜9の膜厚は、0.5~2.0μmが好ましく、1.2~1.8μmがより好ましい。0.5μm未満では均一かつ良好なオーミックコンタクトを得ることが困難な上、ボンディング時の強度、厚みが不十分だからであり、2.0μmを超えるとコストがかかり過ぎるからである。
ここで、電極膜の膜厚とは、支持構造部の上面やメサ型構造部の頂面等の平坦部分における膜厚のことである。
透明膜30を構成する材料としては透光性を有し、貫通電極31よりも導電性が低い材料であれば、制限はない。例えば、SiO2、SiN、SiON、Al2O3、MgF2、TiO2、TiN、ZnOを用いることができる。
また、透明膜30の膜厚は貫通電極の膜厚で決まる。後述するように、貫通電極31の膜厚は0.05~2μmとすることが好ましいので、透明膜30の膜厚としても0.05~2μmとすることが好ましい。
また、貫通電極31の膜厚としては、0.05~2μmとすることが好ましい。0.05μm未満では貫通電極の作成が困難であり、2μmを越えるとコストが増大するためである。
貫通電極31がこの範囲に形成されていることにより、電極膜9のコンタクト部分9bb(通電窓8bを埋めている部分)と貫通電極31とを結ぶ範囲に電流が集中する。これにより、活性層4のうちT-TとQ-Qとの間に配置する部分で発光する光の量がこの部分以外で発光する光の量よりも多くなる。これにより、光射出孔9bの直下で発光する光の量がそれ以外で発光する光の量よりも格段に多くなる。その結果、光射出孔9bから射出する光の割合が多くなり、光取り出し効率が向上する。
複数の金属層(金属板)を積層した構造とする場合、2種類の金属層が交互に積層されてなるのが好ましい。特に、この2種類の金属層(例えば、これらを第1の金属層、第2の金属層という)の層数は合わせて奇数とするのが好ましい。
以上の観点からは、2種類の金属層はいずれが第1の金属層でも第2の金属層でも構わない。
2種類の金属層としては、例えば、銀(熱膨張係数=18.9ppm/K)、銅(熱膨張係数=16.5ppm/K)、金(熱膨張係数=14.2ppm/K)、アルミニウム(熱膨張係数=23.1ppm/K)、ニッケル(熱膨張係数=13.4ppm/K)およびこれらの合金のいずれかからなる金属層と、モリブデン(熱膨張係数=5.1ppm/K)、タングステン(熱膨張係数=4.3ppm/K)、クロム(熱膨張係数=4.9ppm/K)およびこれらの合金のいずれかからなる金属層との組み合わせを用いることができる。
好適な例としては、Cu/Mo/Cuの3層からなる金属基板があげられる。上記の観点ではMo/Cu/Moの3層からなる金属基板でも同様な効果が得られるが、Cu/Mo/Cuの3層からなる金属基板は、機械的強度が高いMoを加工しやすいCuで挟んだ構成なので、Mo/Cu/Moの3層からなる金属基板よりも切断等の加工が容易であるという利点がある。
例えば、銀(熱伝導率=420W/m・K)、銅(熱伝導率=398W/m・K)、金(熱伝導率=320W/m・K)、アルミニウム(熱伝導率=236W/m・K)、モリブデン(熱伝導率=138W/m・K)、タングステン(熱伝導率=174W/m・K)およびこれらの合金などを用いることが好ましい。
それらの金属層の熱膨張係数が化合物半導体層の熱膨張係数と略等しい材料からなるのがさらに好ましい。特に、金属層の材料が、化合物半導体層の熱膨張係数の±1.5ppm/K以内である熱膨張係数を有する材料であるのが好ましい。これにより、金属基板と化合物半導体層との接合時の発光部への熱によるストレスを小さくすることができる。そしてその結果、金属基板を化合物半導体層と接続させたときの熱による金属基板の割れを抑制することができ、発光ダイオードの製造歩留まりを向上させることができる。
金属基板全体としての熱伝導率は例えば、Cu(30μm)/Mo(25μm)/Cu(30μm)の3層からなる金属基板では250W/m・Kとなり、Mo(25μm)/Cu(70μm)/Mo(25μm)の3層からなる金属基板では220W/m・Kとなる。
金属保護膜の材料としては、密着性に優れるクロム、ニッケル、化学的に安定な白金、又は金の少なくともいずれか一つを含む金属からなるものであることが好ましい。
金属保護膜は密着性がよいニッケルと耐薬品に優れる金を組み合わせた層からなるのが最適である。
金属保護膜の厚さは特に制限はないが、エッチング液に対する耐性とコストのバランスから、0.2~5μmである。好ましくは、0.5~3μmが適正な範囲である。高価な金の場合は、厚さは2μm以下が望ましい。
井戸層17の材料として(AlX1Ga1-X1)Y1In1-Y1P(0≦X1≦1,0<Y1≦1)を用いた場合、バリア層18の材料としてよりAl組成の高い(AlX4Ga1-X4)Y1In1-Y1P(0≦X4≦1,0<Y1≦1,X1<X4)または井戸層(AlX1Ga1-X1)Y1In1-Y1P(0≦X1≦1,0<Y1≦1)よりバンドギャップエネルギーが大きくなるAlGaAsを用いることができる。
井戸層17の材料として(AlX1Ga1-X1)Y1In1-Y1P(0≦X1≦1,0<Y1≦1)を用いた場合、ガイド層14の材料としてよりAl組成の高い(AlX4Ga1-X4)Y1In1-Y1P(0≦X4≦1,0<Y1≦1,X1<X4)または井戸層(AlX1Ga1-X1)Y1In1-Y1P(0≦X1≦1,0<Y1≦1)よりバンドギャップエネルギーが大きくなるAlGaAsを用いることができる。
井戸層17の材料として(AlX1Ga1-X1)Y1In1-Y1P(0≦X1≦1,0<Y1≦1)を用いた場合、クラッド層15の材料としてよりAl組成の高い(AlX4Ga1-X4)Y1In1-Y1P(0≦X4≦1,0<Y1≦1,X1<X4)または井戸層(AlX1Ga1-X1)Y1In1-Y1P(0≦X1≦1,0<Y1≦1)よりバンドギャップエネルギーが大きくなるAlGaAsを用いることができる。
また、下部クラッド層11及び上部クラッド層15の組成を制御することによって、化合物半導体層20の反りを低減させることができる。
図6に、本発明を適用した発光ダイオードの変形例であって、貫通電極32及び通電窓8b近傍の拡大断面図を示す。
第1の実施形態では、貫通電極31は平面視して光射出孔9bに重なる範囲(R2又はR3)内(特にR4内)に形成されていたが、第2の実施形態では、貫通電極32は平面視して通電窓8bに重なる位置に形成された構成である点が相違する。
図6において、R1は、通電窓8bの外周の内側(通電窓8b及び通電窓8bに囲まれる範囲S(図1参照))を示し、R2は、光射出孔9bの範囲(広がり)を示す点は図4と同様である。R6は、通電窓8bの幅を示すものであって、通電窓8bに重なる位置(範囲)を示す。点線はその範囲を示すべく、通電窓8bの外周及び内周から下方に下ろしたものである。R7は、貫通電極32が実際に形成されている範囲を示す。
貫通電極32がこの範囲内に配置すると、電極膜9のうち通電窓を埋めた部分(コンタクト部分9bb)と貫通電極32との間に電流が集中する。この電流が集中する部分は光射出孔9bの直下に近い部分である。電流が集中する部分は発光量が多くなるから、光射出孔に向かう光の割合は高くなり、光取り出し効率の向上が図られている。
図7に、本発明を適用した第1の実施形態の発光ダイオードの変形例を示した断面模式図を示す。
第1の実施形態においては、光射出孔の下に保護膜が形成されており、メサ型構造部の頂面において保護膜を介して光射出孔から光を取り出す構成であった。第3の実施形態は、光射出孔の下に保護膜を有さず、保護膜を介さずに直接、光射出孔9bから光を取り出す構成である。
すなわち、第3の実施形態に係る発光ダイオード200では、保護膜28は、平坦部6の少なくとも一部28cと、メサ型構造部7の傾斜側面7aと、メサ型構造部7の頂面7bの周縁領域7baとを覆う。保護膜28はまた、平面視して周縁領域7baの内側にコンタクト層5の表面を露出する通電窓28bを有する。電極膜29は、保護膜28を介して平坦部6の少なくとも一部と、保護膜28を介してメサ型構造部7の傾斜側面7aと、保護膜28を介してメサ型構造部7の頂面7bの周縁領域7baとを覆う。さらに、電極膜29は、メサ型構造部7の頂面において通電窓28bから露出するコンタクト層5の表面の一部だけを覆ってコンタクト層5の表面の他の部分5aを露出する光射出孔29bを有する。
第2の実施形態の電極膜(おもて面電極膜)29では、部分29bbが上記の第1の機能及び第2の機能の両方を担っている。
次に、本発明の発光ダイオードの製造方法を説明する。
<支持基板の製造工程>
〔1〕支持基板1としてGe基板を用いた場合(符号は図10A参照)
ゲルマニウム基板41のおもて面41Aに例えば、Ti層とAu層とIn層が順に形成された層構造(Ti/Au/Inでなる層)42を形成し、ゲルマニウム基板41の裏面に例えば、Ti層とAu層が順に形成された層構造(Ti/Auでなる層)43を形成して、支持基板1を作製する。
図8(a)~図8(c)は、金属基板の製造工程を説明するための金属基板の一部の断面模式図である。
金属基板1として、熱膨張係数が活性層の材料より大きい第1の金属層(第1の金属板)51bと、熱膨張係数が活性層の材料より小さい第2の金属層(第2の金属板)51aとを採用して、ホットプレスして形成する。
次に、図8(a)に示すように、2枚の第1の金属層51bの間に第2の金属層51aを挿入してこれらを重ねて配置する。
金属基板1は、例えば、熱膨張係数が5.7ppm/Kとなり、熱伝導率は220W/m・Kとなる。
図8(c)は、金属基板(プレート)の外周端側でない箇所の一部を示しているものであるため、外周側面の金属保護膜は図に表れていない。
金属基板は金属保護膜を備えない構成であってもよい。
例えば、無電解めっき法では、ニッケルその後、金をめっきし、金属基板の上面、側面、下面を順にニッケル膜及び金膜(金属保護膜)で覆われた金属基板1を作製できる。
めっき材質は、特に制限はなく、銅、銀、ニッケル、クロム、白金、金など公知の材質が適用できるが、密着性がよいニッケルと耐薬品に優れる金を組み合わせた層が最適である。
めっき法は、公知の技術、薬品が使用できる。電極が不要な無電解めっき法が、簡便で望ましい。
まず、図9に示すように、半導体基板(成長用基板)61の一面61a上に、複数のエピタキシャル層を成長させて活性層4を含むエピタキシャル積層体80を形成する。
半導体基板61はエピタキシャル積層体80形成用の基板であり、例えば、一面61aが(100)面から15°傾けた面とされた、Siドープしたn型のGaAs単結晶基板である。エピタキシャル積層体80としてAlGaInP層またはAlGaAs層を用いる場合、エピタキシャル積層体80を形成する基板として砒化ガリウム(GaAs)単結晶基板を用いることができる。
なお、Mgのドーピング原料にはビスシクロペンタジエニルマグネシウム((C5H5)2Mg)を用いる。また、Siのドーピング原料にはジシラン(Si2H6)を用いる。また、V族構成元素の原料としては、ホスフィン(PH3)又はアルシン(AsH3)を用いる。
なお、p型のGaP層3は例えば、750°Cで成長させ、その他のエピタキシャル成長層は例えば、730°Cで成長させる。
エッチングストップ層62bは、半導体基板をエッチング除去する際、クラッド層および発光層までがエッチングされてしまうことを防ぐための層であり、例えば、Siドープの(Al0.5Ga0.5)0.5In0.5Pからなり、層厚を0.5μmとする。
後述する金属基板等の基板に貼り付けする前に、貼り付け面を整える(すなわち、鏡面加工する。例えば、表面粗さを0.2nm以下とする)ため、例えば、1μm程度研磨することが好ましい。
本工程では、図9に示すように、エピタキシャル積層体80上に、透明膜30と、透明膜30内に透明膜30を貫通する貫通電極31(第2の実施形態の場合は「貫通電極32」)を形成する。
公知の方法を用いて透明膜30と貫通電極31のいずれを先に形成してもよいが、以下では、透明膜30、貫通電極31の順に形成する場合を説明する。
次に、フォトリソグラフィ及びエッチングの手法を用いて、透明膜30の平面視して形成予定の光射出孔に重なる範囲内(第2の実施形態の場合は「平面視して形成予定の通電窓に重なる位置に」)に貫通電極用の孔を形成する。
具体的には、透明膜30上に貫通電極用の孔に対応する開口を有するレジストパターンを形成し、エッチングを行って透明膜30に貫通電極用の孔を形成する。
次に、その上に全面に例えば、蒸着法によって貫通電極を構成する金属材料からなる膜を成膜し、透明膜30の貫通電極用の孔を埋めて、透明膜30内に貫通電極31を形成する。
その後、レジストパターンを除去する。
次に、図9に示すように、透明膜30上に、例えば、Auからなる反射層2を形成する。
〔1〕支持基板1としてGe基板を用いた場合(符号は図10A参照)
ゲルマニウム基板41のおもて面にTi/Au/Inでなる層42を形成し、裏面にTi/Auでなる層43を形成して作製した上述の支持基板1のおもて面側のIn層と、図10Aに示した構造体のAuからなる反射層2とを重ね合わせて、例えば、320℃で加熱・500g/cm2で加圧し、図10Aに示すように、支持基板1をエピタキシャル積層体を含む構造体に接合する。
金属基板を反射層2に接合する前に、反射層2上に順に、バリア層(図示せず)、接合層(図示せず)又はそのいずれかの層を形成してもよい。
バリア層の材料としては、ニッケル、チタン、白金、クロム、タンタル、タングステン、モリブデン等を用いることができる。バリア層は、2種類以上の金属の組み合わせ、たとえば、反射層側から順に白金層とチタン層の組み合わせなどにより、バリアの性能を向上させることができる。
なお、バリア層を設けなくても、接合層にそれらの材料を添加することにより接合層にバリア層と同様な機能を持たせることもできる。
接合層の材料としては、化学的に安定で、融点の低いAu系の共晶金属などを用いられる。Au系の共晶金属としては、例えば、AuGe、AuSn、AuSi、AuInなどの合金の共晶組成を挙げることができる。
次に、減圧装置内を3×10-5Paまで排気した後、重ね合わせた半導体基板61と金属基板1とを400℃に加熱した状態で、500kgの荷重を印加して反射層の接合面(接合層等を有する場合はその接合面)と金属基板1の接合面1Aとを接合して、接合構造体90を形成する。
次に、図11に示すように、接合構造体90から、半導体基板61及び緩衝層62aをアンモニア系エッチング液により選択的に除去する。
このとき、本実施形態の金属基板は金属保護膜に覆われており、エッチング液に対する耐性が高いため、金属基板が品質劣化することを回避できる。
さらに、図11に示すように、エッチングストップ層62bを塩酸系エッチング液により選択的に除去する。
本実施形態の金属基板は金属保護膜に覆われており、エッチング液に対する耐性が高いため、金属基板が品質劣化することが防止される。
次に、図11に示すように、金属基板1の裏面に裏面電極40を形成する。
なお、支持基板1として金属基板を用いる場合は、裏面電極40を形成しなくてもよい。
次に、メサ型構造部(保護膜及び電極膜を除く)を形成するために、メサ型構造部以外の部分の化合物半導体層すなわち、コンタクト層と活性層の少なくとも一部と、又は、コンタクト層と活性層と接合(コンタクト)層の少なくとも一部とをウェットエッチングする。図1で示したメサ型構造部を形成するためには、コンタクト層5と活性層4とをウェットエッチングする。
具体的には、まず、図12に示すように、化合物半導体層の最上層であるコンタクト層上にフォトレジストを堆積し、フォトリソグラフィによりメサ型構造部以外に開口65aを有するレジストパターン65を形成する。
メサ型構造部の平面視形状はレジストパターン65の開口65aの形状によって決まる。レジストパターン65に所望の平面視形状に対応する形状の開口65aを形成する。
レジストパターンにおいてメサ型構造部形成予定箇所の大きさを、「メサ型構造部」の頂面より各辺上下左右10μm程度大きめに形成するのが好ましい。
また、エッチングの深さすなわち、化合物半導体層のうち、どの層までエッチング除去するかは、エッチャントの種類及びエッチング時間によって決まる。
ウェットエッチングを行った後に、レジストを除去する。
ウェットエッチングに用いるエッチャントとしては限定的ではないが、AlGaAs等のAs系の化合物半導体材料に対してはアンモニア系エッチャント(例えば、アンモニア/過酸化水素水混合液)が適しており、AlGaInP等のP系の化合物半導体材料に対してはヨウ素系エッチャント(例えば、ヨウ化カリウム/アンモニア)が適しており、リン酸/過酸化水素水混合液はAlGaAs系に、ブロムメタノール混合液はP系に適している。
また、As系のみで形成されている構造では燐酸混合液、As/P系が混在している構造ではAs系構造部にアンモニア混合液、P系構造部にヨウ素混合液を使用してもよい。
例えば、P系の層のエッチングにはヨウ素系エッチャントを用い、As系のコンタクト層5及び発光層64のエッチングにはアンモニア系エッチャントを用いることが好ましい。
ヨウ素系エッチャントとしては例えば、ヨウ素(I)、ヨウ化カリウム(KI)、純水(H2O)、アンモニア水(NH4OH)を混合したエッチャントを用いることができる。
また、アンモニア系エッチャントとしては例えば、アンモニア/過酸化水素水混合液(NH4OH:H2O2:H2O)を用いることができる。
このエッチングの際、次の層であるAlGaInPからなるクラッド層63aがエッチングストップ層として機能するので、エッチング時間を厳密に管理することは要しないが、例えば、コンタクト層5の厚さを0.05μm程度とすると、10秒程度エッチングを行えばよい。
エッチング速度は、ヨウ素(I)500cc、ヨウ化カリウム(KI)100g、純水(H2O)2000cc、水酸化アンモニア水(NH4OH)90ccの比率で混合されたエッチャントを用いた場合、0.72μm/minだった。
このエッチングの際も、次の層であるAlGaAsからなる発光層64がエッチングストップ層として機能するので、エッチング時間を厳密に管理することは要しないが、このエッチャントの場合、クラッド層63aの厚さが4μm程度とすると、6分間程度エッチングを行えばよい。
このエッチングの際も、次の層であるAlGaInPからなるクラッド層63bがエッチングストップ層として機能するので、エッチング時間を厳密に管理することは要しないが、発光層64の厚さを0.25μm程度とすると、40秒程度エッチングを行えばよい。
このクラッド層63bの下にはGaP層3があるが、GaP層3の下の金属からなる反射層2が露出すると電気特性上好ましくないので、GaP層3まででエッチングを止める必要がある。
例えば、GaP層を3.5μm形成し、その後1μm研磨したとするとGaP層の厚さは2.5μmとなり、クラッド層63bの厚さを0.5μmとすると、上記のヨウ素系エッチャントを用いた場合には、エッチング時間は4分間以下にする必要がある。
次に、全面に保護膜8の材料を成膜する。具体的には、例えば、SiO2を全面にスパッタリング法により成膜する。
次に、全面にフォトレジストを堆積し、フォトリソグラフィによりコンタクト層上の通電窓8bに対応する部分とストリートに対応する部分と、を開口とするレジストパターンを形成する。
次いで、例えば、バッファードフッ酸を用いてウェットエッチングにより、メサ型構造部の頂面の通電窓8bに対応する部分とストリートに対応する部分の保護膜8の材料を除去して保護膜8を形成する。
図14に、保護膜8の通電窓8b近傍の平面図を示す。
その後、レジストを除去する。
次に、おもて面電極膜9を形成する。すなわち、保護膜8上、及び、保護膜8の通電窓8bから露出しているコンタクト層5上に、光射出孔9bを有するおもて面電極膜9を形成する。
具体的には、全面にフォトレジストを堆積し、フォトリソグラフィにより光射出孔9bに対応する部分と、ウェハ基板上の多数の発光ダイオード間の切断部分(ストリート)とを含む、電極膜が不要な部分以外を開口とするレジストパターンを形成する。次いで、電極膜材料を蒸着する。この蒸着だけではメサ型構造部の傾斜側面には電極膜材料が十分には蒸着されない場合は、さらに、メサ型構造部の傾斜側面に電極膜材料を蒸着するために蒸着金属が回りこみやすいプラネタリタイプの蒸着装置を用いて蒸着を行う。
その後、レジストを除去する。
次に、ウェハ基板上の発光ダイオードを個片化する。
具体的には、例えば、ダイシングソーもしくはレーザーにより、ストリート部分を切断してウェハ基板上の発光ダイオード毎に切断して個片化する。
支持基板として金属基板を用いた場合は、個片化された発光ダイオードの切断された金属基板の側面にについて、上面及び下面の金属保護膜の形成条件と同様な条件で金属保護膜を形成してもよい。
以下に、本発明の発光ダイオードは第1の実施形態の実施例によりさらに詳細に説明するが、本発明はこの実施例にのみ限定されるものではない。本実施例では、特性評価のために発光ダイオードチップを基板上に実装した発光ダイオードランプを作製した。
本実施例では、図1及び図4を参照して、通電窓8bの外径R1を166μm、その内径を154μm、光射出孔の径R2を150μm、貫通電極31の外径R5を100μmとした。
GaAs基板は、(100)面から(0-1-1)方向に15°傾けた面を成長面とし、キャリア濃度を2×1018cm-3とした。また、GaAs基板の層厚は、約0.5μmとした。化合物半導体層としては、SiをドープしたGaAsからなるn型の緩衝層62a、Siドープの(Al0.5Ga0.5)0.5In0.5Pからなるエッチングストップ層62b、Siドープしたn型のAl0.3GaAsからなるコンタクト層5、Siをドープした(Al0.7Ga0.3)0.5In0.5Pからなるn型の上部クラッド層63a、Al0.4Ga0.6Asからなる上部ガイド層、Al0.17Ga0.83As/Al0.3Ga0.7Asの対からなる井戸層/バリア層64、Al0.4Ga0.6Asからなる下部ガイド層、Mgをドープした(Al0.7Ga0.3)0.5In0.5Pからなるp型の下部クラッド層63b、(Al0.5Ga0.5)0.5In0.5Pからなる薄膜の中間層、Mgドープしたp型GaP層3である。
また、各層の成長温度としては、p型GaP層は750℃で成長させた。その他の各層では700℃で成長させた。
次に、金属基板1の裏面に、Auを1.2μm、AuBeを0.15μmを順に真空蒸着法によって成膜し、裏面電極40を形成した。
次に、ヨウ素(I)500cc、ヨウ化カリウム(KI)100g、純水(H2O)2000cc、水酸化アンモニア水(NH4OH)90ccの比率で混合されたヨウ素系エッチャントを用いて、45秒間ウェットエッチングを行って、メサ型構造部以外の部分の上部クラッド層63aを除去した。
次に、上記アンモニア/過酸化水素水混合液(NH4OH:H2O2:H2O)を用いて、40秒間ウェットエッチングを行って、メサ型構造部以外の部分の上部ガイド層、発光層64及び下部ガイド層を除去した。
次に、上記ヨウ素系エッチャントを用いて、50秒間ウェットエッチングを行って、メサ型構造部以外の部分の下部クラッド層63bを除去した。
こうしてメサ型構造部を形成した。
その後、レジストパターンを形成後、バッファードフッ酸を用いて、平面視同心円形(外径dout:166μm、内径din:154μm)の開口(図11参照)、および、ストリート部の開口を形成した。
その後、450℃で10分間熱処理を行って合金化し、低抵抗のn型オーミック電極を形成した。
比較例の発光ダイオードは、従来技術である液相エピタキシャル法で形成した。GaAs基板にAl0.2Ga0.8As発光層とするダブルヘテロ構造の発光部を有する発光ダイオードに変更したものである。
2 反射層
3 接合(コンタクト)層
4 活性層
5 コンタクト層
6 平坦部
7 メサ型構造部
7a 傾斜側面
7b 頂面
7ba 周縁領域
8、28 保護膜
8b、28b 通電窓
9、29 電極膜
9b、29b 光射出孔
11 下部クラッド層
12 下部ガイド層
13 発光層
14 上部ガイド層
15 上部クラッド層
16 光漏れ防止膜
20 化合物半導体層
30 透明膜
31、32 貫通電極
40 裏面電極
51c 金属保護膜
61 半導体基板(成長用基板)
63a 上部クラッド層
63b 下部クラッド層
64 発光層
65 レジストパターン
100、200、 発光ダイオード
Claims (17)
- 支持基板上に、金属からなる反射層と、透明膜と、活性層及びコンタクト層を順に含む化合物半導体層とを順に備え、光射出孔から光を外部に射出する発光ダイオードであって、
その上部に平坦部と、傾斜側面及び頂面を有するメサ型構造部とを備え、
前記平坦部及び前記メサ型構造部はそれぞれ、少なくとも一部は保護膜、電極膜によって順に覆われてなり、
前記メサ型構造部は少なくとも前記活性層の一部を含むものであって、前記傾斜側面はウェットエッチングによって形成されてなると共に前記頂面に向かって水平方向の断面積が連続的に小さく形成されてなり、
前記保護膜は、前記平坦部の少なくとも一部と、前記メサ型構造部の前記傾斜側面と、前記メサ型構造部の前記頂面の周縁領域とを覆うとともに、平面視して前記周縁領域の内側であってかつ前記光射出孔の周囲に配置して、前記化合物半導体層の表面の一部を露出する通電窓を有し、
前記電極膜は、前記通電窓から露出された化合物半導体層の表面に直接接触すると共に、前記平坦部上に形成された保護膜の一部を少なくとも覆い、前記メサ型構造部の頂面上に前記光射出孔を有するように形成された連続膜であり、
前記透明膜は、前記反射層と前記化合物半導体層との間に形成され、
前記透明膜内であって平面視して前記光射出孔に重なる範囲内に、前記化合物半導体層及び前記反射層に接触するように、貫通電極が貫設されている、ことを特徴とする発光ダイオード。 - 支持基板上に、金属からなる反射層と、透明膜と、活性層及びコンタクト層を順に含む化合物半導体層とを順に備え、光射出孔から光を外部に取り出す発光ダイオードであって、
その上部に平坦部と、傾斜側面及び頂面を有するメサ型構造部とを備え、
前記平坦部及び前記メサ型構造部はそれぞれ、少なくとも一部は保護膜、電極膜によって順に覆われてなり、
前記メサ型構造部は少なくとも前記活性層の一部を含むものであって、前記傾斜側面はウェットエッチングによって形成されてなると共に前記頂面に向かって水平方向の断面積が連続的に小さく形成されてなり、
前記保護膜は、前記平坦部の少なくとも一部と、前記メサ型構造部の前記傾斜側面と、前記メサ型構造部の前記頂面の周縁領域とを少なくとも覆うとともに、平面視して前記周縁領域の内側であってかつ前記光射出孔の周囲に配置して、前記化合物半導体層の表面の一部を露出する通電窓を有し、
前記電極膜は、前記通電窓から露出された化合物半導体層の表面に直接接触すると共に、前記平坦部上に形成された保護膜の一部を少なくとも覆い、前記メサ型構造部の頂面上に前記光射出孔を有するように形成された連続膜であり、
前記透明膜は、前記反射層と前記化合物半導体層との間に形成され、
前記透明膜内であって平面視して前記通電窓に重なる位置に、前記化合物半導体層及び前記反射層に接触するように、貫通電極が貫設されている、ことを特徴とする発光ダイオード。 - 前記貫通電極が、前記通電窓の外周と前記光射出孔を前記活性層に投影させた図形の外周とを最短距離で各点間を結ぶ線分をそのまま延長することで前記透明膜上に縮小投影される前記光射出孔の縮小投影図形の範囲内に形成されている、ことを特徴とする請求項1に記載の発光ダイオード。
- 前記貫通電極がAuBe、AuZnのいずれかからなることを特徴とする請求項1~3のいずれか一項に記載の発光ダイオード。
- 前記透明膜がSiO2、SiN、SiON、Al2O3、MgF2、TiO2、TiN、ZnO、のいずれかからなることを特徴とする請求項1~3のいずれか一項に記載の発光ダイオード。
- 前記コンタクト層は前記電極膜に接触することを特徴とする請求項1~3のいずれか一項に記載の発光ダイオード。
- 前記メサ型構造部は平面視して矩形であることを特徴とする請求項1~3のいずれか一項に記載の発光ダイオード。
- 前記メサ型構造部の各傾斜側面は前記基板のオリエンテーションフラットに対してオフセットして形成されていることを特徴とする請求項7に記載の発光ダイオード。
- 前記メサ型構造部の高さが3~7μmであって、平面視した前記傾斜側面の幅が0.5~7μmであることを特徴とする請求項1~3のいずれか一項に記載の発光ダイオード。
- 前記光出射孔は平面視して円形又は楕円であることを特徴とする請求項1~3のいずれか一項に記載の発光ダイオード。
- 前記光出射孔の径が50~150μmであることを特徴とする請求項10に記載の発光ダイオード。
- 前記電極膜の前記平坦部上の部分にボンディングワイヤを有することを特徴とする請求項1~3のいずれか一項に記載の発光ダイオード。
- 前記活性層に含まれる発光層が多重量子井戸からなることを特徴とする請求項1~3のいずれか一項に記載の発光ダイオード。
- 前記活性層に含まれる発光層が((AlX1Ga1-X1)Y1In1-Y1P(0≦X1≦1,0<Y1≦1)、(AlX2Ga1-X2)As(0≦X2≦1)、(InX3Ga1-X3)As(0≦X3≦1))のいずれかからなることを特徴とする請求項1~3のいずれか一項に記載の発光ダイオード。
- 支持基板上に、金属からなる反射層と、透明膜と、活性層及びコンタクト層を順に含む化合物半導体層とを順に備え、光射出孔から光を外部に射出する発光ダイオードの製造方法であって、
成長用基板上に、コンタクト層及び活性層を順に含む化合物半導体層を形成する工程と、
前記化合物半導体層上に、透明膜と、該透明膜内であって平面視して形成予定の前記光射出孔に重なる範囲内に、前記化合物半導体層及び前記反射層に接触するように貫設された貫通電極とを形成する工程と、
前記透明膜及び前記貫通電極上に金属からなる反射層を形成する工程と、
前記反射層上に支持基板を接合する工程と、
前記成長用基板を除去する工程と、
前記化合物半導体層をウェットエッチングして、頂面に向かって水平方向の断面積が連続的に小さく形成されてなるメサ型構造部と該メサ型構造部の周囲に配置する平坦部とを形成する工程と、
前記平坦部の少なくとも一部と、前記メサ型構造部の前記傾斜側面と、前記メサ型構造部の前記頂面の周縁領域とを少なくとも覆うとともに、平面視して前記周縁領域の内側であってかつ前記光射出孔の周囲に配置して、前記化合物半導体層の表面の一部を露出する通電窓を有するように、保護膜を形成する工程と、
前記通電窓から露出された化合物半導体層の表面に直接接触すると共に、前記平坦部上に形成された保護膜の一部を少なくとも覆い、前記メサ型構造部の頂面上に前記光射出孔を有するように形成された連続膜である電極膜を形成する工程と、
を有することを特徴とする発光ダイオードの製造方法。 - 支持基板上に、金属からなる反射層と、透明膜と、活性層及びコンタクト層を順に含む化合物半導体層とを順に備え、光射出孔から光を外部に射出する発光ダイオードの製造方法であって、
成長用基板上に、コンタクト層及び活性層を順に含む化合物半導体層を形成する工程と、
前記化合物半導体層上に、透明膜と、該透明膜内であって平面視して形成予定の通電窓に重なる位置に、前記化合物半導体層及び前記反射層に接触するように貫設された貫通電極とを形成する工程と、
前記透明膜及び前記貫通電極上に金属からなる反射層を形成する工程と、
前記反射層上に支持基板を接合する工程と、
前記成長用基板を除去する工程と、
前記化合物半導体層をウェットエッチングして、頂面に向かって水平方向の断面積が連続的に小さく形成されてなるメサ型構造部と該メサ型構造部の周囲に配置する平坦部とを形成する工程と、
前記平坦部の少なくとも一部と、前記メサ型構造部の前記傾斜側面と、前記メサ型構造部の前記頂面の周縁領域とを少なくとも覆うとともに、平面視して前記周縁領域の内側であってかつ前記光射出孔の周囲に配置して、前記化合物半導体層の表面の一部を露出する前記通電窓を有するように、保護膜を形成する工程と、
前記通電窓から露出された化合物半導体層の表面に直接接触すると共に、前記平坦部上に形成された保護膜の一部を少なくとも覆い、前記メサ型構造部の頂面上に前記光射出孔を有するように形成された連続膜である電極膜を形成する工程と、
を有することを特徴とする発光ダイオードの製造方法。 - 前記ウェットエッチングを、リン酸/過酸化水素水混合液、アンモニア/過酸化水素水混合液、ブロムメタノール混合液、ヨウ化カリウム/アンモニアの群から選択される少なくとも1種以上を用いて行うことを特徴とする請求項15又は16のいずれかに記載の発光ダイオードの製造方法。
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SG11201403362RA SG11201403362RA (en) | 2011-12-19 | 2012-12-18 | Light-emitting diode and method of manufacturing the same |
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US14/366,546 US9166110B2 (en) | 2011-12-19 | 2012-12-18 | Light-emitting diode and method of manufacturing the same |
KR1020147018885A KR101589855B1 (ko) | 2011-12-19 | 2012-12-18 | 발광 다이오드 및 그 제조 방법 |
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US20140291612A1 (en) | 2014-10-02 |
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CN103999246A (zh) | 2014-08-20 |
JP2013128072A (ja) | 2013-06-27 |
CN103999246B (zh) | 2017-06-13 |
JP5865695B2 (ja) | 2016-02-17 |
SG11201403362RA (en) | 2014-10-30 |
KR20140108550A (ko) | 2014-09-11 |
US9166110B2 (en) | 2015-10-20 |
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