JPS6298285U - - Google Patents
Info
- Publication number
- JPS6298285U JPS6298285U JP19015685U JP19015685U JPS6298285U JP S6298285 U JPS6298285 U JP S6298285U JP 19015685 U JP19015685 U JP 19015685U JP 19015685 U JP19015685 U JP 19015685U JP S6298285 U JPS6298285 U JP S6298285U
- Authority
- JP
- Japan
- Prior art keywords
- board
- sub
- support frame
- motherboard
- bus line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Combinations Of Printed Boards (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Description
第1図〜第3図はこの考案の一例の斜視図、第
4図〜第7図はその説明のための図である。
10はサブボード、11〜13,22,23は
マウント部品、20はマザーボード、30は支持
枠体である。
FIGS. 1 to 3 are perspective views of an example of this invention, and FIGS. 4 to 7 are illustrations for explaining the same. 10 is a subboard, 11 to 13, 22, and 23 are mounting components, 20 is a motherboard, and 30 is a support frame.
Claims (1)
ードと、支持枠体と、マザーボードとを有し、 上記サブボードは大きさが規格化され、 上記サブボードにはICないしチツプ部品など
がマウントされるとともに、 上記サブボードの側部に、このサブボードに設
けられている素子に接続された端子が設けられ、 上記支持枠体は上記サブボードに対応した大き
さとされるとともに、 上記支持枠体の内壁の所定位置には、バスライ
ンが設けられ、 上記支持枠体が上記マザーボードにマウントさ
れ、 上記支持枠体により上記サブボードの複数個が
多層構造に支持されるとともに、 上記サブボードが上記端子および上記バスライ
ンを通じて上記サブボードないし上記マザーボー
ドに電気的に接続されているプリント基板。[Claims for Utility Model Registration] It has a sub-board formed of a multi-phase through-hole board, a support frame, and a motherboard, the sub-board has a standardized size, and the sub-board has an IC or an IC. Chip parts and the like are mounted, terminals connected to elements provided on the sub-board are provided on the side of the sub-board, and the support frame is sized to correspond to the sub-board. Also, a bus line is provided at a predetermined position on the inner wall of the support frame, the support frame is mounted on the motherboard, the plurality of sub-boards are supported by the support frame in a multilayer structure, and . A printed circuit board, wherein the sub-board is electrically connected to the sub-board or the motherboard through the terminals and the bus line.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19015685U JPH0427195Y2 (en) | 1985-12-10 | 1985-12-10 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19015685U JPH0427195Y2 (en) | 1985-12-10 | 1985-12-10 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6298285U true JPS6298285U (en) | 1987-06-23 |
JPH0427195Y2 JPH0427195Y2 (en) | 1992-06-30 |
Family
ID=31143114
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19015685U Expired JPH0427195Y2 (en) | 1985-12-10 | 1985-12-10 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0427195Y2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006135088A (en) * | 2004-11-05 | 2006-05-25 | Fujitsu Ltd | Module circuit unit and electronic apparatus equipped therewith |
-
1985
- 1985-12-10 JP JP19015685U patent/JPH0427195Y2/ja not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006135088A (en) * | 2004-11-05 | 2006-05-25 | Fujitsu Ltd | Module circuit unit and electronic apparatus equipped therewith |
JP4533093B2 (en) * | 2004-11-05 | 2010-08-25 | 富士通株式会社 | MODULE CIRCUIT UNIT AND ELECTRONIC DEVICE MOUNTING IT |
Also Published As
Publication number | Publication date |
---|---|
JPH0427195Y2 (en) | 1992-06-30 |
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