JPS575432A - Delay time variable type logical gate circuit - Google Patents
Delay time variable type logical gate circuitInfo
- Publication number
- JPS575432A JPS575432A JP8004380A JP8004380A JPS575432A JP S575432 A JPS575432 A JP S575432A JP 8004380 A JP8004380 A JP 8004380A JP 8004380 A JP8004380 A JP 8004380A JP S575432 A JPS575432 A JP S575432A
- Authority
- JP
- Japan
- Prior art keywords
- capacity
- delay time
- changed
- gate circuit
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/28—Modifications for introducing a time delay before switching
- H03K17/284—Modifications for introducing a time delay before switching in field effect transistor switches
Landscapes
- Pulse Circuits (AREA)
- Electronic Switches (AREA)
Abstract
PURPOSE:To accomplish a delay time variable type logical gate circuit which can control the delay time with an applied voltage, by connecting a circuit in series connection of a variable capacity and a fixed capacity having sufficiently greater capacity than the variable capacity, in parallel with an input terminal of a gate. CONSTITUTION:In parallel with an input of a GaAs MESFET21, a circuit in series connection with a variable capacity 31 by Schottkey barrier and a fixed capacitor 32 having sufficiently greater capacitance than the capacity 31 is provided. The potential of common electrodes for the capacity 31 and 32 can be changed at a terminal 33, thus the value of the capacitor 31 can be changed. The delay time of this inverter depends on a current flowing to an FET24, input capacity of an FET21 at the next stage and capacitance of the capacity 31, and the value of the capacitor 31 is changed by changing the potential at the terminal 33 and the propagation delay time of signal can be changed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8004380A JPS575432A (en) | 1980-06-13 | 1980-06-13 | Delay time variable type logical gate circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8004380A JPS575432A (en) | 1980-06-13 | 1980-06-13 | Delay time variable type logical gate circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS575432A true JPS575432A (en) | 1982-01-12 |
Family
ID=13707208
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8004380A Pending JPS575432A (en) | 1980-06-13 | 1980-06-13 | Delay time variable type logical gate circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS575432A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5767719A (en) * | 1993-11-25 | 1998-06-16 | Nec Corporation | Delay circuit using capacitor and transistor |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5220116A (en) * | 1975-08-06 | 1977-02-15 | Brother Ind Ltd | Ribbon vibrating mechanism for typewriter |
| JPS5347254A (en) * | 1976-10-12 | 1978-04-27 | Nec Corp | Generator circuit for delay time properties |
| JPS53114650A (en) * | 1977-03-16 | 1978-10-06 | Fujitsu Ltd | Adjustment of signal pulse width and delay circuit |
-
1980
- 1980-06-13 JP JP8004380A patent/JPS575432A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5220116A (en) * | 1975-08-06 | 1977-02-15 | Brother Ind Ltd | Ribbon vibrating mechanism for typewriter |
| JPS5347254A (en) * | 1976-10-12 | 1978-04-27 | Nec Corp | Generator circuit for delay time properties |
| JPS53114650A (en) * | 1977-03-16 | 1978-10-06 | Fujitsu Ltd | Adjustment of signal pulse width and delay circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5767719A (en) * | 1993-11-25 | 1998-06-16 | Nec Corporation | Delay circuit using capacitor and transistor |
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