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JPH03283644A - Manufacture of lead frame - Google Patents

Manufacture of lead frame

Info

Publication number
JPH03283644A
JPH03283644A JP8538590A JP8538590A JPH03283644A JP H03283644 A JPH03283644 A JP H03283644A JP 8538590 A JP8538590 A JP 8538590A JP 8538590 A JP8538590 A JP 8538590A JP H03283644 A JPH03283644 A JP H03283644A
Authority
JP
Japan
Prior art keywords
lead
resist pattern
forming
lead frame
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8538590A
Other languages
Japanese (ja)
Other versions
JPH0834275B2 (en
Inventor
Katsufusa Fujita
勝房 藤田
Masayuki Higuchi
樋口 正幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsui High Tec Inc
Original Assignee
Mitsui High Tec Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui High Tec Inc filed Critical Mitsui High Tec Inc
Priority to JP2085385A priority Critical patent/JPH0834275B2/en
Publication of JPH03283644A publication Critical patent/JPH03283644A/en
Publication of JPH0834275B2 publication Critical patent/JPH0834275B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To conduct formation of a small thickness part and shape machining simultaneously and thereby to obtain easily a lead frame of high precision and high reliability with a necessary strength maintained, by forming a necessary resist pattern on each of the front and the rear of a metal strip material and by conducting etching from the front and the rear simultaneously. CONSTITUTION:A plating layer of Pd or the like is formed on the surface of a metal strip material M and an area other than the area where a small thickness part is formed is covered with a resist pattern R1, while a resist pattern R2 having an inner lead 12, a dumb bar 13, an outer lead 14, etc., is formed on the rear of the strip material M. When etching is conducted from both the front and the rear simultaneously, the small thickness part for the inner lead 12 and the shapes of the leads are formed simultaneously and a pattern being highly precise and having little undercut can be formed. Thus, a lead frame of high precision and high reliability is prepared easily with a necessary strength maintained.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は、リードフレームの製造方法に係り、特に高密
度のリードフレームの製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing a lead frame, and particularly to a method for manufacturing a high-density lead frame.

(従来の技術) IC,LSIなどの1(導体装置用リードフレームは、
フォトエツチング法またはプレス加工のいずれかの方法
によって、0.25m5あるいは0゜15m5の板厚の
金属条材の不要部分を除去することによって形状加工し
たのち、所定部分にめっきを行うめっき工程、テープを
貼着しインナーリード相互間を固定する固定工程等を経
て形成される。
(Prior art) Lead frames for conductor devices such as ICs and LSIs are
A plating process in which a metal strip with a thickness of 0.25 m5 or 0°15 m5 is shaped by removing unnecessary parts by either photoetching or press processing, and then plating is applied to a predetermined part, using tape. It is formed through a fixing process, etc., in which the inner leads are pasted and fixed between each other.

ところで、半導体装置の高密度化および高集積化に伴い
、チップ面積が増大すると共にリードピン数が増加する
ものの、パッケージは従来通りかもしくは小型化の傾向
にある。
Incidentally, as semiconductor devices become more dense and highly integrated, the chip area and the number of lead pins increase, but packages tend to remain the same as before or become smaller.

従って、同一面積内においてインナーリードの本数が増
加すれば、当然ながらインナーリードの幅および隣接す
るインナーリードとの間隔は狭くなる。このため、強度
の低下によるインナーリドの変形およびその変形による
インナーリード間の短絡等の不良が問題となっている。
Therefore, as the number of inner leads increases within the same area, the width of the inner leads and the distance between adjacent inner leads naturally become narrower. For this reason, problems such as deformation of the inner lead due to a decrease in strength and defects such as short circuits between the inner leads due to the deformation have become a problem.

例えば、プレス加工においては、加−L精度および経済
的な面からリード間隔りと板厚TはD≧Tの関係を持た
せるのが望ましいことがで良く知られている。
For example, in press working, it is well known that it is desirable for lead spacing and plate thickness T to have a relationship of D≧T from the viewpoint of processing accuracy and economy.

しかしながら、近年、半導体装置の高集積化は進む一方
であり、リード間隔が板厚以下となり、さらにリード幅
も微細なものが要求されるようになってきている。この
ように、板厚以下であるようなリード間隔のプレス打ち
抜きに際しては、押さえ面積が狭くなり、抑圧が低トし
てインナーリードおよびアウターリートに捩じれが働き
、残留応力が滞留する。そしてこの傾向は、DOTの関
係とリード幅とが狭くなるとともに増大する。
However, in recent years, as semiconductor devices have become increasingly highly integrated, lead spacing has become smaller than the board thickness, and lead widths have also become smaller. In this way, when press punching is performed with a lead spacing that is less than the plate thickness, the pressing area becomes narrower, the compression is lowered, the inner lead and the outer lead are twisted, and residual stress remains. This tendency increases as the DOT relationship and lead width become narrower.

このように残留応力が残ると後続の熱工程や曲げ工程を
経ると残留応力の影響を受けてリードの変形やより等が
発生し、上述したような強度の低ドののならず、変形か
生じ易く、短絡等の不良が!1゛じ易いという問題かあ
った。
If residual stress remains in this manner, deformation or twisting of the leads will occur due to the influence of the residual stress during the subsequent heating and bending processes, resulting in deformation and deformation instead of the low strength mentioned above. It is easy to cause defects such as short circuit! The problem was that it was easy to use.

一方、エツチングによる加工においては、加工深さの増
大およびリード幅が狭くなると、アンダカット現象の影
響が顕著となり、寸法精度および強度の低下が問題とな
る。この現象は、加工深さと共に増大し、腐蝕係数をF
5深さをD、開孔幅をW1加工幅(リード幅)をWとし
たとき、これらの間に次のような関係がある事が知られ
ている。
On the other hand, in etching processing, as the processing depth increases and the lead width becomes narrower, the influence of the undercut phenomenon becomes more pronounced, resulting in problems of reduced dimensional accuracy and strength. This phenomenon increases with machining depth and increases the corrosion coefficient F
5. When the depth is D, the opening width is W1, and the processing width (lead width) is W, it is known that the following relationship exists between these.

W −w −2D / F この式からも、深さDすなわち板厚を小さくするのが望
ましいことがわかる。しかしながら、板厚を小さくした
場合、機械的強度が小さくなり、枠部で支持も困難とな
る。このため工程間およびJ−程中における搬送や位置
決めに際して基準ビンの挿入、抜き出し等で折れや曲が
り等の損傷が生じ昌くリードフレームの歩留まりや信頼
性を低下させるという問題があった。
W −w −2D / F This equation also shows that it is desirable to reduce the depth D, that is, the plate thickness. However, when the plate thickness is reduced, the mechanical strength is reduced and it becomes difficult to support the frame. For this reason, during transportation and positioning between processes and during the J-process, damage such as bending or bending may occur due to insertion and removal of the reference bin, resulting in a problem of lowering yield and reliability of the lead frame.

そこで、特開昭60−103653号公報に示されてい
るように、インナーリード間をプレス加工【二した後に
コイニングを施して肉薄部を形成し、さらにコイニング
によって生じた余肉を除去して肉薄のインナーリードを
形成する方法も提案されている。
Therefore, as shown in Japanese Patent Application Laid-Open No. 60-103653, the inner leads are press-worked and then coined to form a thin wall part, and the excess wall produced by coining is removed to form a thin wall part. A method of forming an inner lead has also been proposed.

しかしながらこの方法では、コイニングによる製造コス
トの上昇のみならず、コイニングによって生じた残留応
力によるインナーリード先端の変形に起因するリードフ
レームの信頼性及び歩留まり低下並びに残留歪を除去す
るための熱処理を必要とする等の問題がある。
However, this method not only increases manufacturing costs due to coining, but also reduces reliability and yield of the lead frame due to deformation of the inner lead tip due to residual stress caused by coining, and requires heat treatment to remove residual strain. There are problems such as

(発明が解決しようとする課題) このように、半導体装置の高集積化に伴い、リド間隔お
よびリード幅は小さくなる一方であり、加]′、粘度の
向上か大きな問題となっていた。
(Problems to be Solved by the Invention) As described above, with the increasing integration of semiconductor devices, the lead spacing and lead width are becoming smaller and smaller, and the increase in viscosity has become a major problem.

従って、リードフレーム全体の板厚を薄くする必要かあ
る。しかしながら、リードフレーム全体を肉薄にすると
、全体の強度が低下して搬送、取扱いおよび位置決めの
際にリードフレームの変形、11目14か生じ゛1′−
導体装置の信頼性および歩留まり低]パの原因となって
いた。
Therefore, it is necessary to reduce the thickness of the entire lead frame. However, when the entire lead frame is made thinner, the overall strength decreases, resulting in deformation of the lead frame during transportation, handling, and positioning.
This was the cause of low reliability and yield of conductor devices.

本発明は、前記実情に鑑みてなされたもので、リーI・
フレームの所要の強度を維持し、製造が容品て高精度で
かつ信頼性の高いリードフレームをIII!(3%する
ことを[1的とする。
The present invention was made in view of the above-mentioned circumstances, and is based on Lee I.
A lead frame that maintains the required strength of the frame, is easy to manufacture, has high precision, and is highly reliable! (3% is considered [1 target.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) そこで本発明では、金属条材の表面にリードフレームの
パターンを有するレジス:・パターンを形成すると共に
、裏面には肉薄部形成領域に開口をaするレジストパタ
ーンを形成しておき、この状態で両面からエツチングを
行うようにし、肉薄部の形成と、インナーリード、アウ
ターリードなどの形状加工とを同時に行うようにしてい
る。
(Means for Solving the Problems) Therefore, in the present invention, a resist pattern having a lead frame pattern is formed on the surface of a metal strip, and a resist pattern having an opening a in a thin portion forming area is formed on the back surface. In this state, etching is performed from both sides, so that the formation of thin parts and the shaping of inner leads, outer leads, etc. are performed at the same time.

また、肉薄部の形成および形状加工前に、基板表面の少
なくともインナーリードおよびアウターリード形成領域
にPdまたはPd−Ni等のめっきを施し、この後肉薄
部の形成および形状加工をおこなうようにしている。
Furthermore, before forming and shaping the thin portion, at least the inner lead and outer lead formation regions on the substrate surface are plated with Pd or Pd-Ni, and thereafter the thin portion is formed and shaped. .

(作用) 上記構成によれば、両面からのエツチングにより残留応
力のない肉薄部を選択的に形成すると同時に、形状加工
を行うようにしているため、外枠は、肉厚で強固である
一方、寸法精度の厳しいインナーリード部等の領域は肉
薄部からの加工であり、アンダーカットが少なく、高精
度の微細パターンの形成が可能となる。
(Function) According to the above configuration, since thin portions free from residual stress are selectively formed by etching from both sides and shape processing is performed at the same time, the outer frame is thick and strong, while Areas such as inner lead parts that have strict dimensional accuracy are processed starting from the thinner parts, so there are fewer undercuts and it is possible to form fine patterns with high precision.

ここで、肉薄部は外枠等の肉厚部の約172程度の肉厚
を有するように加工される。
Here, the thin wall portion is processed to have a wall thickness of about 172 times the thickness of the thick wall wall portion such as the outer frame.

また、肉薄部は少なくともインナーリード部を含むよう
に形成し、またダムバー、アウターリードをも含むよう
に形成しても良い。
Further, the thin portion is formed to include at least the inner lead portion, and may also be formed to include the dam bar and the outer lead.

また、肉薄部の形成および形状加工前に、基板表面の少
なくともインナーリードおよびアウターリート゛形成領
域にPdまたはPd−Ni等のめっきを施し、形状加工
をおこなうようにすれば、従来のように形状加工後めっ
きを行う必要がないため、インナーリード側面へのめっ
き金属の付着もなく、まためっき工程中のインナーリー
ド先端の麦形を防止することができる。
In addition, if at least the inner lead and outer lead formation areas on the substrate surface are plated with Pd or Pd-Ni before forming and shaping the thin parts, then shaping can be performed as before. Since there is no need to perform post-plating, there is no adhesion of plating metal to the side surfaces of the inner leads, and it is possible to prevent the tips of the inner leads from becoming oval shaped during the plating process.

(実施例) 以下、本発明の実施例について、図面を参照しつつ詳細
に説明する。
(Example) Hereinafter, examples of the present invention will be described in detail with reference to the drawings.

本発明実施例の方法によって形成されるリードフレーム
は、第1図(a)に平面図、第1図(b)にそのA−A
断面図、第2図に斜視図を示す如く、パッケージライン
Pよりも内側を、サポートパー17およびダイパッド1
1を除いて、サイドパーなどの外側領域の肉厚の1/2
程度としたことを特徴とするものである。
A lead frame formed by the method of the embodiment of the present invention is shown in FIG. 1(a) in a plan view and in FIG.
As shown in the cross-sectional view and the perspective view in FIG.
1/2 of the wall thickness of the outer area such as side par, except for 1.
It is characterized by having a degree of

すなわち、ダイパッド11のまわりにインナーリーr:
12が放射状に配列されたパッケージラインPの内側領
域Q1と、ダムバー13、アウターリード14、サイド
パー15.16などの形成された外側領域Q2とから構
成されている。ここでサポートパー17およびダイパッ
ド11は支持を強固にするために肉〃となるように形成
されている。18は支持用のポリイミドテープである。
That is, the inner ly r around the die pad 11:
It consists of an inner region Q1 of package lines P in which package lines P 12 are arranged radially, and an outer region Q2 in which dam bars 13, outer leads 14, side pars 15, 16, etc. are formed. Here, the support pad 17 and the die pad 11 are formed to be solid in order to strengthen the support. 18 is a polyimide tape for support.

次に、このリードフレームの製造方法について説明する
Next, a method for manufacturing this lead frame will be explained.

まず、第3図(a)に示すように、帯条材料M表面にP
dまたはPd−Niめっきを施しめっき層(図示せず)
を形成した後、フォトリソ法を用いて帯条材料M裏面の
インナーリード12形成領域を除く領域をレジストパタ
ーンR1で被覆すると」(に、帯条材料M表面に所望の
形状のインナーリード12、ダムバー13、アウターリ
ード14などを有するレジストパターンR2を形成する
。ここでは、第4図(a)に示すように、帯条材料Mを
巻きだし装置21、間欠送り装Wt22、巻き取り装置
23を用いてレジストパターン形成装置24内を走行せ
しめることによって形成する。
First, as shown in FIG. 3(a), P is applied to the surface of the strip material M.
d or Pd-Ni plating (not shown)
After forming, the area on the back side of the strip material M except for the inner lead 12 forming area is coated with a resist pattern R1 using a photolithography method. 13, form a resist pattern R2 having an outer lead 14, etc. Here, as shown in FIG. The pattern is formed by moving the resist pattern forming device 24 through the resist pattern forming device 24.

そして、第3図(b)に示すように、このレジストパタ
ーンR1,R2をマスクとしてエツチング1ルに浸17
2 L、両面からエツチングし、所望の形状の肉薄のイ
ンナーリード12、ダムバー13、肉厚のアウターリー
ド14などを有するパターンを形成する。ここでも第4
図(b)に示すようにレジストパターンの形成された帯
条材料Mを巻きだし装置21および巻き取り装置23を
用いてエツチング装置&25内を走行仕しめることによ
ってエツチングが連続的に施されるようになっている。
Then, as shown in FIG. 3(b), the resist patterns R1 and R2 are used as masks to immerse the etching layer 17.
2L, etching is performed from both sides to form a pattern having a desired shape including thin inner leads 12, dam bars 13, thick outer leads 14, etc. Again, the fourth
As shown in Figure (b), the strip material M on which the resist pattern has been formed is run through the etching device &25 using the unwinding device 21 and the winding device 23, so that etching is performed continuously. It has become.

そして、リードフレーム支持のためのポリイミドテープ
18を貼着して第1図(a)および第2図に示したリー
ドフレームか完成する(第2図ではポリイミドテープ1
8は省略した)。
Then, a polyimide tape 18 for supporting the lead frame is attached to complete the lead frame shown in FIGS. 1(a) and 2 (in FIG. 2, the polyimide tape 18 is
8 has been omitted).

この方法によれば、条材の両面からエツチングが進行し
肉薄部の形成と形状加工とがエツチングにより同時に行
われるため、アンダーカットが少なく高精度のパターン
形成が可能となる。
According to this method, etching progresses from both sides of the strip, and the formation of the thin portion and the shape processing are performed simultaneously by etching, thereby making it possible to form a highly accurate pattern with fewer undercuts.

また、プレス加工を用いていないため、残留応力がほと
んどなく高精度のパターン形成が可能となる。
Furthermore, since no press processing is used, there is almost no residual stress and highly accurate pattern formation is possible.

このリードフレームは、素子チップの搭載、ワイヤボン
ディング、樹脂封止などの工程を経て半導体素子として
完成されるが、極めて信頼性の高いものとなっている。
This lead frame is completed as a semiconductor element through processes such as mounting an element chip, wire bonding, and resin sealing, and is extremely reliable.

さらに、前記実施例では、レジストパターンの形成前に
、めっきを行うようにしているため、インナーリード側
部全体にわたるめっき金属の付着を防止することができ
るため、寸法精度を良好に維持することができる。また
、銀めっきを形成する場りには、パターン形成後めっき
をおこなうとインナーリード側部にめっき金属が付着し
、1法帖度が低下するのみならず、エレクトロマイグレ
ーシランが発生するが、このようにレジストパターンの
形成前に、めっきを行う方法を用いることにより、この
ような不都合を防止することができ信頼性の極めて高い
リードフレームを得ることが可能となる。しかしながら
、肉薄部および形状加工のためのエツチング工程後、素
子搭載領域をはじめインナーリード先端部に相当する領
域にめっきを行うようにしてもよい。
Furthermore, in the above embodiment, since plating is performed before forming the resist pattern, it is possible to prevent the plating metal from adhering to the entire side of the inner lead, and therefore it is possible to maintain good dimensional accuracy. can. In addition, in areas where silver plating is formed, if plating is performed after pattern formation, the plating metal will adhere to the side of the inner lead, which will not only reduce the 1-pitch level but also generate electromigration silane. By using a method of performing plating before forming a resist pattern, such inconveniences can be prevented and a lead frame with extremely high reliability can be obtained. However, after the etching process for processing the thin portion and shape, plating may be performed on the region corresponding to the tip of the inner lead including the element mounting region.

なお、前記実施例では、インナーリード部のみを肉薄部
としたがアウターリード部等他の領域も肉薄部とするよ
うにしてもよい。
In the above embodiment, only the inner lead portion is made thin, but other regions such as the outer lead portion may also be made thin.

〔発明の効果〕〔Effect of the invention〕

以上説明してきたように、本発明によれば、両面からの
エツチングにより肉薄部の形成と、形状加工とを同時に
行うようにしているため、外枠は、肉厚で強固である一
方、寸法精度の厳しいインナーリード部等の領域は肉薄
部を形成しつつ形状加工を行うようにしているため、ア
ンダーカットが小さく高精度で信頼性の高い微細パター
ンの形成が可能となる。
As explained above, according to the present invention, the formation of the thin wall part and the shape processing are performed simultaneously by etching from both sides, so that the outer frame is thick and strong, while having dimensional accuracy. In areas such as inner lead parts, which have severe conditions, the shape is processed while forming thin parts, so that undercuts are small and it is possible to form highly accurate and reliable fine patterns.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図は本発明実施例のリードフレームを
示す図、第3図(a)乃至第3図(b)は同リードフレ
ームの製造工程を示す図、第4図(a)および第4図e
(b)はそれぞれリードフレームの製造装置を示す図で
ある。 11・・・ダイパッド、12・・・インナーリード、1
3・・・ダムバー 14・・・アウターリード、15.
16・・・サイドパー 17・・・サポートパー 18
・・・ポリイミドテープ、T・・・タイバー、M・・・
帯条材料、21・・・巻きだし装置、22・・・間欠送
り装置、23・・・巻き取り装置、24・・・レジスト
パターン形成装置、25・・・エツチング装置、R1,
R2・・・レジストパターン。 第3図 24 第4図
1 and 2 are diagrams showing a lead frame according to an embodiment of the present invention, FIGS. 3(a) to 3(b) are diagrams showing the manufacturing process of the same lead frame, and FIGS. Figure 4 e
(b) is a diagram showing a lead frame manufacturing apparatus. 11... Die pad, 12... Inner lead, 1
3... Dam bar 14... Outer lead, 15.
16...Side par 17...Support par 18
...Polyimide tape, T...tie bar, M...
Strip material, 21... Unwinding device, 22... Intermittent feeding device, 23... Winding device, 24... Resist pattern forming device, 25... Etching device, R1,
R2...Resist pattern. Figure 3 24 Figure 4

Claims (3)

【特許請求の範囲】[Claims] (1)金属条材表面の所定の領域を残して、表面に選択
的にレジストパターンを形成する第1のレジストパター
ン形成工程と、 前記金属条材裏面に、インナーリード、アウターリード
などのパターンを有する第2のレジストパターンを形成
する第2のレジストパターン形成工程と、 これら第1および第2のレジストパターンをマスクとし
て前記金属条材の表面および裏面から同時にエッチング
を行い、肉薄部を形成すると共に形状加工を行う両面エ
ッチング工程とを含むようにしたことを特徴とするリー
ドフレームの製造方法。
(1) A first resist pattern forming step of selectively forming a resist pattern on the surface of the metal strip, leaving a predetermined area on the surface; and forming patterns such as inner leads and outer leads on the back surface of the metal strip. a second resist pattern forming step of forming a second resist pattern having a second resist pattern; etching simultaneously from the front and back surfaces of the metal strip using the first and second resist patterns as masks to form a thin portion; A method for manufacturing a lead frame, comprising: a double-sided etching step for performing shape processing.
(2)前記第1のレジストパターン形成工程は、インナ
ーリード相当領域に開口を有し、アウターリードは被覆
せしめられるようにレジストパターンを形成する工程で
あることを特徴とする請求項(1)記載のリードフレー
ムの製造方法。
(2) The first resist pattern forming step is a step of forming a resist pattern so as to have an opening in a region corresponding to the inner lead and cover the outer lead. A method for manufacturing lead frames.
(3)第2のレジストパターンの形成に先立ち、第2の
レジストパターンの形成面側の条材表面の少なくともイ
ンナーリードおよびアウターリード形成領域にめっき層
を形成するめっき工程を含むようにしたことを特徴とす
る請求項(1)または請求項(2)記載のリードフレー
ムの製造方法。
(3) Prior to the formation of the second resist pattern, a plating step is included to form a plating layer on at least the inner lead and outer lead forming regions on the surface of the strip on the side where the second resist pattern is formed. A method for manufacturing a lead frame according to claim (1) or claim (2).
JP2085385A 1990-03-30 1990-03-30 Lead frame manufacturing method Expired - Fee Related JPH0834275B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2085385A JPH0834275B2 (en) 1990-03-30 1990-03-30 Lead frame manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2085385A JPH0834275B2 (en) 1990-03-30 1990-03-30 Lead frame manufacturing method

Publications (2)

Publication Number Publication Date
JPH03283644A true JPH03283644A (en) 1991-12-13
JPH0834275B2 JPH0834275B2 (en) 1996-03-29

Family

ID=13857275

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2085385A Expired - Fee Related JPH0834275B2 (en) 1990-03-30 1990-03-30 Lead frame manufacturing method

Country Status (1)

Country Link
JP (1) JPH0834275B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07176669A (en) * 1993-12-17 1995-07-14 Sumitomo Metal Ind Ltd Method for reducing internal stress of thin metal plate for electronic appliance

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6240862A (en) * 1985-08-19 1987-02-21 Canon Inc Electronic displaying and recording device
JPS63265453A (en) * 1987-04-22 1988-11-01 Mitsubishi Electric Corp Manufacture of lead frame for semiconductor use
JPH0245967A (en) * 1988-08-08 1990-02-15 Hitachi Cable Ltd Manufacture of lead frame for semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6240862A (en) * 1985-08-19 1987-02-21 Canon Inc Electronic displaying and recording device
JPS63265453A (en) * 1987-04-22 1988-11-01 Mitsubishi Electric Corp Manufacture of lead frame for semiconductor use
JPH0245967A (en) * 1988-08-08 1990-02-15 Hitachi Cable Ltd Manufacture of lead frame for semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07176669A (en) * 1993-12-17 1995-07-14 Sumitomo Metal Ind Ltd Method for reducing internal stress of thin metal plate for electronic appliance

Also Published As

Publication number Publication date
JPH0834275B2 (en) 1996-03-29

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