JPH02303057A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPH02303057A JPH02303057A JP1123335A JP12333589A JPH02303057A JP H02303057 A JPH02303057 A JP H02303057A JP 1123335 A JP1123335 A JP 1123335A JP 12333589 A JP12333589 A JP 12333589A JP H02303057 A JPH02303057 A JP H02303057A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- pin
- bonding material
- lead
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000463 material Substances 0.000 claims abstract description 31
- 239000004065 semiconductor Substances 0.000 claims abstract description 26
- 239000000725 suspension Substances 0.000 claims abstract description 11
- 239000000853 adhesive Substances 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000009194 climbing Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
- H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Die Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置を製造する際に使用するリードフレ
ームに関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a lead frame used in manufacturing a semiconductor device.
−ａにリードフレームはフレーム枠部と、このフレーム
枠部に宙吊りビンを介して連結され、半導体素子が接合
材を介して搭載されるダイパッド部と、このダイパッド
部の周囲に配置され、半導体素子にワイヤボンディング
されるインナーリード部とから構成されている。従来の
リードフレームにおいては、前記ダイパッド部はワイヤ
ボンディング時に半導体素子の角部に金属細線が接触す
るのを防ぐため、半導体素子接合面がインナーリードの
ボンディング面より下側に位置するようにリードフレー
ムの裏面側に下げて形成されている。-a, the lead frame includes a frame portion, a die pad portion connected to the frame portion via a hanging bottle, on which a semiconductor element is mounted via a bonding material, and a die pad portion arranged around this die pad portion, and a semiconductor element It consists of an inner lead part that is wire-bonded to the inner lead part. In conventional lead frames, the die pad section is placed in the lead frame so that the semiconductor element bonding surface is located below the bonding surface of the inner lead, in order to prevent the thin metal wire from coming into contact with the corner of the semiconductor element during wire bonding. It is formed downward on the back side of the .
上述したようにダイバンド部をインナーリード部より下
側に配置させるには、通常は宙吊りビン部分を曲げ加工
して行われている。また、従来のリードフレームにおけ
る宙吊りビンには、半導体素子搭載用の接合材がダイパ
ッド部から宙吊りビン上に這い上がるのを防止するため
の凹部が形成されていた。この種の従来のリードフレー
ムを第２図（ａ）〜（ｃ）によって説明する。As described above, the die band section is usually placed below the inner lead section by bending the hanging bottle section. Further, the hanging bottle of the conventional lead frame has a recessed portion for preventing the bonding material for mounting the semiconductor element from creeping up from the die pad portion onto the hanging bottle. This type of conventional lead frame will be explained with reference to FIGS. 2(a) to 2(c).
第２図（ａ）は従来のリードフレームのボンディング部
分を拡大して示す平面図、第２図（ｂ）は第２図（ａ）
中■・−■線断面図、第２図（ｃ）は宙吊りと、ンを拡
大して示す平面図である。これらの図において、１は半
導体素子、２はこの半導体素子１が接合材３を介して搭
載されるグイパッド部としての載置部で、この載置部２
は平面視略々方形状に形成され、宙吊りピン４を介して
リードフレームの枠部（図示せず）に連結されている。Figure 2(a) is an enlarged plan view of the bonding part of a conventional lead frame, and Figure 2(b) is the same as Figure 2(a).
Figure 2 (c) is a cross-sectional view taken along the line 2.--2. In these figures, 1 is a semiconductor element, 2 is a mounting part as a Gui pad part on which this semiconductor element 1 is mounted via a bonding material 3, and this mounting part 2
is formed into a substantially rectangular shape in plan view, and is connected to a frame portion (not shown) of a lead frame via a hanging pin 4.
５はインナーリードで、このインナーリード５の基部は
前記宙吊りピン４と同様にしてリードフレームの枠部に
一体的に連結されており、かつその先端部は前記載置部
２の側部と対応するようにダイスパッドｌの周囲に複数
並設されている。６は前記半導体素子ｌの電極（図示せ
ず）とリードフレームとを電気的に接続するための結線
材である。７は半導体素子ｌを載置部２上に搭載するた
めの接合材３が宙吊りビン４上を這い上がるのを防ぐた
めの凹部で、この凹部７は、宙吊りピン４にハーフエツ
チングを施すことによって形成されており、宙吊りピン
４における結線材６とのボンディング部より載置部２側
に配設されている。Reference numeral 5 denotes an inner lead, and the base of the inner lead 5 is integrally connected to the frame of the lead frame in the same way as the hanging pin 4, and the tip thereof corresponds to the side of the mounting part 2. A plurality of them are arranged in parallel around the die pad l so that the die pads l are arranged in parallel. Reference numeral 6 denotes a connecting member for electrically connecting the electrode (not shown) of the semiconductor element 1 and the lead frame. Reference numeral 7 denotes a recessed portion for preventing the bonding material 3 for mounting the semiconductor device l onto the mounting portion 2 from creeping up on the hanging pin 4. This recessed portion 7 is formed by half-etching the hanging pin 4. It is disposed closer to the mounting portion 2 than the bonding portion of the hanging pin 4 with the wire connection material 6.
このように構成された従来のリードフレームを製造する
には、先ず、載置部２．宙吊りピン４゜インナーリード
５等を所定形状をもって枠部に一体に形成し、宙吊りピ
ン４に凹部７を形成する。To manufacture the conventional lead frame configured in this way, first, the mounting section 2. A hanging pin 4°, an inner lead 5, etc. are integrally formed in a frame part with a predetermined shape, and a recess 7 is formed in the hanging pin 4.
次いで、第２図（ｂ）に示す、ように、載置部２がイン
ナーリード５に対して下側に配置されるように宙吊りピ
ン４に曲げ加工を施して製造工程が終了される。そして
、上述したようにして製造されたリードフレームに半導
体素子１を搭載するには、先ず、載置部２上に接合材３
を塗布し、この接合材３を介して！１装部２上に半導体
素子１を接合させる。この際、半導体素子１の側方に溢
れた接合材３は宙吊りピン４上を這い上がろうとするが
、宙吊りピン４のワイヤボンディング部分にまで達する
前に凹部７内に入り、この凹部７内に溜められることに
なる。すなわち、このリードフレームにおいては、前記
凹部７によって、接合材３がそれ以上這い上がるのを防
止することができる。しかる後、結線材６によってワイ
ヤボンディングして半導体素子１の電極と各インナーリ
ード５．宙吊りビン４等と−を接続する。このようにし
てボンディング工程が終了される。Next, as shown in FIG. 2(b), the hanging pin 4 is bent so that the mounting portion 2 is disposed below the inner lead 5, and the manufacturing process is completed. In order to mount the semiconductor element 1 on the lead frame manufactured as described above, first, a bonding material 3 is placed on the mounting portion 2.
Apply and use this bonding material 3! A semiconductor element 1 is bonded onto a mounting portion 2. At this time, the bonding material 3 overflowing to the sides of the semiconductor element 1 tries to climb up on the hanging pin 4, but before it reaches the wire bonding part of the hanging pin 4, it enters the recess 7 and inside this recess 7. It will be stored in. That is, in this lead frame, the recess 7 can prevent the bonding material 3 from creeping up any further. Thereafter, the electrodes of the semiconductor element 1 and each inner lead 5 are connected by wire bonding using the connecting material 6. Connect hanging bottle 4 etc. and -. In this way, the bonding process is completed.
しかるに、このように構成された従来のリードフレーム
においては、凹部７の開口幅を大きく設定する程接合材
３の這い上がりを確実に阻止することができるが、この
凹部７の開口幅１１が宙吊りピン４の幅寸法Ｌ１に近づ
くにつれ宙吊りピン４の強度が低下されてしまう、この
ため、宙吊りピン４に凹部７が形成されたリードフレー
ムにおいては、宙吊りピン４が曲げ加工時に凹部７の形
成された部分から破断され易くなるという問題があった
。However, in the conventional lead frame configured in this way, the larger the opening width of the recess 7 is set, the more securely it is possible to prevent the bonding material 3 from creeping up. As the width dimension L1 of the pin 4 approaches, the strength of the suspended pin 4 decreases. Therefore, in a lead frame in which the suspended pin 4 has a recess 7 formed therein, the recess 7 is formed when the suspended pin 4 is bent. There was a problem in that it was more likely to break at the lower part.
本発明に係るリードフレームは、グイパッド部における
吊りリードとの連結部近傍に接合材排除用透孔を穿設し
たものである。The lead frame according to the present invention has a through hole for removing bonding material in the vicinity of the connection part with the suspension lead in the goo pad part.
グイバンド部に半導体素子を搭載する際に半導体素子の
側方に溢れ出ようとする余分な接合材は、吊りリード側
に流れる前に接合材排除用透孔内に排除されることにな
る。Excess bonding material that tends to overflow to the sides of the semiconductor device when the semiconductor device is mounted on the guide band portion is removed into the bonding material removal through hole before flowing to the suspension lead side.
以下、本発明の一実施例を第１図（ａ）〜第１図（ｃ）
によって詳細に説明す、る。An embodiment of the present invention will be described below as shown in FIGS. 1(a) to 1(c).
Explained in detail by.
第１図（ａ）は本発明に係るリードフレームのボンディ
ング部分を拡大して示す平面図、第１図（ｂ）は第１図
（ａ）中１−１線断面図、第１図（ｃ）は本発明に係る
リードフレームの要部を拡大して示す平面図である。こ
れらの図において前記第２図（ａ）〜（ｃ）で説明した
ものと同一もしくは同等部材については同一符号を付し
、ここにおいて詳細な説明は省略する。これらの図にお
いて、１１は接合材３の宙吊りピン４への這い上がりを
防止するための接合材排除用透孔としてのスルーホール
で、このスルーホール１１は載置部２における宙吊りピ
ン４との連結部近傍に穿設されている。また、前記スル
ーホール１１の開口幅寸法１２は第１図（Ｃ）に示すよ
うに、宙吊りピン４の幅寸法Ｌｌより大きくなるように
設定されている。FIG. 1(a) is an enlarged plan view showing the bonding part of the lead frame according to the present invention, FIG. 1(b) is a sectional view taken along line 1-1 in FIG. 1(a), and FIG. ) is a plan view showing an enlarged main part of the lead frame according to the present invention. In these figures, the same or equivalent members as those explained in FIGS. 2(a) to 2(c) are designated by the same reference numerals, and detailed explanation thereof will be omitted here. In these figures, reference numeral 11 denotes a through hole for removing the bonding material 3 to prevent the bonding material 3 from creeping up onto the hanging pin 4. It is drilled near the connecting part. Further, the opening width dimension 12 of the through hole 11 is set to be larger than the width dimension Ll of the hanging pin 4, as shown in FIG. 1(C).
このようにスルーホール１１が穿設されたリードフレー
ムに半導体素子１を搭載するには、従来と同様にして半
導体素子１を接合材３を介して載置部２上に接合させて
行われる。半導体素子１を載置部２に接合する際にはス
ルーホール１１内に接合材３が流れ込むことになり、こ
れによって接合材３が半導体素子１の何方に拡がろうと
する勢いを緩和することができ、余分な接合材３はこの
スルーホール１１を介してポンディング部分外に排除さ
れることになる。In order to mount the semiconductor element 1 on the lead frame in which the through-hole 11 is formed in this manner, the semiconductor element 1 is bonded onto the mounting portion 2 via the bonding material 3 in the same manner as in the prior art. When bonding the semiconductor element 1 to the mounting portion 2, the bonding material 3 flows into the through hole 11, thereby reducing the force of the bonding material 3 spreading in any direction of the semiconductor element 1. The excess bonding material 3 is removed from the bonding portion through the through hole 11.
したがって、余分な接合材３が半導体素子１の側方から
溢れ出て宙吊りビン４に這い上がるのを阻止することが
できるから、本発明に係るリードフレームにおいては、
宙吊りビン４の強度を低下させることなく充分な強度を
もった状態でその曲げ加工を実施することができる。Therefore, the excess bonding material 3 can be prevented from overflowing from the sides of the semiconductor element 1 and climbing up into the hanging bottle 4, so in the lead frame according to the present invention,
The bending process can be carried out while maintaining sufficient strength without reducing the strength of the suspended bottle 4.
なお、本実施例ではスルーホール１１を載置部２におけ
る宙吊りビン４との連結部分に一つずつ配設した例を示
したが、本発明はこのような限定にとられれることなく
、スルーホールを複数並設してもよい。Although this embodiment shows an example in which the through-holes 11 are provided one by one at the connecting portions of the loading section 2 to the hanging bottles 4, the present invention is not limited to such limitations; A plurality of holes may be arranged in parallel.
以上説明したように本発明によれば、ダイパッド部にお
ける吊りリードとの連結部近傍に接合材排除用透孔を穿
設したため１、ダイパッド部に半導体素子を搭載する際
に半導体素子の側方に溢れ出ようとする余分な接合材は
、吊りリード側に流れる前に接合材排除用透孔内に排除
されることになる。このため、余分な接合材が吊りリー
ド上に這い上がるのを吊りリードに凹部を設けずに阻止
することができるから、吊りリードの強度を低下させる
ことなく充分な強度をもった状態でその曲げ加工を実施
することができる。したがって、本発明のリードフレー
ムにおいては、吊りリードが破断されるのを確実に防止
することができるから、信頼性を向上させることができ
る。また、接合材排除用透孔はエツチング、あるいはプ
レス等によって容易に形成することができるので、エツ
チングフレームからパンチングフレームへの切換えを容
易に行なうこともできるという効果もある。As explained above, according to the present invention, since the through hole for removing the bonding material is formed in the vicinity of the connection part with the hanging lead in the die pad part, 1. when mounting the semiconductor element on the die pad part, The excess bonding material that is about to overflow is removed into the bonding material removal through hole before flowing to the hanging lead side. Therefore, it is possible to prevent excess bonding material from creeping up onto the suspension lead without creating a recess in the suspension lead, so the suspension lead can be bent while maintaining sufficient strength without reducing its strength. Processing can be carried out. Therefore, in the lead frame of the present invention, it is possible to reliably prevent the suspension lead from being broken, and thus reliability can be improved. Furthermore, since the through holes for removing the bonding material can be easily formed by etching, pressing, etc., there is also the effect that it is possible to easily switch from an etching frame to a punching frame.
ｔＪ４１ 図（ａ）は本発明に係るリードフレームのボ
ンディング部分を拡大して示す平面図、第１図（ｂ）は
第１図（ａ）中１−Ｉ線断面図、第１図（ｃ）は本発明
に係るリードフレームの要部を拡大して示す平面図、第
２図（ａ）は従来のリードフレームのボンディング部分
を拡大して示す平面図、第２図（ｂ）は第２図（ａ）中
ｎ−ｎ線断面図、第２図（ｃ）は宙吊りビンを拡大して
示す平面図である。
ｌ・・・・半導体素子、２・・・・載置部、３・・・・
接合材、４・・・・宙吊りビン、５・・・・インナーリ
ード、１１・・・・スルーホール。tJ41 Figure (a) is an enlarged plan view showing the bonding part of the lead frame according to the present invention, Figure 1 (b) is a sectional view taken along line 1-I in Figure 1 (a), Figure 1 (c) 2(a) is an enlarged plan view showing the main part of the lead frame according to the present invention, FIG. 2(a) is an enlarged plan view showing the bonding part of the conventional lead frame, and FIG. (a) is a sectional view taken along the line nn in the middle, and FIG. 2(c) is an enlarged plan view showing the hanging bottle. l... Semiconductor element, 2... Mounting section, 3...
Bonding material, 4... Hanging bottle, 5... Inner lead, 11... Through hole.
Claims (1)
半導体素子が接合材を介して接合される半導体素子搭載
用ダイパッド部がリードフレーム本体の裏面側に突出さ
れてなるリードフレームにおいて、前記ダイパッド部に
おける吊りリードとの連結部近傍に接合材排除用透孔を
穿設したことを特徴とするリードフレーム。In a lead frame in which a die pad for mounting a semiconductor element, which is connected to a lead frame body via a suspension lead and to which a semiconductor element is bonded via a bonding material, protrudes from the back side of the lead frame body, A lead frame characterized in that a through hole for removing bonding material is formed near a connection part with a lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1123335A JP2504187B2 (en) | 1989-05-17 | 1989-05-17 | Lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1123335A JP2504187B2 (en) | 1989-05-17 | 1989-05-17 | Lead frame |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02303057A true JPH02303057A (en) | 1990-12-17 |
| JP2504187B2 JP2504187B2 (en) | 1996-06-05 |
Family
ID=14858014
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1123335A Expired - Lifetime JP2504187B2 (en) | 1989-05-17 | 1989-05-17 | Lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2504187B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0817995A (en) * | 1994-06-27 | 1996-01-19 | Nec Corp | Semiconductor device lead frame |
| WO1998031051A1 (en) * | 1997-01-14 | 1998-07-16 | Hitachi, Ltd. | Semiconductor device and method for manufacturing the same |
| US5844779A (en) * | 1995-04-27 | 1998-12-01 | Lg Semicon Co., Ltd. | Semiconductor package, and semiconductor device using the same |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6080262A (en) * | 1983-10-07 | 1985-05-08 | Nec Corp | Semiconductor device |
-
1989
- 1989-05-17 JP JP1123335A patent/JP2504187B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6080262A (en) * | 1983-10-07 | 1985-05-08 | Nec Corp | Semiconductor device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0817995A (en) * | 1994-06-27 | 1996-01-19 | Nec Corp | Semiconductor device lead frame |
| US5844779A (en) * | 1995-04-27 | 1998-12-01 | Lg Semicon Co., Ltd. | Semiconductor package, and semiconductor device using the same |
| WO1998031051A1 (en) * | 1997-01-14 | 1998-07-16 | Hitachi, Ltd. | Semiconductor device and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2504187B2 (en) | 1996-06-05 |
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