JPH0110928Y2 - - Google Patents
Info
- Publication number
- JPH0110928Y2 JPH0110928Y2 JP1982014817U JP1481782U JPH0110928Y2 JP H0110928 Y2 JPH0110928 Y2 JP H0110928Y2 JP 1982014817 U JP1982014817 U JP 1982014817U JP 1481782 U JP1481782 U JP 1481782U JP H0110928 Y2 JPH0110928 Y2 JP H0110928Y2
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- block
- bonding block
- solder
- wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 claims description 6
- 239000004020 conductor Substances 0.000 claims description 5
- 229910000679 solder Inorganic materials 0.000 description 10
- 229910052782 aluminium Inorganic materials 0.000 description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 8
- 239000011248 coating agent Substances 0.000 description 5
- 238000000576 coating method Methods 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 238000005253 cladding Methods 0.000 description 2
- 238000004040 coloring Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 1
- 230000001680 brushing effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 229910000833 kovar Inorganic materials 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000011179 visual inspection Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
Description
【考案の詳細な説明】
本考案は、例えば混成集積回路における厚膜導
体と回路部品との接続をワイヤボンデイングで行
う場合にボンデイング強度を向上するため一方の
面を導体面にろう付し、対向する面をワイヤボン
デイングに使用するボンデイングブロツクに関す
る。[Detailed description of the invention] The present invention is designed to improve the bonding strength when connecting a thick film conductor and circuit components in a hybrid integrated circuit by wire bonding. This invention relates to a bonding block whose surface is used for wire bonding.
この種のボンデイングブロツクとしては、鉄ブ
ロツクの一方の面にワイヤボンデイングが可能な
被覆、例えばニツケルめつきあるいはアルミニウ
ムクラツドを施し、他方の面にろう被覆、例えば
予備はんだあるいははんだクラツドを施したもの
が用いられる。ボンデイングブロツクは他の回路
部品と共に厚膜回路を備えた基板上に自動搭載が
行われるが、自動搭載の場合ブロツクの表裏を判
別し、ろう被覆を有する面を下側にして導体上に
搭載する必要がある。例えばアルミニウム面ある
いはニツケル面とはんだ面との判別は目視によつ
ても困難であり、自動搭載に利用することは難し
い。ブロツク表裏の形状に差を付ける方法もある
が、ブロツクの加工が面倒である。 This type of bonding block consists of a steel block with a wire bondable coating on one side, such as nickel plating or aluminum cladding, and a solder coating on the other side, such as pre-solder or solder cladding. is used. The bonding block is automatically mounted along with other circuit components on a board with a thick film circuit, but in the case of automatic mounting, the front and back sides of the block are determined and the block is mounted on the conductor with the side with the solder coating facing down. There is a need. For example, it is difficult to distinguish between an aluminum surface or a nickel surface and a solder surface even by visual inspection, and it is difficult to use it for automatic mounting. There is a method of creating a difference in the shape of the front and back sides of the block, but processing the blocks is troublesome.
本考案はこれに対して簡単に表裏が判別でき、
容易に自動搭載の可能なボンデイングブロツクを
提供することを目的とする。 In contrast, the present invention allows you to easily distinguish between the front and back sides.
The purpose of the present invention is to provide a bonding block that can be easily and automatically mounted.
この目的はボンデイングブロツクの一方の面に
後の工程に支障を与えない着色が施されることに
よつて達成される。 This objective is achieved by applying a color to one side of the bonding block that does not interfere with subsequent processing.
以下図を引用して本考案の実施例について説明
する。第１図において鉄あるいはシリコンにより
近い膨脹係数を有するコバールからなる金属ブロ
ツク１はアルミニウム層２が重ねられている。さ
らに金属ブロツクの他側の面には予備はんだ層３
が被覆されている。このはんだ層３の上に本考案
によりアルミニウム面と色調によつて判別でき
る、例えば黒色の着色膜４が設けられている。第
２図は別の実施例で、この場合は着色膜４はアル
ミニウム層２の上に施され、はんだ面と判別でき
るようにされている。着色膜４は後の工程のはん
だ付け、ワイヤボンデイングなどに支障を与えな
いことが必要である。一般に着色膜の上へのはん
だ付け、ワイヤボンデイングは困難なことが多い
ので、着色膜４がはんだ付けの際のフラツクスに
溶けて流れ去るか、あるいはボンデイングブロツ
クの搭載後に溶剤により容易に除去できるもので
あることが望ましい。そのようなものとして、例
えば捺印用インクが使用できる。着色は両面に必
要な被覆を設けた板材からブロツクを打抜く前に
行うのがよく、はけ塗り、スプレーなどの方法が
適用できる。この場合必ずしも全面に施さなくて
も表裏の判別は可能であり、従つてワイヤボンデ
イングされる面を着色するときに後の工程で使用
されるボンデイング部を残して着色を施こせば着
色膜除去の必要がない。 Embodiments of the present invention will be described below with reference to the drawings. In FIG. 1, a metal block 1 made of Kovar, which has an expansion coefficient closer to that of iron or silicon, is overlaid with an aluminum layer 2. Furthermore, a preliminary solder layer 3 is formed on the other side of the metal block.
is covered. On this solder layer 3, a colored film 4 of, for example, black, which can be distinguished from the aluminum surface by its color tone, is provided according to the present invention. FIG. 2 shows another embodiment, in which a colored film 4 is applied on the aluminum layer 2 so that it can be distinguished from the solder surface. It is necessary that the colored film 4 does not interfere with subsequent steps such as soldering and wire bonding. Generally, soldering and wire bonding on colored films are often difficult, so the colored film 4 should either dissolve in the flux during soldering and flow away, or be easily removed with a solvent after mounting the bonding block. It is desirable that As such, for example, a marking ink can be used. Coloring is best done before punching out the block from a board with the necessary coating on both sides, and methods such as brushing or spraying can be applied. In this case, it is possible to distinguish between the front and back sides without necessarily coating the entire surface, and therefore, when coloring the surface to be wire bonded, it is possible to remove the colored film by leaving the bonding area to be used in a later process. There's no need.
第３図はこのようなボンデイングブロツクの搭
載の状態を示し、セラミツク基板１１に印刷焼成
された配線導体１２の上に半導体チツプ１３と共
にボンデイングブロツク１０を、適当なセンサを
用いて着色膜を識別して自動搭載し、加熱により
はんだ層３により同一工程でチツプ１３と同様に
導体１２にろう付けし、チツプ１３の電極１４と
ブロツクのアルミニウム層２との間をワイヤボン
デイングによりアルミニウム線１５で接続する。 FIG. 3 shows the mounting state of such a bonding block, in which the bonding block 10 is mounted together with a semiconductor chip 13 on a wiring conductor 12 printed and fired on a ceramic substrate 11, and a colored film is identified using an appropriate sensor. The conductor 12 is automatically mounted using the solder layer 3 by heating in the same process as the chip 13, and the electrode 14 of the chip 13 and the aluminum layer 2 of the block are connected with the aluminum wire 15 by wire bonding. .
以上述べたように本考案によるボンデイングブ
ロツクは、一方の面に後の工程に支障を与えない
着色を施すことによつて表裏の判別を容易にした
もので、これによりボンデイングブロツクの自動
搭載を確実に実施できるばかりでなく、目視によ
る判別も簡単であり、混成集積回路等の組立て極
めて有効に使用できる。 As mentioned above, the bonding block according to the present invention is made easy to distinguish between the front and the back by applying a color to one side that does not interfere with subsequent processes, thereby ensuring automatic mounting of the bonding block. Not only can this be implemented, but it is also easy to visually distinguish, and it can be used extremely effectively in assembling hybrid integrated circuits and the like.
第１図は本考案の一実施例の断面図、第２図は
別の実施例の断面図、第３図はその使用状態を示
す断面図である。
１……金属ブロツク、２……アルミニウム層、
３……はんだ層、４……着色膜、１０……ボンデ
イングブロツク。
FIG. 1 is a sectional view of one embodiment of the present invention, FIG. 2 is a sectional view of another embodiment, and FIG. 3 is a sectional view showing its use. 1...metal block, 2...aluminum layer,
3...Solder layer, 4...Colored film, 10...Bonding block.
Claims (1)
ろう付し、対向する面を回路部品とのワイヤボン
デイングに使用するボンデイングブロツクにおい
て、前記ボンデイングブロツクの一方の面に後の
工程の前あるいは工程中に除去が可能な着色が施
されたことを特徴とするボンデイングブロツク。 In a bonding block in which one side is brazed to the thick film conductor surface in a hybrid integrated circuit and the opposite side is used for wire bonding with circuit components, one side of the bonding block is coated before or during the subsequent process. A bonding block characterized by having a removable color applied to it.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1481782U JPS58118739U (en) | 1982-02-05 | 1982-02-05 | bonding block |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1481782U JPS58118739U (en) | 1982-02-05 | 1982-02-05 | bonding block |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58118739U JPS58118739U (en) | 1983-08-13 |
| JPH0110928Y2 true JPH0110928Y2 (en) | 1989-03-29 |
Family
ID=30027271
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1481782U Granted JPS58118739U (en) | 1982-02-05 | 1982-02-05 | bonding block |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58118739U (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0722168B2 (en) * | 1986-05-21 | 1995-03-08 | 株式会社日立製作所 | Hybrid IC |
| JPH0513011Y2 (en) * | 1987-08-13 | 1993-04-06 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4420211Y1 (en) * | 1967-02-17 | 1969-08-29 |
-
1982
- 1982-02-05 JP JP1481782U patent/JPS58118739U/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4420211Y1 (en) * | 1967-02-17 | 1969-08-29 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58118739U (en) | 1983-08-13 |
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