JPH05175247A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the generation of a closed cavity when viahole structure is formed, and prevent a metal film from blistering at the time of heating in the later process. CONSTITUTION:The title method consists of the following; a process for forming a metal film 5 on one main surface of a semiconductor substrate 1, a process for alloying the semiconductor substrate 1 with the metal film 5 by heat treatment, a process for forming a through hole 7 in which the metal film 5 is exposed, by selectively etching the semiconductor substrate 1 from the other main surface, and a process for filling the through hole 7 with metal 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device such as a power amplification FET using GaAs,
In particular, the present invention relates to a method of forming a through electrode in which a through hole called a via hole is filled with metal.

[0002]

2. Description of the Related Art FETs for power amplification, particularly those using GaAs or the like having a relatively low thermal conductivity, are used to improve heat dissipation efficiency and reduce parasitic conductance at high frequencies.
Connection electrodes such as a source pad are connected to a heat sink or the like through a metal filling a via hole.

FIG. 2 shows a method of forming such a conventional via hole structure. On the surface of the GaAs substrate 21,
A source electrode 22, a drain electrode, and a gate electrode are formed, and a source pad electrode 23 is formed as a connection electrode so as to be connected to the source electrode 22. After that, selective etching is performed from the back surface of the GaAs substrate 21 to form a via hole 24 reaching the source pad electrode 23 (FIG. 9A). Inside the via hole 24 and GaA
The underlying metal film 2 is formed on the back surface of the substrate 21 by sputtering.
7 is formed. Next, electroplating is performed on the underlying metal film 27 to fill the via holes 24 with the metal 28 (FIG. 7B). After dividing into chips, heat and Au
Die-bonded to the heat sink of the package with eutectic solder such as Sn.

[0004]

Conventionally, when a via hole reaching the source pad electrode is formed by selective etching from the back surface of the substrate, abnormal etching progresses at the boundary with the source pad electrode at the bottom of the via hole, as shown in FIG. The reverse taper portion 25 shown in (a) is likely to occur. Therefore, when a metal film is formed in the via hole by electroplating after forming a base metal film by sputtering, a closed cavity 26 as shown in FIG. At this time, the cavity 26 may be thermally expanded and the portion of the source pad electrode in contact with the via hole may be expanded. When such a swollen portion is generated, there is a problem that a defective appearance is likely to occur, and further an electrical or thermal defect is likely to occur.

Therefore, it is an object of the present invention to provide a method of manufacturing a semiconductor device which prevents the formation of closed cavities when forming a via hole structure and prevents the metal film from bulging during subsequent heating.

[0006]

In order to solve the above problems, the present invention provides: (a) a step of forming a metal film on one main surface of a semiconductor substrate; (b) heat treating the semiconductor substrate to form the metal film. Alloying with a film, (c) selectively etching the semiconductor substrate from another main surface to form a through hole through which the metal film is exposed, (d) filling the through hole with a metal The point is to have a process.

It is desirable to use Ti, Au, Pt or the like for the metal film.

The selective etching etches only the semiconductor substrate, not the metal film.

All electrodes forming a semiconductor device are formed on one main surface of a semiconductor substrate, and the metal film is connected to at least one of the electrodes.

[0010]

In the above structure, the heat treatment causes a reaction at the interface between the metal film and the semiconductor substrate, or mutual diffusion, so that the interface is alloyed and the adhesion between the metal film and the semiconductor substrate is enhanced. As a result, when the through hole is formed by the selective etching of the semiconductor substrate, the etching liquid does not soak into the interface between the metal film and the semiconductor substrate and the etching rate at this portion does not become abnormally high. The occurrence of reverse taper is suppressed. Therefore, the through hole is filled with metal without forming a closed cavity, and the metal film is prevented from bulging during heating in the subsequent die bonding process or the like.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG.

This embodiment is an FE using a GaAs substrate.
It is applied to the manufacturing method of T.

In the following description, (a)-
Each item symbol of (c) corresponds to each of (a) to (c) of FIG.

(A) On the surface of the GaAs substrate 1, a source electrode 2 and a drain electrode 3 which are in ohmic contact and a gate electrode 4 which is in Schottky contact are formed. A metal film 5 made of Ti is formed to a thickness of about 400 nm in a portion where a via hole (through hole) is formed. A source pad electrode 6 that connects the metal film 5 and the source electrode 2 is formed on these electrodes. Then, heat treatment is performed at a temperature of 300 to 450 ° C. to alloy the interface between the metal film 5 and the GaAs substrate 1. Since the temperature of the heat treatment for alloying is almost the same as the temperature of the heat treatment for forming the ohmic electrodes (AuGe / Ni) of the source electrode 2 and the drain electrode 3, both heat treatments may be performed simultaneously.

(B) The back surface of the substrate is ground by a well-known technique to make the entire thickness to a required thickness, and then a resist mask having an opening only in the via hole forming portion is formed on the back surface of the GaAs substrate 1. The GaAs substrate 1 is etched by selective etching using an H ₃ PO ₄ + H ₂ O ₂ system etching solution to form a via hole 7 in which the lower surface of the metal film 5 is exposed.

(C) Inside via hole 7 and GaAs substrate 1
Ti / Au is formed as a base metal film 8 on the back surface of the substrate by sputtering. Then, the underlying metal film 8 is electroplated to fill the via holes 7 with the metal 9. Au is suitable as the metal 9 for filling. After that, it is divided into individual chips, heated, and die-bonded to the heat sink portion 11 of the package with the eutectic solder 10 such as Au—Sn.

As the metal film 5, in addition to Ti, P
It is also possible to use t, Au, or the like. However, AuGe alloy cannot be used. This is because the above etching solution has no selectivity between GaAs and AuGe,
This is because when s is etched, Ge is also etched at the same time.

As described above, according to the semiconductor device manufacturing method of this embodiment, the metal film 5 made of Ti is formed in the via hole forming portion on the surface of the GaAs substrate 1, and the metal film 5 and the semiconductor are heat-treated. Since the interface portion of the substrate 1 is alloyed to increase the adhesion between the metal film 5 and the GaAs substrate 1, the metal film 5 and the GaAs substrate 1 are selectively etched by wet etching to form the via hole 7. It is possible to prevent the etching solution from penetrating into the interface with the substrate 1 and to prevent the etching rate at this portion from becoming abnormally high, and to suppress the occurrence of the inverse taper portion. Therefore, the via hole 7 can be filled with the metal 9 without forming a closed cavity, and swelling occurs in the portion of the source pad electrode 6 in contact with the via hole 7 during heating in the subsequent die bonding process. Disappears.

[0019]

As described above, according to the present invention,
Since the metal film is formed in the portion where the through hole is formed on the one main surface of the semiconductor substrate and the metal film and the semiconductor substrate are alloyed by heat treatment, the adhesive force between the metal film and the semiconductor substrate is increased, and the semiconductor substrate When the through holes are formed by selective etching of the reverse taper portion, the etching solution does not soak into the interface between the metal film and the semiconductor substrate, and the etching rate at this portion does not become abnormally high. Can be suppressed. Therefore, there is an advantage that the metal can be filled without forming a closed cavity in the through hole, and the metal film is prevented from bulging during heating in the subsequent die bonding process or the like.

[Brief description of drawings]

FIG. 1 is a process chart for explaining an embodiment of a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a process drawing showing a conventional method for forming a via hole structure.

[Explanation of symbols]

 1 GaAs substrate (semiconductor substrate) 2 source electrode 5 metal film 6 source pad electrode 7 via hole (through hole) 8 underlying metal film 9 metal

Claims (1)

[Claims] 1. (a) a step of forming a metal film on one main surface of a semiconductor substrate, (b) a step of heat-treating the semiconductor substrate to alloy it with the metal film, (c) another semiconductor substrate A method for manufacturing a semiconductor device, comprising: a step of selectively etching from the main surface of the above step to form a through hole through which the metal film is exposed; and (d) a step of filling the through hole with a metal.