JPH01166556A - N-type gaas ohmic electrode and formation thereof - Google Patents

Abstract

PURPOSE:To reduce a specific contact resistance by laminating an In layer or an In layer containing group IV or VI element, a Ge layer containing group V element, a high melting point metal or the like layer on an N-type GaAs layer, and heat treating it at a predetermined temperature. CONSTITUTION:An N-type GaAs layer 11 is continuously covered with an In layer or an alloy layer 12 of In or group IV or VI element and the In, a Ge layer 13 containing group V element, and a high melting point metal or its silicide or nitride layer 14, and heat treated at a temperature above the melting point of the In and below the melting point of the Ge for a short time. The layer 12 is alloyed with the N-type GaAs of the boundary by the heat treatment, and the InGaAs alloy having smaller forbidden band width than that of the GaAs is precipitated. Part of the layer 13 is melted in the InGaAs layer to become a high doner impurity concentration N<+> type lnGaAs layer 15, the In is partly melted in the layer 13 to form an N<+> type Ge layer, thereby forming a preferably ohmic electrode.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an ohmic electrode for n-type GaAs, which has particularly low contact resistance, good flatness, and can be easily connected to AQ (aluminum)-based wiring. This invention relates to a connectable electrode structure.

[Conventional technology]

Conventional budding electrodes include: - A u /Ni inside the vessel;
/AuGe (gold/nickel/gold-germanium alloy) was used. For example, Solid State Electronics, Vol. 25, 1982.

Pages 1063-1065 (Solid 5tateEl
electronics, Vofi, 25. p p 106
3-1065 (1982))
1. Nathan and Ordehai Heibl
rAn Improved AuGe0h+ by um
*ic Contact Ton-CaAsJ.

That is, GaAs MESFET (Metal-3em
iconductorField Effect Tr
In a GaAs semiconductor device such as A. Heat treated at temperature. Through this heat treatment, GaAs and AuGe are alloyed, and a high concentration of Ge is contained in the recrystallized GaAs during the cooling process. In this way, a layer containing a large amount of Ge donor impurities is formed at the electrode-semiconductor interface, resulting in ohmic properties.

However, heat treatment often creates irregularities on the electrode surface, impairing its flatness. Also, after electrode formation, 40
If there is a step of applying heat treatment at 0° C. or higher, the alloying reaction proceeds excessively, resulting in deterioration of flatness and contact specific resistance. Furthermore, when AQ is used for the gate electrode of an FET, especially when interconnection between the gate electrode and Au-based source/drain electrodes, which are ohmic electrodes, is required, such as in an integrated circuit.

There was a reliability problem due to the well-known alloy reaction (purple break) of AQ-Au.

[Problem that the invention seeks to solve]

In the above conventional technology, in the case of ohmic electrodes using Au alloys such as AuGe, thermal deterioration of ohmic properties,
There were problems with poor flatness and difficulty in interconnecting with AQ wiring.

The purpose of the present invention is to eliminate the drawbacks of the above-mentioned prior art, provide low welding resistance, good electrode flatness, easy interconnection with AQ, and an n-type that is easy to apply in device manufacturing. An object of the present invention is to provide a GaAs ohmic electrode.

[Means for solving problems]

The above purpose is to form an n-type GaAs layer 1 as shown in FIG.
1, as a first layer 12, a group Ⅰ or group Ⅰ element which becomes a donor impurity for In or Ga As.

That is, an alloy of Go, Si, Sn, Te, Ss, S and In is used as the second layer 13, and Ge and donor impurities P, As,
An alloy with Sb is used as the third layer 14 using a high melting point metal such as Ti, Mo, W, Ta, Hf, etc., or a silicide or nitride thereof such as Mo5ii.

Continuously deposit WSiz, TiN, etc. Deposition methods include vacuum evaporation, cluster ion beam evaporation, sputter evaporation, and the like, and a combination of these is actually used. When this multilayer film is heat-treated for a short time at a temperature higher than the melting point of In, for example, for a period of 1 second to 100 seconds, a good ohmic electrode with excellent flatness and low contact resistivity is formed.

Although the case where the electrode is formed on n-type GaAs has been described so far, it goes without saying that the same action and effect can be obtained even if the electrode is formed on n-type GaAs.

[Effect]

This electrode was formed after the first to third layers were successively deposited.

The performance is achieved through heat treatment, and the function of each layer will be described below with reference to FIG. The In layer of the first layer 12 is alloyed with n-type GaAs at the interface by heat treatment, and the In layer has a smaller forbidden band width than GaAs.
Deposit aAs alloy. This InGaAs layer includes a Ge alloy layer of the second layer 13, for example, Ge-P*
Since a part of the G e A a * G e S b alloy melts, the n-type I n G with a high donor impurity concentration
This becomes the aAs layer 15. Further, in the InM of the first layer 12, a 1v group element or a group 2 element, for example, Si.

When Ge, Sn, Te, Ss, and S are contained, these also become donor impurities and form n-type I n Ga
In the second layer 13, an alloy layer of Ge and group Ⅰ elements, which is useful for forming the As layer 15, a portion of In dissolves and becomes an acceptor impurity in the Ge layer.

Compensated with As or sb, an n+ type Ge layer is formed. The third layer 14 high melting point metal layer prevents ball-up due to heat treatment, maintains flatness, and plays a role as a metal conduction layer. Examples of high melting point metals include Ti, Mo, W,
Ta, Hf, etc. are used.

Also, these silicides Ti5ii and Mo5iz.

A similar effect can be obtained by using WS iz, Ta S it, Hf S is, etc., or a nitride layer of TiN, MoN, WN, TaN, HfN, etc.

The heat treatment is carried out in an atmosphere of an inert gas such as hydrogen, nitrogen or argon.

The temperature range is such that the In or In alloy layer of the first layer 11 is G
At least the melting point of Ge is used so that the high melting point metal of the third layer 14 or their silicides and nitrides do not melt while alloying with a As.

The heat treatment is carried out for a short time of about 1 second to 100 seconds to prevent alloying from reaching the third layer.

To summarize the above, on n-type GaAs 11, Ga
n + I n G a A with a smaller forbidden band width than As
An s layer 15 and an n+Ge layer 16 are formed to provide a good ohmic electrode. Also, since no Au alloy layer is used,
Connection with Al-based wiring materials is also easy, and high reliability can be obtained.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

Example 1 This will be explained using FIG.

(1) N-type GaAg 31 on semi-insulating GaAs substrate 30
(Carrier concentration 3×1057cs-”, Si doped) tn+n-type GaAg31 carrier concentration 2×10”c
A wafer on which these layers are epitaxially grown is prepared.A wafer on which these layers are formed by ion implantation into this allogenic insulating GaAs substrate may also be used. SiO
x film was deposited and holes were opened in the regions where the source and drain electrodes (ohmic electrodes) were to be formed using conventional photolithography techniques (FIG. 1(a)).

(2) On the wafer, 100 layers of 34In first layer were crushed and 350 layers of 35Ge-8b alloy second layer were deposited on the wafer at room temperature by cluster ion deposition or vacuum deposition. At this time, binary vapor deposition was used, and the composition ratio was 3:1. Finally, the 3rd W36Ti was applied to 1,500 people (Fig. 1(b)).
).

(3) Forming the pattern of the source/drain electrode 37 using photolithography technology and Ge-8b
Dry etching using CF4 gas was used to remove unnecessary parts of the alloy, and wet etching using dilute hydrochloric acid was used to remove the In layer (FIG. 1(C)).

Next, heat treatment is performed at 600° C. to 750° C. for 1 second to 5 seconds, during which time the In layer is melted and an InGaAs alloy layer 38 is formed. At this time, the contact specific resistance was 2×10″″6Ω-d, and the unevenness of the electrode was 50 Å or less, which was good.

(4) A hole is formed in the gate electrode part of the insulating film 14 using lithography technology, and then an n+ type Ga As layer and an n type G layer are formed.
GaAs is etched away to a partial depth of the aAs layer (FIG. 1(d)).

After vacuum evaporating AQ/Ti to a thickness of 8,000 to 1,500, a gate electrode 39 is formed by a lift-off method. At this time, it is possible to simultaneously form bonding pads for the source and drain electrodes using AQ/Ti.

The above is an example of a GaAs MESFBT using the present invention, but it can also be used for other GaAs integrated circuits.

Example 2 In Example 1 (2), when 100 In-Te alloys (composition ratio 95:5 at%) are used for the first layer 34, the contact specific resistance is 6×10''1! lΩ-d was obtained, and a better ohmic electrode was formed than when using In alone.

〔Effect of the invention〕

According to the present invention, the contact specific resistance of the ohmic electrode is 10-B.
A small value of ~10''6 Ω-d is obtained.

In addition, the flatness of the electrode is better than the conventional A u / Ni / A u Ge electrode at 50 Å or less. Furthermore, since the electrode does not use an Au alloy, highly reliable connection with Al-based wiring materials is possible, which is particularly advantageous for wiring between the AQ gate electrode and source/drain electrodes of a GaAs integrated circuit.

Further, although the present invention has been described with respect to n-type GaAs, similar effects can be obtained with crystal materials such as n-type GaAjlAs and n-type GaAsP.

[Brief explanation of the drawing]

Fig. 1 is a cross-sectional view of an ohmic electrode according to the present invention, Fig. 2 is a cross-sectional view of an ohmic electrode according to a conventional method, and Fig. 3 is a cross-sectional view of the manufacturing process of a GaAs MESFET using the ohmic conductivity forming method of the present invention. It is. 11.31-n-type GaAs, 12.34...first layer. In layer containing InM or group II or group III elements, 1
3.35...Second layer, Ge layer containing group (■) element, 1
4.36...Third layer, high melting point metal layer or its silicide layer, nitride layer, 15,38...n÷ type InGaAs
[, 20, 30... Semi-insulating Ga As, 22.
...Ge film, 23...metal film, 21, 32...n medium-sized Ga As layer, 33...insulating film, 37...source/drain electrode, 39...gate electrode w4° Bud +1
! 1 bud, 3 Figure C Hisa)

Claims (1)

[Claims] 1. At least a group IV element or V
An n-type GaAs ohmic electrode characterized in that an InGaAs polycrystalline alloy layer containing a group I element and a Ge layer containing a group V element are sequentially laminated. 2. In the n-type GaAs ohmic electrode according to claim 1, the group IV element or group VI element is Ge,
n-type GaAs that is Si, Sn or Te, Be, S
Ohmic electrode. 3. In the n-type GaAs electrode according to claim 1, the group V element is an n-type GaAs electrode such as P, As, or Sb.
aAs ohmic electrode. 4. On the n-type GaAs layer, the first layer is an In layer or an In layer containing a group IV element or a group VI element, the second layer is a Ge (germanium) layer containing a group V element, and the third layer is an In layer containing a group IV element or a group VI element.
After laminating at least a high melting point metal layer or its silicide layer or nitride layer as a layer,
1. A method for forming an n-type GaAs ohmic electrode, the method comprising the step of heat treatment at a temperature below the melting point of .