JPH04320301A - Critical temperature resistor and its manufacture - Google Patents
Critical temperature resistor and its manufactureInfo
- Publication number
- JPH04320301A JPH04320301A JP3088345A JP8834591A JPH04320301A JP H04320301 A JPH04320301 A JP H04320301A JP 3088345 A JP3088345 A JP 3088345A JP 8834591 A JP8834591 A JP 8834591A JP H04320301 A JPH04320301 A JP H04320301A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor ceramic
- ceramic plates
- sudden change
- internal electrode
- thermistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 31
- 239000000919 ceramic Substances 0.000 claims abstract description 30
- 239000011347 resin Substances 0.000 claims description 15
- 229920005989 resin Polymers 0.000 claims description 15
- 239000011800 void material Substances 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 238000010030 laminating Methods 0.000 abstract description 3
- 238000003475 lamination Methods 0.000 abstract description 3
- 238000009413 insulation Methods 0.000 abstract 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 8
- 229910052799 carbon Inorganic materials 0.000 description 8
- 238000000034 method Methods 0.000 description 6
- 238000001816 cooling Methods 0.000 description 4
- 239000000203 mixture Substances 0.000 description 3
- 229910052788 barium Inorganic materials 0.000 description 2
- 239000011324 bead Substances 0.000 description 2
- 238000004898 kneading Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 238000010791 quenching Methods 0.000 description 2
- 230000000171 quenching effect Effects 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 239000002966 varnish Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000004793 Polystyrene Substances 0.000 description 1
- XTXRWKRVRITETP-UHFFFAOYSA-N Vinyl acetate Chemical compound CC(=O)OC=C XTXRWKRVRITETP-UHFFFAOYSA-N 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 229910052791 calcium Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 239000002270 dispersing agent Substances 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000005470 impregnation Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 229910052746 lanthanum Inorganic materials 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000011812 mixed powder Substances 0.000 description 1
- 239000004014 plasticizer Substances 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 238000010298 pulverizing process Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 229910052712 strontium Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 238000009849 vacuum degassing Methods 0.000 description 1
Landscapes
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Thermistors And Varistors (AREA)
- Ceramic Capacitors (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】この発明は、ある温度で急激に電
気抵抗が変化する急変サーミスタおよびその製造方法に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a rapid change thermistor whose electrical resistance changes rapidly at a certain temperature, and a method for manufacturing the same.
【0002】0002
【従来の技術】急変サーミスタ(CTR)は、ある温度
域で温度上昇に伴って電気抵抗が急激に低下する半導体
素子である。現在実用化されている急変サーミスタはV
O2 を基本組成としており、VO2 の結晶構造が7
0℃付近で半導体←→金属の転移を利用したものである
。2. Description of the Related Art A rapid change thermistor (CTR) is a semiconductor element whose electrical resistance rapidly decreases as the temperature rises within a certain temperature range. The sudden change thermistor currently in practical use is V
The basic composition is O2, and the crystal structure of VO2 is 7
It utilizes the semiconductor←→metal transition at around 0°C.
【0003】通常、急変サーミスタはV2 O5 にB
,Si,P,Mg,Ca,Sr,Ba,La,Pbなど
の酸化物の1〜2種を混合し、還元性雰囲気中で800
〜900℃で熱処理してから粉砕し、ビード形に形成し
た後、1000℃の還元性雰囲気中で焼成し、その後急
冷することにより製造されている。[0003] Normally, a sudden change thermistor has a voltage of V2 O5
, Si, P, Mg, Ca, Sr, Ba, La, Pb, etc. are mixed, and 800%
It is manufactured by heat treating at ~900°C, pulverizing, forming into a bead shape, firing in a reducing atmosphere at 1000°C, and then rapidly cooling.
【0004】0004
【発明が解決しようとする課題】従来の急変サーミスタ
は、その急変抵抗特性が製造工程に大きく依存しており
、良好な急変特性を得るためにはきめ細かな製造条件を
設定する必要があった。[Problems to be Solved by the Invention] In the conventional sudden change thermistors, the sudden change resistance characteristics are largely dependent on the manufacturing process, and it is necessary to set detailed manufacturing conditions in order to obtain good sudden change characteristics.
【0005】特に急冷工程は、還元性雰囲気処理工程と
同様に最も急変特性に影響を与える工程であり、良好な
特性を得るためには900℃以上で急冷処理しなければ
ならない。このため、均質に冷却しにくいディスク型な
ど大型の急変サーミスタでは良好な急変特性を得るのが
困難であり、ビード型や薄膜型などの小型の素子が主流
となっている。しかしこのような小型の素子では許容電
流値が数十mA以下と限られており、さらに使用域にお
ける抵抗値の選択自由度も低い。このため、例えば突入
電流抑制素子用途など幅広い需要に応えていくことがで
きなかった。[0005] In particular, the quenching step, like the reducing atmosphere treatment step, is the step that most affects the rapid change characteristics, and in order to obtain good characteristics, the quenching step must be performed at 900° C. or higher. For this reason, it is difficult to obtain good sudden change characteristics with large sudden change thermistors such as disk types that are difficult to cool uniformly, and small elements such as bead types and thin film types have become mainstream. However, in such a small device, the allowable current value is limited to several tens of mA or less, and furthermore, the degree of freedom in selecting the resistance value in the usage range is low. For this reason, it has not been possible to meet a wide range of demands, such as for use as inrush current suppressing elements.
【0006】この発明の目的は、許容電流値が高く、し
かも抵抗値の選択自由度の高い急変サーミスタおよびそ
の製造方法を提供することにある。An object of the present invention is to provide a sudden change thermistor that has a high allowable current value and a high degree of freedom in selecting resistance values, and a method for manufacturing the same.
【0007】[0007]
【課題を解決するための手段】許容電流値を高めるため
には素子全体を大型化してしかも急冷処理を確実に行わ
なければならない。発明者等は薄層セラミック板を急冷
処理してそれぞれ急変サーミスタ特性を有する複数の半
導体セラミック板を構成し、これらを積層化することに
よって上記欠点のない急変サーミスタが得られることを
見出した。[Means for Solving the Problems] In order to increase the allowable current value, it is necessary to increase the size of the entire device and to perform the rapid cooling process reliably. The inventors have discovered that by rapidly cooling thin-layer ceramic plates to form a plurality of semiconductor ceramic plates each having sudden change thermistor characteristics, and by laminating these plates, a sudden change thermistor without the above-mentioned drawbacks can be obtained.
【0008】この発明の急変サーミスタは、急変サーミ
スタ特性を有する複数の半導体セラミック板の積層体か
らなり、複数の半導体セラミック板間の電気的接続部に
内部電極層を、電気的絶縁部に絶縁性樹脂層をそれぞれ
形成し、積層体の端面に上記内部電極層を共通接続する
外部電極を形成したことを特徴とする。The rapid change thermistor of the present invention is composed of a laminate of a plurality of semiconductor ceramic plates having sudden change thermistor characteristics, and has an internal electrode layer at the electrical connection portion between the plurality of semiconductor ceramic plates, and an insulating layer at the electrically insulating portion. The present invention is characterized in that resin layers are respectively formed, and external electrodes that commonly connect the internal electrode layers are formed on the end faces of the laminate.
【0009】また、この発明の急変サーミスタの製造方
法は、急変サーミスタ特性を有する複数の半導体セラミ
ック板を内部電極層を介して積層し、内部電極層形成領
域外に空隙層を形成し、この空隙層に絶縁性樹脂を注入
し、硬化させた後、積層体の端面に上記内部電極を共通
接続する外部電極を形成することを特徴とする。[0009] Furthermore, in the method of manufacturing a sudden change thermistor of the present invention, a plurality of semiconductor ceramic plates having sudden change thermistor characteristics are laminated with internal electrode layers interposed therebetween, a gap layer is formed outside the area where the internal electrode layer is formed, and the gap is The method is characterized in that, after injecting an insulating resin into the layer and curing it, external electrodes that commonly connect the internal electrodes are formed on the end faces of the laminate.
【0010】0010
【作用】この発明の急変サーミスタは、急変サーミスタ
特性を有する複数の半導体セラミック板の積層体からな
り、複数の半導体セラミック板間の電気的接続部に内部
電極層、電気的絶縁部に絶縁性樹脂層がそれぞれ形成さ
れ、積層体の端面に内部電極層を共通接続する外部電極
が形成されている。この構造により、急変サーミスタ特
性を有する複数の半導体セラミック板が内部電極層およ
び樹脂層を介して積層一体化されるとともに、内部電極
および外部電極を介して電気的に接続される。このよう
に急変サーミスタ特性を有する複数の半導体セラミック
板を積層したことにより、全体の容量が大きくなり許容
電流値が高まる。また、半導体セラミック板の厚さやそ
の積層枚数などによって広範囲にわたって所望の抵抗値
が得られる。[Operation] The sudden change thermistor of the present invention is composed of a laminate of a plurality of semiconductor ceramic plates having sudden change thermistor characteristics, and includes an internal electrode layer at the electrical connection part between the plurality of semiconductor ceramic plates, and an insulating resin at the electrically insulating part. The layers are formed respectively, and external electrodes that commonly connect the internal electrode layers are formed on the end faces of the laminate. With this structure, a plurality of semiconductor ceramic plates having abruptly changing thermistor characteristics are laminated and integrated via an internal electrode layer and a resin layer, and are electrically connected via an internal electrode and an external electrode. By stacking a plurality of semiconductor ceramic plates having abruptly changing thermistor characteristics in this way, the overall capacitance increases and the allowable current value increases. Further, a desired resistance value can be obtained over a wide range depending on the thickness of the semiconductor ceramic plate, the number of layers thereof, etc.
【0011】また、この発明の急変サーミスタの製造方
法では、急変サーミスタ特性を有する複数の半導体セラ
ミック板が内部電極層を介して積層され、内部電極形成
領域外に空隙層が形成された後、その空隙層に絶縁性樹
脂が注入される。そして、積層体の端面に内部電極を共
通接続する外部電極が形成される。このことによりそれ
ぞれ急変サーミスタ特性を有する複数の半導体セラミッ
ク板間に内部電極層と絶縁性樹脂層とが介在した急変サ
ーミスタが得られる。Further, in the method for manufacturing a sudden change thermistor of the present invention, a plurality of semiconductor ceramic plates having sudden change thermistor characteristics are laminated with internal electrode layers interposed therebetween, and a void layer is formed outside the internal electrode formation area. Insulating resin is injected into the void layer. Then, external electrodes that commonly connect the internal electrodes are formed on the end faces of the laminate. As a result, a sudden change thermistor is obtained in which an internal electrode layer and an insulating resin layer are interposed between a plurality of semiconductor ceramic plates each having sudden change thermistor characteristics.
【0012】なお、内部電極形成領域外に予め例えばカ
ーボンペーストなどのように焼付けによって消失する材
料を導電ペーストとともに形成することによって、半導
体セラミック板の積層焼付け時に内部電極形成領域外に
空隙層を形成することができる。また、その空隙層に対
して真空脱気および加圧含浸によって絶縁性樹脂を注入
することができる。[0012] By previously forming a material such as carbon paste that disappears by baking together with a conductive paste outside the internal electrode forming area, a void layer can be formed outside the internal electrode forming area during lamination baking of semiconductor ceramic plates. can do. Further, an insulating resin can be injected into the void layer by vacuum degassing and pressure impregnation.
【0013】[0013]
【実施例】この発明の実施例である急変サーミスタおよ
びその製造方法について製造工程順に説明する。EXAMPLES A sudden change thermistor and a method for manufacturing the same, which are examples of the present invention, will be explained in the order of manufacturing steps.
【0014】先ず、V2 O5 ,P2 O5 ,Ba
Oを目的とする量だけ秤量し、均一に混合する。この混
合粉を加熱溶融してガラス状にした後、還元性雰囲気で
熱処理して粉砕し、原料粉末を作成する。この原料粉末
に酢酸ビニル系バインダ、分散剤および可塑材を加え、
ドクターブレード法でグリーンシートを作成する。First, V2 O5, P2 O5, Ba
Weigh the desired amount of O and mix evenly. This mixed powder is heated and melted into a glassy state, and then heat-treated in a reducing atmosphere and pulverized to create a raw material powder. Add vinyl acetate binder, dispersant and plasticizer to this raw powder,
Create a green sheet using the doctor blade method.
【0015】上記グリーンシートを50.0×20.0
mmサイズにカットした後、シート厚みが0.3mmに
なるように積み重ね熱圧着を行う。そして、積み重ねた
圧着シートを7.0×6.3mmにカットする。[0015] The above green sheet is 50.0×20.0
After cutting the sheets into mm size, they are stacked and thermocompressed so that the sheet thickness is 0.3 mm. Then, the stacked pressure-bonded sheets were cut into a size of 7.0 x 6.3 mm.
【0016】カットした圧着シートを1000℃で5分
間焼成した後、炉中から取り出して急冷する。これによ
り、VO2 とPおよびBaの酸化物とが複合した急変
サーミスタ特性を有する半導体セラミック板を得る。After the cut pressure-bonded sheet is fired at 1000° C. for 5 minutes, it is taken out of the furnace and rapidly cooled. As a result, a semiconductor ceramic plate having a rapidly changing thermistor characteristic composed of VO2 and oxides of P and Ba is obtained.
【0017】次に、半導体セラミック板に電極層形成用
の導電ペーストと空隙層形成用のカーボンペーストをそ
れぞれ印刷する。図1は導電ペーストとカーボンペース
トをそれぞれ印刷した半導体セラミック板の積層前の状
態を示す斜視図である。図1において1a〜1eはそれ
ぞれ急変サーミスタ特性を有する半導体セラミック板、
2a〜2dは導電ペースト、3a〜3dはカーボンペー
ストである。ここで導電ペーストとしては、Ag、オー
ミック成分、ワニス、フリットおよび溶剤を混練してペ
ースト状にしたものを用いる。また、カーボンペースト
としては、カーボン粉末、ワニスおよび溶剤を混練して
ペースト状にしたものを用いる。Next, a conductive paste for forming an electrode layer and a carbon paste for forming a gap layer are respectively printed on the semiconductor ceramic plate. FIG. 1 is a perspective view showing a state before lamination of semiconductor ceramic plates each printed with a conductive paste and a carbon paste. In FIG. 1, 1a to 1e are semiconductor ceramic plates having abruptly changing thermistor characteristics, respectively;
2a to 2d are conductive pastes, and 3a to 3d are carbon pastes. Here, as the conductive paste, a paste obtained by kneading Ag, an ohmic component, a varnish, a frit, and a solvent is used. Further, as the carbon paste, a paste obtained by kneading carbon powder, varnish, and a solvent is used.
【0018】このように導電ペーストおよびカーボンペ
ーストを印刷した半導体セラミック板を図2のように積
層する。その後、焼付けを行って2a〜2dをそれぞれ
Ag電極層とする。一方、3a〜3dのカーボンペース
トを焼付けによって燃焼消失させ、図3のように空隙層
とする。The semiconductor ceramic plates printed with the conductive paste and carbon paste are stacked as shown in FIG. 2. Thereafter, baking is performed to form Ag electrode layers 2a to 2d, respectively. On the other hand, the carbon pastes 3a to 3d are burnt out by baking to form a void layer as shown in FIG.
【0019】次に、ポリスチレン系またはエポキシ系な
どの樹脂溶液に積層体を浸漬し、真空脱気して加圧含浸
させる。その後、樹脂含浸させた積層体を加熱乾燥また
は自然乾燥させて樹脂を硬化させる。その後、余分な樹
脂を除去して図4に示すように樹脂層4a〜4dを形成
する。Next, the laminate is immersed in a polystyrene-based or epoxy-based resin solution, vacuum degassed, and impregnated under pressure. Thereafter, the resin-impregnated laminate is heated or air-dried to harden the resin. Thereafter, excess resin is removed to form resin layers 4a to 4d as shown in FIG.
【0020】その後、図5および図6に示すように、積
層体の両端部に外部電極5,5を形成して内部電極2a
〜2dとの電気的接合をとる。Thereafter, as shown in FIGS. 5 and 6, external electrodes 5, 5 are formed at both ends of the laminate, and internal electrodes 2a are formed.
Make an electrical connection with ~2d.
【0021】なお、図1〜図5では説明上半導体セラミ
ック板の層数を少なく表したが、急変サーミスタ特性を
有する半導体セラミック板を50層として寸法が5.8
×5.0×15.0mmの急変サーミスタを作成し、そ
の特性を測定したところ、抵抗値が0.1kΩで電流許
容値が1Aであった。Note that in FIGS. 1 to 5, the number of layers of the semiconductor ceramic plate is shown to be small for the sake of explanation, but assuming that 50 layers of the semiconductor ceramic plate have abruptly changing thermistor characteristics, the size is 5.8.
When a sudden change thermistor of 5.0 x 15.0 mm was prepared and its characteristics were measured, the resistance value was 0.1 kΩ and the allowable current value was 1 A.
【0022】[0022]
【発明の効果】この発明によれば、急変サーミスタを構
成する積層体のうち各半導体セラミック板は小型の薄板
状であるため、容易に急冷処理を行うことができ、良好
な急変サーミスタ特性が得られる。そして、この急変サ
ーミスタ特性を有する半導体セラミック板を多数積層化
したことにより、全体の容量が大きくなり、許容電流値
の高い急変サーミスタが得られる。また、半導体セラミ
ック板の組成を変えることなく、各半導体セラミック板
の寸法および積層数によって抵抗値を広範囲にわたって
設定できるようになる。このため、例えば突入電流抑制
素子などにも適用できるようになる。[Effects of the Invention] According to the present invention, since each semiconductor ceramic plate in the laminate forming the sudden change thermistor is in the form of a small thin plate, rapid cooling treatment can be easily performed, and good sudden change thermistor characteristics can be obtained. It will be done. By laminating a large number of semiconductor ceramic plates having this sudden change thermistor characteristic, the overall capacitance is increased and a sudden change thermistor with a high allowable current value can be obtained. Moreover, the resistance value can be set over a wide range by changing the dimensions and number of laminated layers of each semiconductor ceramic plate without changing the composition of the semiconductor ceramic plate. Therefore, it can be applied to, for example, an inrush current suppressing element.
【0023】[0023]
【図1】急変サーミスタの製造途中の状態を示す斜視図
である。FIG. 1 is a perspective view showing a state in the middle of manufacturing a sudden change thermistor.
【図2】焼付け前の積層体の断面図である。FIG. 2 is a cross-sectional view of the laminate before baking.
【図3】焼付け後の積層体の断面図である。FIG. 3 is a cross-sectional view of the laminate after baking.
【図4】樹脂注入後の積層体の断面図である。FIG. 4 is a cross-sectional view of the laminate after resin injection.
【図5】外部電極形成後の断面図である。FIG. 5 is a cross-sectional view after forming external electrodes.
【図6】完成した急変サーミスタの斜視図である。FIG. 6 is a perspective view of a completed sudden change thermistor.
1a〜1e−半導体セラミック板
2a〜2d−導電ペーストおよび焼付け後の内部電極3
a〜3d−カーボンペースト
4a〜4d−絶縁性樹脂層
5−外部電極1a to 1e - Semiconductor ceramic plates 2a to 2d - Conductive paste and internal electrodes 3 after baking
a to 3d - Carbon paste 4a to 4d - Insulating resin layer 5 - External electrode
Claims (2)
導体セラミック板の積層体からなり、複数の半導体セラ
ミック板間の電気的接続部に内部電極層を、電気的絶縁
部に絶縁性樹脂層をそれぞれ形成し、積層体の端面に上
記内部電極層を共通接続する外部電極を形成したことを
特徴とする急変サーミスタ。Claim 1: Consisting of a laminate of a plurality of semiconductor ceramic plates having abruptly changing thermistor characteristics, an internal electrode layer is formed at the electrical connection part between the plurality of semiconductor ceramic plates, and an insulating resin layer is formed at the electrically insulating part. A sudden change thermistor characterized in that an external electrode is formed on an end face of the laminate to commonly connect the internal electrode layers.
導体セラミック板を内部電極層を介して積層し、内部電
極層形成領域外に空隙層を形成し、この空隙層に絶縁性
樹脂を注入し、硬化させた後、積層体の端面に上記内部
電極を共通接続する外部電極を形成する急変サーミスタ
の製造方法。2. A plurality of semiconductor ceramic plates having abruptly changing thermistor characteristics are laminated via internal electrode layers, a void layer is formed outside the internal electrode layer formation area, an insulating resin is injected into this void layer, and then hardened. and then forming an external electrode that commonly connects the internal electrodes on the end face of the laminate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3088345A JP2689756B2 (en) | 1991-04-19 | 1991-04-19 | Sudden change thermistor and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3088345A JP2689756B2 (en) | 1991-04-19 | 1991-04-19 | Sudden change thermistor and manufacturing method thereof |
Publications (2)
Publication Number | Publication Date |
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JPH04320301A true JPH04320301A (en) | 1992-11-11 |
JP2689756B2 JP2689756B2 (en) | 1997-12-10 |
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Application Number | Title | Priority Date | Filing Date |
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JP3088345A Expired - Fee Related JP2689756B2 (en) | 1991-04-19 | 1991-04-19 | Sudden change thermistor and manufacturing method thereof |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003060928A1 (en) * | 2002-01-10 | 2003-07-24 | Lamina Ceramics, Inc. | Temperature compensation device with integral sheet thermistors |
US6720859B2 (en) * | 2002-01-10 | 2004-04-13 | Lamina Ceramics, Inc. | Temperature compensating device with embedded columnar thermistors |
WO2016152990A1 (en) * | 2015-03-25 | 2016-09-29 | 京セラ株式会社 | Electronic component |
JP2019114736A (en) * | 2017-12-26 | 2019-07-11 | 株式会社村田製作所 | Method for manufacturing three-dimensional wiring board and three-dimensional wiring board |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60253201A (en) * | 1984-05-30 | 1985-12-13 | 株式会社日立製作所 | Temperature sensttive resistance material |
JPH01186601A (en) * | 1988-01-14 | 1989-07-26 | Murata Mfg Co Ltd | V2o3 ceramics resistor element |
-
1991
- 1991-04-19 JP JP3088345A patent/JP2689756B2/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60253201A (en) * | 1984-05-30 | 1985-12-13 | 株式会社日立製作所 | Temperature sensttive resistance material |
JPH01186601A (en) * | 1988-01-14 | 1989-07-26 | Murata Mfg Co Ltd | V2o3 ceramics resistor element |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003060928A1 (en) * | 2002-01-10 | 2003-07-24 | Lamina Ceramics, Inc. | Temperature compensation device with integral sheet thermistors |
US6720859B2 (en) * | 2002-01-10 | 2004-04-13 | Lamina Ceramics, Inc. | Temperature compensating device with embedded columnar thermistors |
US6759940B2 (en) * | 2002-01-10 | 2004-07-06 | Lamina Ceramics, Inc. | Temperature compensating device with integral sheet thermistors |
WO2016152990A1 (en) * | 2015-03-25 | 2016-09-29 | 京セラ株式会社 | Electronic component |
JPWO2016152990A1 (en) * | 2015-03-25 | 2017-12-07 | 京セラ株式会社 | Electronic components |
JP2019114736A (en) * | 2017-12-26 | 2019-07-11 | 株式会社村田製作所 | Method for manufacturing three-dimensional wiring board and three-dimensional wiring board |
Also Published As
Publication number | Publication date |
---|---|
JP2689756B2 (en) | 1997-12-10 |
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