JP6497886B2 - Self-supporting substrate and method for manufacturing self-supporting substrate - Google Patents

Description

  The present invention relates to a self-supporting substrate and a method for manufacturing the self-supporting substrate.

  A group III nitride semiconductor layer is formed on a base substrate (eg, sapphire substrate), and then the group III nitride semiconductor layer is peeled from the base substrate to manufacture a self-supporting substrate (group III nitride semiconductor layer). There is technology.

  In the case of this technique, as described in Non-Patent Document 1, pits (through holes, depressions, etc.) having openings on the growth surface (exposed surface) of the self-standing substrate can be formed. In addition, a pit buried region having a higher impurity concentration (eg, O concentration) than other regions, which is grown from the slope inside the pit, can be formed. Since the growth rate of the group III nitride semiconductor crystal from the slope inside the pit is slower than the growth rate from other regions, the efficiency of capturing impurities in the environment is increased. As a result, the region formed by growing the group III nitride semiconductor crystal from the slope inside the pit has a higher impurity concentration than other regions.

  If the pit embedding region is present on the growth surface (exposed surface) of the freestanding substrate, it may adversely affect the characteristics of a device (eg, optical device, electronic device, etc.) formed on the freestanding substrate.

  Non-Patent Document 1 uses an HVPE device with a unique structure that enables much more precise growth condition control than the conventional HVPE (Hydride Vapor Phase Epitaxy) device, and pit filling on the growth surface (exposed surface) of a self-supporting substrate. Means for solving the above problem by reducing the insertion area is disclosed.

Nobuaki Fujikura, 4 others, “Development of high quality GaN single crystal substrate”, [online], Hitachi Cable 31 (2012-1), [Search April 11, 2014], Internet <URL: http://www.hitachi-cable.co.jp/about/publish/kenkyu/__icsFiles/afieldfile/2012/07/ 17 / r06.pdf>

  In the case of the technique described in Non-Patent Document 1, it is necessary to newly prepare an HVPE device having a unique structure, which is expensive. Moreover, it can be said that this technique lacks versatility in that an HVPE apparatus having a unique structure must be used, that is, a conventional growth apparatus cannot be used.

  An object of the present invention is to provide a new technique for reducing adverse effects on the characteristics of devices (eg, optical devices, electronic devices, etc.) formed on a self-supporting substrate.

According to the present invention,
A layer made of a group III nitride semiconductor;
Present in the layer, extending in the thickness direction before SL layer, and the pit buried region having an impurity concentration higher than the other regions,
Have
A self-supporting substrate is provided in which the density of the pit embedding region on the exposed surface of the layer is 0.9 piece / cm ² or less.

Moreover, according to the present invention,
A first forming step of forming a laminated film made of a group III nitride semiconductor on a base substrate;
A second forming step of forming a group III nitride semiconductor layer on the laminated film;
After the second forming step, at least the base substrate is removed, and a processing step of obtaining a self-supporting substrate including the group III nitride semiconductor layer;
Have
In the first forming step,
After the group III nitride semiconductor layer is formed by growing a group III nitride semiconductor under the first growth condition, the group III nitride semiconductor is formed under a second growth condition different from the first growth condition. By performing the process repeatedly to obtain a first stacked structure in which a second group III nitride semiconductor layer is formed on the first group III nitride semiconductor layer, the plurality of the first group nitride semiconductor layers are repeatedly performed. There is provided a method of manufacturing a self-supporting substrate that forms the laminated film in which one laminated structure is laminated .

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to reduce the bad influence on the characteristic of the device (for example, optical device, electronic device, etc.) formed on a self-supporting substrate.

It is a flowchart which shows an example of the flow of a process of the manufacturing method of the self-supporting substrate of this embodiment. It is a manufacturing process figure for demonstrating an example of the manufacturing method of the self-supporting board | substrate of this embodiment. It is a manufacturing process figure for demonstrating an example of the manufacturing method of the self-supporting board | substrate of this embodiment. It is a manufacturing process figure for demonstrating an example of the manufacturing method of the self-supporting board | substrate of this embodiment. It is a manufacturing process figure for demonstrating an example of the manufacturing method of the self-supporting board | substrate of this embodiment. It is a manufacturing process figure for demonstrating an example of the manufacturing method of the self-supporting board | substrate of this embodiment. It is a schematic diagram which shows an example of the apparatus used for manufacture of the self-supporting board | substrate of this embodiment. It is a schematic diagram which shows an example of the self-supporting board | substrate of this embodiment. It is a schematic diagram which shows an example of the self-supporting board | substrate of this embodiment. It is a schematic diagram which shows an example of the self-supporting board | substrate of this embodiment. It is a figure for demonstrating the effect of this embodiment. It is a figure for demonstrating the effect of this embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings, the same reference numerals are given to the same components, and the description will be omitted as appropriate.

  First, an outline of the present embodiment will be described. The inventors of the present invention have characteristics of a device (eg, an optical device, an electronic device, etc.) formed on a self-supporting substrate by a self-supporting substrate in which the number of pit embedding regions on the growth surface (exposed surface) is reduced as compared with the prior art. Considered to reduce the adverse effects on

  As disclosed in Non-Patent Document 1, when a layer made of a group III nitride semiconductor crystal is formed by a conventional growth method, a pit having an opening on the growth surface (exposed surface) during the growth process of the group III nitride semiconductor. Is formed. The pit includes not only a through pit that penetrates the layer but also a non-penetrating pit and an inside that is likely to be an inverted hexagonal pyramid or an inverted hexagonal frustum. After that, a group III nitride semiconductor crystal grows from the slope inside the Kubomi, and a pit buried region having a higher impurity concentration (eg, O concentration) than other regions can be formed.

  In Non-Patent Document 1, a pit embedding region on a growth surface (exposed surface) of a self-supporting substrate is obtained by using an HVPE device having a unique structure that enables much more precise growth condition control than a conventional HVPE device. However, it is unclear how much it has been reduced.

  The self-supporting substrate according to the present embodiment is manufactured by a method for manufacturing a self-supporting substrate according to the present embodiment which is not conventional. Although the reason is unknown, as shown in the following examples, the present inventors formed a laminated film made of a group III nitride semiconductor on a base substrate, and then formed a free-standing substrate on the laminated film. It was newly found that the number of pit buried regions on the growth surface (exposed surface) of the group III nitride semiconductor layer can be reduced by forming a group III nitride semiconductor layer for this purpose. Further, it has been newly found that the number of pits on the growth surface (exposed surface) of the group III nitride semiconductor layer can be further reduced according to the technique. The detailed definition of the pit embedding area and the pit will be described below.

  The self-supporting substrate of the present embodiment is formed using the above technique, and is characterized in that the density of the pit embedding region on the growth surface (exposed surface) is reduced as compared with the conventional case. In addition to the feature, the self-standing substrate of the present embodiment can further include a feature that the density of pits on the growth surface (exposed surface) is reduced as compared with the conventional case. According to such a self-standing substrate of this embodiment, it is possible to widen a pit embedding region or a region where no pit exists on the growth surface (exposed surface) of the self-standing substrate. By forming a device (for example, an optical device, an electronic device, etc.) on such a pit embedding region or a region where no pit is present, an adverse effect on device characteristics can be reduced.

  First, the manufacturing method of the self-supporting substrate of this embodiment will be described. FIG. 1 is a flowchart showing an example of a processing flow of the method for manufacturing a self-supporting substrate according to the present embodiment. As shown in the drawing, the method for manufacturing a self-supporting substrate according to the present embodiment includes a first formation step S11, a second formation step S12, and a processing step S13.

  In the first formation step S11, a laminated film made of a group III nitride semiconductor is formed on the base substrate. In the first formation step S11, a laminated film made of a group III nitride semiconductor is formed by executing at least one of the following processes (1) and (2) a predetermined number of times.

(1) A group III nitride semiconductor crystal is grown under a first growth condition to form a first group III nitride semiconductor layer, and then a group III nitride under a second growth condition different from the first growth condition. A process of obtaining a stacked structure in which a second group III nitride semiconductor layer is formed on a first group III nitride semiconductor layer by growing a compound semiconductor crystal. The first group III nitride semiconductor layer and the second group III nitride semiconductor layer are part of the stacked film.
(2) After the third group III nitride semiconductor layer is formed by growing the group III nitride semiconductor crystal, the group III nitride semiconductor growth is once stopped, and then the group III nitride semiconductor crystal is formed again. A process of obtaining a stacked structure in which a fourth group III nitride semiconductor layer is formed on a third group III nitride semiconductor layer by growing. Note that the third group III nitride semiconductor layer and the fourth group III nitride semiconductor layer are part of the stacked film.

  When a laminated film is formed by such means, the composition of layers between successive layers (hereinafter referred to as “layer composition”) does not completely match. For example, the impurity concentration may be different. As a result, when the cross section of the laminated film is observed with an SEM (scanning electron microscope), an interface is formed between successive layers. The inventors of the present invention have formed a laminated film having such an interface on a base substrate, and then formed a group III nitride semiconductor layer serving as a free-standing substrate on the laminated film, becomes a free-standing substrate. It has been confirmed that the pit buried region formed in the group III nitride semiconductor layer can be reduced.

  Here, the process (1) will be described. In the treatment (1), the layer composition between successive layers is varied by changing the growth conditions.

  For example, the first growth condition may be “a growth condition in which a predetermined impurity (eg, Si) is doped”, and the second growth condition may be “a growth condition in which the predetermined impurity is undoped”. Alternatively, the first and second growth conditions may be varied so that the doping amounts of the predetermined impurities are different from each other. In addition, the growth temperature, source gas type, source gas flow rate, carrier gas type, carrier gas flow rate, growth pressure, and the like may be different from each other.

  After forming the first group III nitride semiconductor layer, the second group III nitride semiconductor can be operated by operating the growth apparatus and switching the growth conditions without stopping the growth of the group III nitride semiconductor. The layers may be formed continuously.

  Next, the process (2) will be described. In the process (2), the process for forming the third group III nitride semiconductor layer and the process for forming the fourth group III nitride semiconductor layer are not performed continuously, but these layers are formed. The process of stopping the growth of the group III nitride semiconductor is once inserted during the processing, so that the layer composition between successive layers is made different.

In the step of stopping the growth of the group III nitride semiconductor, for example, a process for stopping the supply of the source gas and the carrier gas, a process for stopping the heating in the growth apparatus, and the third group III nitride semiconductor layer are formed. A process of once removing the base substrate from the growth apparatus, introducing a suitable amount of etching gas (HCl, Cl _2, etc.) to realize “growth rate = etching rate”, and performing a process of apparently stopping the growth. In this way, the atmosphere in the growth apparatus when forming a portion of the third group III nitride semiconductor layer adjacent to the fourth group III nitride semiconductor layer, and the fourth group III nitride The atmosphere in the growth apparatus at the time of forming the portion close to the third group III nitride semiconductor layer in the semiconductor layer does not completely match each other. As a result, events such as different doping amounts of impurities (eg, O) doped in the layers from the atmosphere occur, and an interface is formed between these layers.

  In the process (2), the third growth condition when the third group III nitride semiconductor layer is formed, and the fourth growth condition when the fourth group III nitride semiconductor layer is formed. May be the same or different from each other.

  The laminated pattern of the laminated film obtained by executing at least one of the processes (1) and (2) a predetermined number of times is not particularly limited, and may be a regular pattern or an irregular pattern. Good.

  For example, the laminated film may be a laminated film in which the same laminated pattern is regularly repeated a predetermined number of times by repeating the same processing regularly a predetermined number of times. As an example, a first group III nitride semiconductor layer formed under a first growth condition and a second group III nitride semiconductor formed over the first group III nitride semiconductor layer under a second growth condition The laminated body with the layer is a laminated film (first group III nitride semiconductor layer / second group III nitride semiconductor layer / first group III nitride semiconductor layer / second layer) that is continuously repeated a predetermined number of times. Group III nitride semiconductor layers / ...) are conceivable.

  As an example of the irregular stacked pattern, the first group III nitride semiconductor layer formed under the first growth condition and the first group III nitride semiconductor layer formed over the first group III nitride semiconductor layer under the second growth condition are used. A 2 ′ group III nitride semiconductor layer is formed under the second growth condition by the treatment of (2) on the stack of the group III nitride semiconductor layer of 2 and the first and first layers are formed thereon. A stacked film in which a first 'group III nitride semiconductor layer is formed under a first' growth condition different from the second growth condition (first group III nitride semiconductor layer / second group III nitride semiconductor layer / 2 ′ group III nitride semiconductor layer / first ′ group III nitride semiconductor layer /.

  In addition, the lamination | stacking pattern illustrated here is only what was shown in order to demonstrate a regular pattern and an irregular pattern, and is not limited to these. However, when the regular pattern as described above is used, there is an advantage that the manufacturing process is simplified as compared with the case where the irregular pattern is used.

  The number of layers of the laminated film is 5 or more and 100 or less, preferably 10 or more and 30 or less. From the viewpoint of reducing the pit embedding area, the number of layers of the laminated film is preferably large. However, if the number of layers of the laminated film is too large, problems such as a long manufacturing time and a large amount of raw materials may occur.

  In the present embodiment, the number of layers of the laminated film is 5 or more and 100 or less, preferably 10 or more and 30 or less, thereby suppressing the level of problems such as an increase in manufacturing time and the need for many raw materials. However, a sufficient effect of reducing the pit embedding area can be realized.

  Moreover, the thickness of each layer which comprises a laminated film is 50 nm or more and 100 micrometers or less, for example, and the thickness of a laminated film is 250 nm or more and 1000 micrometers or less, for example. The present inventors have confirmed that the problem of the pit embedding region is sufficiently reduced when the thickness of each layer constituting the laminated film is set to 50 nm to 100 μm and the thickness of the laminated film is set to 250 nm to 1000 μm. doing.

  Note that any conventional method can be employed for forming the laminated film, and for example, any epitaxial growth method such as HVPE (Hydride Vapor Phase Epitaxy) or MOVPE (Metalorganic Vapor Phase Epitaxy) can be used.

  Next, in the second formation step S12, a group III nitride semiconductor layer is formed on the stacked film formed in the first formation step S11. The group III nitride semiconductor layer becomes at least a part of the free-standing substrate. The formation of the group III nitride semiconductor layer can employ any conventional method, for example, any epitaxial growth method such as HVPE or MOVPE. The thickness of the group III nitride semiconductor layer formed in this step is, for example, 150 μm or more and 30 mm or less.

  In the processing step S13, after the second formation step S12, at least the base substrate is removed to obtain a self-supporting substrate including the group III nitride semiconductor layer formed in the second formation step S12. In this step, at least a part of the laminated film formed in the first formation step S11 may be further removed. The method for removing the base substrate and the laminated film is not particularly limited, and any conventional technique can be employed. Further, in the processing step S13, the growth surface (exposed surface) of the group III nitride semiconductor layer formed in the second formation step S12 is processed by polishing (eg, CMP: Chemical Mechanical Polishing) or the like to obtain the growth surface (exposed surface). You may planarize by removing a part from the side.

  Here, referring to FIG. 2 to FIG. 7, in the first formation step S11, a laminated film composed of the first group III nitride semiconductor layer doped with Si and the second group III nitride semiconductor layer that is undoped is formed. A specific example of a method for manufacturing a self-standing substrate in the case of forming will be described.

  First, the base substrate 102 is prepared. For example, the base substrate 102 may be a heterogeneous substrate such as a sapphire substrate, or may be a free-standing substrate of a group III nitride semiconductor. The base substrate 102 is not limited to this, and may be, for example, a sapphire substrate with a group III nitride semiconductor deposited on the surface or a SiC substrate with a group III nitride semiconductor deposited on the surface. Examples of group III nitride semiconductors deposited on the surface include gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), indium nitride (InN), and aluminum gallium indium nitride (AlGaInN). . Note that the group III nitride semiconductor used for the base substrate 102 is a single crystal. The conductivity type of the group III nitride semiconductor used for the base substrate 102 is not particularly limited, and may be p-type or n-type. As another example, the group III nitride semiconductor used for the base substrate 102 may be an intrinsic semiconductor.

  Next, as illustrated in FIG. 2, a stacked film 104 is formed on the base substrate 102. The laminated film 104 is formed by alternately laminating first group III nitride semiconductor layers 104a and second group III nitride semiconductor layers 104b. In this example, the first group III nitride semiconductor layer 104a and the second group III nitride semiconductor layer 104b are formed by HVPE. However, the method for forming the first group III nitride semiconductor layer 104a and the second group III nitride semiconductor layer 104b is not limited to HVPE, and other methods (for example, MOVPE) may be used.

  In the example shown in FIG. 2, the first group III nitride semiconductor layer 104a is formed in the lowermost layer of the stacked film 104, and the second group III nitride semiconductor layer 104b is formed in the uppermost layer of the stacked film 104. Is formed. However, the lowermost layer and the uppermost layer of the laminated film 104 are not limited to the example of FIG. 1, and the second group III nitride semiconductor layer 104b may be formed in the lowermost layer of the laminated film 104, The first group III nitride semiconductor layer 104a may be formed as the uppermost layer.

  In the example shown in FIG. 2, the first group III nitride semiconductor layer 104a is an n-type group III nitride semiconductor layer. On the other hand, the second group III nitride semiconductor layer 104b is an undoped group III nitride semiconductor layer. Examples of the group III nitride semiconductor used for the first group III nitride semiconductor layer 104a and the second group III nitride semiconductor layer 104b include gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride ( AlGaN), indium nitride (InN) and aluminum gallium indium nitride (AlGaInN). The group III nitride semiconductor used for the first group III nitride semiconductor layer 104a and the second group III nitride semiconductor layer 104b is a single crystal.

In the example shown in FIG. 2, the first group III nitride semiconductor layer 104a is doped with silicon (Si) as an n-type impurity. In this case, the doping of silicon may be performed by supplying a gas containing silicon (for example, monosilane (SiH ₄ ) or dichlorosilane (SiH ₂ Cl ₂ )) in HVPE or MOVPE. The n-type impurity concentration of the first group III nitride semiconductor layer 104a is, for example, 5E17 atoms / cm ³ or more and 5E20 atoms / cm ³ or less.

  Note that the first group III nitride semiconductor layer 104a and the second group III nitride semiconductor layer 104b are between the first group III nitride semiconductor layer 104a and the second group III nitride semiconductor layer 104b that are in contact with each other. By changing the n-type impurity concentration in a manner close to a step, an interface can be formed between these layers.

  In the laminated film 104, the lamination cycle of the first group III nitride semiconductor layer 104a and the second group III nitride semiconductor layer 104b is repeated a predetermined number of times. Although the said frequency | count is not specifically limited, For example, it is good also as 10 times or more. In other words, in this case, 10 or more layers each composed of one set of the first group III nitride semiconductor layer 104a and one layer of the second group III nitride semiconductor layer 104b are stacked.

  In the example shown in FIG. 2, in the laminated film 104, the first group III nitride semiconductor layer 104a and the second group III nitride semiconductor layer 104b preferably each have a certain thickness. These film thicknesses are, for example, 50 nm or more, preferably 200 nm or more, rather than a thin film that forms a superlattice. Further, any film thickness of the first group III nitride semiconductor layer 104a included in the stacked film 104 is made larger than any film thickness of the second group III nitride semiconductor layer 104b included in the stacked film 104. Also good. For example, the thickness of the first group III nitride semiconductor layer 104a may be 700 nm to 1000 nm, and the thickness of the second group III nitride semiconductor layer 104b may be 350 nm to 500 nm.

  Next, as shown in FIG. 3, a group III nitride semiconductor layer 106 is formed on the stacked film 104. The film thickness of the group III nitride semiconductor layer 106 is thicker than any of the first group III nitride semiconductor layer 104a or the second group III nitride semiconductor layer 104b included in the stacked film 104. Note that the thickness of the group III nitride semiconductor layer 106 may be larger than the total thickness of the stacked film 104. For example, the group III nitride semiconductor layer 106 is formed by HVPE. However, the method for forming the group III nitride semiconductor layer 106 is not limited to HVPE, and other methods (for example, MOVPE) may be used. Examples of the group III nitride semiconductor used for the group III nitride semiconductor layer 106 include gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), indium nitride (InN), and aluminum gallium indium nitride ( AlGaInN). The group III nitride semiconductor used for the group III nitride semiconductor layer 106 is a single crystal. In the example shown in FIG. 3, the group III nitride semiconductor layer 106 is an undoped group III nitride semiconductor layer.

Next, as shown in FIG. 4, an n-type group III nitride semiconductor layer 108 is formed on the group III nitride semiconductor layer 106. For example, the n-type group III nitride semiconductor layer 108 is formed by HVPE. However, the method for forming the n-type group III nitride semiconductor layer 108 is not limited to HVPE, and other methods (for example, MOVPE) may be used. Examples of the group III nitride semiconductor used for the n-type group III nitride semiconductor layer 108 include gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), indium nitride (InN), and aluminum gallium nitride. Indium (AlGaInN) is included. The group III nitride semiconductor used for the n-type group III nitride semiconductor layer 108 is a single crystal. In the example shown in FIG. 4, the n-type group III nitride semiconductor layer 108 is doped with silicon (Si) as an n-type impurity. In this case, the doping of silicon may be performed by supplying a gas containing silicon (for example, monosilane or dichlorosilane) in HVPE or MOVPE. The n-type group III nitride semiconductor layer 108 has an n-type impurity concentration of, for example, 5E17 atoms / cm ³ or more and 5E20 atoms / cm ³ or less.

  Next, as illustrated in FIG. 5, the base substrate 102, the stacked film 104, and the group III nitride semiconductor layer 106 are removed from the stacked body 100. In this way, the stacked body 100 is processed into the base body 200 including the n-type group III nitride semiconductor layer 108. Note that the surface of the substrate 200 may be further polished by CMP or the like and planarized.

  A method for processing the stacked body 100 into the base body 200 is not particularly limited. For example, the base substrate 102, the stacked film 104, and the group III nitride semiconductor layer 106 may be removed from the stacked body 100 by polishing. Good. Further, the laminate 100 may be processed into the base body 200 by cutting the laminate 100 between the group III nitride semiconductor layer 106 and the n-type group III nitride semiconductor layer 108. The base body 200 thus obtained is a self-supporting substrate of this embodiment made of a group III nitride semiconductor.

  The laminated body 100 may be processed as shown in FIG. FIG. 6 is a diagram showing a modification of FIG. In the example shown in FIG. 6, only the base substrate 102 is removed from the stacked body 100. As a result, the substrate 200 includes the laminated film 104, the group III nitride semiconductor layer 106, and the n-type group III nitride semiconductor layer 108. In the example illustrated in FIG. 6, when the base substrate 102 is removed from the stacked body 100, a part of the stacked film 104 may be removed. 5 and 6, a part of the n-type group III nitride semiconductor layer 108 from the growth surface (exposed surface) side may be removed by polishing or the like and planarized.

  FIG. 7 is a diagram showing an example of the HVPE apparatus 300 that can be used in the steps shown in FIGS. The HVPE apparatus 300 is used to form the laminated film 104, the group III nitride semiconductor layer 106, and the n-type group III nitride semiconductor layer 108. In the HVPE apparatus 300, the base substrate 102 is placed on a stage 304 provided inside the chamber 302. The stage 304 is rotatable as shown in FIG. Further, the temperature of the chamber 302 can be adjusted by the heater 306. An introduction path 320, an introduction path 322, and an introduction path 324 are attached to the chamber 302. The gas contained in the cylinder 308, the cylinder 310, and the cylinder 312 is supplied to the introduction path 320, the introduction path 322, and the introduction path 324 via the gas line 314, the gas line 316, and the gas line 318, respectively.

The cylinder 308 contains hydrogen chloride (HCl) gas. When the HCl gas reacts with the Ga (gallium) source 326, a Ga (gallium) source gas (for example, gallium chloride (GaCl)) is introduced into the chamber 302 from the introduction path 320. On the other hand, the cylinder 310 contains a nitrogen-containing gas (for example, nitrogen (N ₂ ) gas or ammonia (NH ₃ ) gas). This nitrogen-containing gas is introduced into the chamber 302 via the introduction path 322. The cylinder 312 contains a donor gas (for example, a silicon-containing gas such as monosilane (SiH ₄ ) or dichlorosilane (SiH ₂ Cl ₂ )). This donor gas is introduced into the chamber 302 through the introduction path 324. The Ga source gas, the nitrogen-containing gas, and the donor gas contribute to the formation of the stacked body 100, but the gas that does not contribute to the formation of the stacked body 100 is exhausted to the outside of the chamber 302 through the exhaust pipe 328.

  When the first group III nitride semiconductor layer 104a is formed, a Ga source gas, a nitrogen-containing gas, and a donor gas are supplied from the introduction path 320, the introduction path 322, and the introduction path 324, respectively. On the other hand, when the second group III nitride semiconductor layer 104b is formed, the Ga source gas and the nitrogen-containing gas are supplied from the introduction path 320 and the introduction path 322, respectively, but the donor gas is not supplied.

  When the group III nitride semiconductor layer 106 is formed, the Ga source gas and the nitrogen-containing gas are supplied from the introduction path 320 and the introduction path 322, respectively, as in the second group III nitride semiconductor layer 104b. Donor gas is not supplied. However, the partial pressures of the Ga source gas and the nitrogen-containing gas inside the chamber 302 when forming the group III nitride semiconductor layer 106 are the same as the inside of the chamber 302 when forming the second group III nitride semiconductor layer 104b. The partial pressures of the Ga source gas and the nitrogen-containing gas inside the chamber 302 may be higher. In this way, the group III nitride semiconductor layer 106 can be formed at a faster growth rate than the second group III nitride semiconductor layer 104b. Further, in this case, since the amount of impurities inside the chamber 302 is always substantially constant, the n-type impurity concentration of the group III nitride semiconductor layer 106 is the second group III nitride contained in the stacked film 104. It is lower than any n-type impurity concentration of the semiconductor layer 104b.

  When the n-type group III nitride semiconductor layer 108 is formed, the Ga source gas is introduced from the introduction path 320, the introduction path 322, and the introduction path 324, respectively, similarly to the first group III nitride semiconductor layer 104a. A nitrogen-containing gas and a donor gas are supplied.

  The base substrate 102 remains on the stage 304 without being taken out from the chamber 302 until the n-type group III nitride semiconductor layer 108 is formed after the stacked film 104 is formed. Alternatively, it may be taken out from the HVPE apparatus 300 at a predetermined timing in the middle (after a predetermined layer is formed).

  Next, a modified example of the example will be described.

In the example shown in FIGS. 2 to 4, the second group III nitride semiconductor layer 104b is an undoped group III nitride semiconductor layer, but is a group III nitride semiconductor layer having a relatively low n-type impurity concentration. If there is, it is not limited to the undoped group III nitride semiconductor layer. Specifically, the n-type impurity concentration of the second group III nitride semiconductor layer 104b can be lower than the n-type impurity concentration of the first group III nitride semiconductor layer 104a. More specifically, the second group III nitride semiconductor layer 104b is a semiconductor layer containing an n-type impurity concentration of less than 5E17 atoms / cm ³ . When the n-type impurity concentration of the second group III nitride semiconductor layer 104b is less than this value, the second group III nitride semiconductor layer 104b usually does not function as an n-type semiconductor. Also in this modification, the same effect as this embodiment can be acquired.

  3 and 4, the group III nitride semiconductor layer 106 is provided between the stacked film 104 and the n-type group III nitride semiconductor layer 108. However, the group III nitride semiconductor layer 106 is provided. It does not have to be done. In this case, the n-type group III nitride semiconductor layer 108 is provided in contact with the uppermost layer of the stacked film 104. Also in this modification, the same effect as this embodiment can be acquired.

In the example shown in FIGS. 3 and 4, the group III nitride semiconductor layer 106 was an undoped group III nitride semiconductor layer. However, if the group III nitride semiconductor layer has a relatively low n-type impurity concentration, It is not limited to an undoped group III nitride semiconductor layer. Specifically, the n-type impurity concentration of the group III nitride semiconductor layer 106 can be lower than the n-type impurity concentration of the first group III nitride semiconductor layer 104a. More specifically, the group III nitride semiconductor layer 106 is a semiconductor layer containing an n-type impurity concentration of less than 5E17 atoms / cm ³ . When the n-type impurity concentration of group III nitride semiconductor layer 106 is less than this value, group III nitride semiconductor layer 106 normally does not function as an n-type semiconductor. Also in this modification, the same effect as this embodiment can be acquired.

  Next, the self-supporting substrate of this embodiment obtained by the method for manufacturing the self-supporting substrate of this embodiment described above will be described.

  The self-supporting substrate of this embodiment has a layer made of a group III nitride semiconductor and a pit buried region existing in the layer. The layer made of a group III nitride semiconductor is a layer composed of at least a part of the group III nitride semiconductor layer formed in the second formation step S12. Hereinafter, the layer made of the group III nitride semiconductor is referred to as a main layer. Note that the self-supporting substrate may have a layer other than the main layer (at least a part of the laminated film formed in the first formation step S11). The thickness of the freestanding substrate is, for example, 150 μm or more and 2 mm or less. Further, the diameter of the self-standing substrate is, for example, 15 mm or more and 200 mm or less.

  Here, FIGS. 8 to 10 show an example of a schematic cross-sectional view of the self-standing substrate 10 of the present embodiment. 8 and 10 show a self-supporting substrate 10 composed only of a main layer. FIG. 9 shows a free-standing substrate 10 composed of a main layer 14 and another layer 15.

  The pit embedding area is indicated by reference numerals 11 and 13 in FIGS. The pit buried region is the inside of the pit formed on the growth surface (exposed surface) during the growth process of the group III nitride semiconductor, in particular, non-penetrating, and the inside is an inverted hexagonal pyramid or an inverted hexagonal frustum The group III nitride semiconductor crystal is formed by epitaxial growth from the inner slope of the KUBOMI that tends to become. For example, the (10-12) plane, the (11-22) plane, a mixture of these, and the like are observed as the slope inside the Kubomi. Further, the diameter of the dent on the growth surface (exposed surface) of the main layer is greater than 0 μm and not greater than 3000 μm.

  The pit embedding region formed in this way extends in the thickness direction of the main layer and can reach the growth surface (exposed surface) of the main layer. Also, the pit buried region formed by growing from the inside of the pit, where the growth rate of the group III nitride semiconductor is slower than the other region, has a higher impurity concentration (for example, O concentration) than the other region. The diameters (D1, D3) of the pit embedding region on the growth surface (exposed surface) of the main layer are greater than 0 μm and less than or equal to 3000 μm.

  The pit embedding region may or may not have an opening on the growth surface (exposed surface) of the main layer. The pit embedding region 13 of the free-standing substrate shown in FIGS. 8 and 9 has a dent 13 ′ on the growth surface 16 (exposed surface) of the main layer. However, for example, when the growth surface (upper surface in the figure) of the free-standing substrate 10 shown in FIG. 8 is polished and the dent 13 ′ is removed, the state shown in FIG. 10 is obtained. FIG. 10 shows a pit embedding region 11 having no dents on the growth surface 16 (exposed surface) of the main layer. Thus, the state of the pit embedding regions 11 and 13 on the growth surface 16 (exposed surface) of the main layer can be changed by subsequent processing or the like.

In the self-supporting substrate 10 of this embodiment, the density of the pit embedding regions 11 and 13 on the growth surface 16 (exposed surface) of the main layer is 0.9 pieces / cm ² or less, more preferably 0.5 pieces / cm ^2. or less, more preferably it has the feature that is 0.1 / cm ² or less. As described above, according to the self-supporting substrate 10 in which the number of the pit embedding regions 11 and 13 on the growth surface 16 (exposed surface) of the main layer is reduced as compared with the related art, a device (e.g. The adverse effect on the characteristics of optical devices, electronic devices, etc.) can be reduced.

The density of the pit embedding regions 11 and 13 on the growth surface 16 (exposed surface) of the main layer may be 1.0 × 10 ⁻² pieces / cm ² or more. Although it has been confirmed that the density of the pit embedding regions 11 and 13 can be reduced as the number of layers in the laminated film is increased and the number of interfaces is increased, the manufacturing time is increased as the number of layers in the laminated film is increased. However, a problem that a large amount of raw materials are required may occur. By controlling the density of the pit embedding areas 11 and 13 to 1.0 × 10 ⁻² pieces / cm ² or more and 0.9 pieces / cm ² or less, the manufacturing time becomes longer or more The adverse effect on the characteristics of the device (for example, optical device, electronic device, etc.) can be sufficiently reduced while suppressing the level of problems such as requiring the raw materials.

In the self-standing substrate 10 of the present embodiment, the density of pits on the growth surface 16 (exposed surface) of the main layer is 0.1 pieces / cm ² or less, preferably 0.7 × 10 ⁻¹ pieces / cm ^2. It may be the following. That is, according to the manufacturing method of this embodiment, the density of pits on the growth surface 16 (exposed surface) of the main layer can be controlled in this way. The pit diameters (D2, D3) are greater than 0 μm and less than or equal to 3000 μm.

  The pit is a portion having an opening formed in the growth surface 16 (exposed surface). The pit includes a through hole that penetrates from the growth surface 16 (exposed surface) of the main layer to the back surface 17 of the main layer, and a non-penetrating dent that does not penetrate to the back surface 17. In the case of the example shown in FIGS. 8 and 9, the through hole 12 and the hollow 13 ′ correspond to pits. In the case of the example shown in FIG. 10, only the through hole 12 corresponds to a pit.

  Here, a method for measuring the density of the pit embedding regions 11 and 13 and the density of the pits 12 and 13 'will be described.

  When UV is irradiated from the back surface of the freestanding substrate 10, the pit embedding regions 11 and 13 having a relatively high impurity concentration appear black and the other regions appear yellow-green. Therefore, the pit embedding regions 11 and 13 on the entire wafer surface can be specified by visual observation. The pits 12 and 13 ′ have openings on the growth surface 16. Therefore, the pits 12 and 13 'can be specified by visually confirming the observation image. In this embodiment, the entire exposed surface (growth surface) of the freestanding substrate 10 is an observation area. Then, the pit embedding area and the number of pits in the observation area are observed as described above. Then, the density is calculated by the formula of (count number) / (area of observation area).

  According to the present embodiment described above, a self-supporting substrate made of a group III nitride semiconductor in which the density of the pit buried region on the growth surface (exposed surface) is reduced as compared with the prior art is realized. Further, according to the present embodiment, in addition to the above feature, a free-standing substrate made of a group III nitride semiconductor in which the density of pits on the growth surface (exposed surface) is reduced as compared with the related art is realized.

  If a pit buried region or a pit is present on the growth surface (exposed surface) of the self-supporting substrate, the crystallinity of the group III nitride semiconductor grown on the self-supporting substrate and the device characteristics formed thereon may be adversely affected. For this reason, it is necessary to select a pit embedding area or an area where no pit exists to manufacture a device, and to remove a device manufactured on a pit embedding area or an area where a pit exists as a defective product. Problems with manufacturing efficiency and yield may occur.

  According to this embodiment, since the pit embedding region and the pits on the growth surface (exposed surface) of the freestanding substrate can be reduced, the crystallinity of the group III nitride semiconductor grown on the freestanding substrate and the formation thereof are formed thereon. An adverse effect on device characteristics can be reduced. As a result, the above manufacturing efficiency problem and yield problem can be improved.

<Example 1>
As Example 1, the base body 200 shown in FIG. 5 was manufactured by using the method described with reference to FIGS.

  Specifically, a gallium nitride (GaN) substrate was used as the base substrate 102. Silicon doped gallium nitride (GaN) and undoped gallium nitride (GaN) were used for the first group III nitride semiconductor layer 104a and the second group III nitride semiconductor layer 104b, respectively. The film thickness of the first group III nitride semiconductor layer 104a and the film thickness of the second group III nitride semiconductor layer 104b are 700 nm and 500 nm, respectively. In the laminated film 104, the cycle of the first group III nitride semiconductor layer 104a and the second group III nitride semiconductor layer 104b is repeated 20 times. Undoped gallium nitride (GaN) was used for the group III nitride semiconductor layer 106. The film thickness of the group III nitride semiconductor layer 106 is 0.2 mm. Silicon-doped gallium nitride (GaN) was used for the n-type group III nitride semiconductor layer 108. The film thickness of the n-type group III nitride semiconductor layer 108 is 2 mm. Thereafter, the base substrate 102, the laminated film 104, and the group III nitride semiconductor layer 106 are removed by CMP, and the growth surface (exposed surface) of the n-type group III nitride semiconductor layer 108 is flattened to form a substrate having a diameter of 2 inches. 200 was obtained. This substrate 200 was used as the self-supporting substrate of Example 1.

<Comparative Example 1>
As Comparative Example 1, a stacked body in which the n-type group III nitride semiconductor layer 108 was directly formed on the first surface of the base substrate 102 was manufactured. Thereafter, the base substrate 102 was removed by CMP, and the growth surface (exposed surface) of the n-type group III nitride semiconductor layer 108 was flattened to obtain a substrate having a diameter of 2 inches. This substrate was used as a self-supporting substrate of Comparative Example 1. The manufacturing method of Comparative Example 1 is the same as that of Example 1 except that the stacked film 104 and the group III nitride semiconductor layer 106 are not formed.

<Measurement of pit embedding area and number of pits>
Eighteen free-standing substrates of Comparative Example 1 were manufactured, and sample numbers 1 to 18 were given to them. In addition, 20 free-standing substrates of Example 1 were manufactured, and sample numbers 19 to 38 were given to them. Then, the entire exposed surface (growth surface) of the substrate was used as an observation area, and the number of pit embedding areas and pits in the observation area was counted for each sample.

  FIG. 11 shows the number of pit embedding areas, and FIG. 12 shows the result of the number of pits. The horizontal axis indicates the sample number, and the vertical axis indicates the number of pit embedding areas (FIG. 11) and the number of pits (FIG. 12). Tables 1 and 2 summarize the number of pit embedding regions, the number of pits, and the density of each sample.

  As shown in FIG. 11, the number of pit embedding regions in Example 1 is clearly smaller than that in Comparative Example 1.

The density of the pit embedding area in Example 1 was 2.4 × 10 ⁻² pieces / cm ² or more and 4.9 × 10 ⁻¹ pieces / cm ² or less. On the other hand, the density of the pit embedding area in Comparative Example 1 was 1.0 piece / cm ² or more and 1.9 pieces / cm ² or less.

  The average number of pit embedding areas in Example 1 was 12.4. On the other hand, the average number of pit embedding areas in Comparative Example 1 was 105.6.

As described above, according to the result of FIG. 11, the density of the pit embedding region on the growth surface (exposed surface) is 1.0 × 10 ⁻² pieces / cm ² or more by the method for manufacturing a self-supporting substrate of this embodiment. It can be seen that a free-standing substrate made of a group III nitride semiconductor, which is less than the number of pieces / cm ² , is realized as compared with the conventional one.

  Next, according to the result shown in FIG. 12, it can be seen that the number of pits in Example 1 is smaller than that in Comparative Example 1.

The density of pits in Example 1 was not less than 0 pieces / cm ^{2 and not} more than 8.6 × 10 ⁻² pieces / cm ² . On the other hand, the density of pits in Comparative Example 1 was not less than 0 pieces / cm ^{2 and not} more than 2.5 × 10 ⁻¹ pieces / cm ² .

  The average number of pits in Example 1 was 1.9. On the other hand, the average number of pits in Comparative Example 1 was 5.8.

  As shown in FIG. 12, among the samples of Comparative Example 1, there are those in which the density of pits is approximately the same as that of Example 1 and is reduced from that of Example 1. However, in any of the samples of Comparative Example 1, the density of the pit embedding region is clearly inferior to any of the samples of Example 1.

  According to the results of FIGS. 11 and 12, the density of the pit embedding region on the growth surface (exposed surface) is reduced as compared with the conventional method by the method for manufacturing the self-standing substrate of the present embodiment, and the growth surface (exposed surface). It can be seen that a free-standing substrate made of a group III nitride semiconductor in which the density of pits in FIG.

  Although not shown here, the present inventors have confirmed that the same effect can be obtained even when the laminated film is formed by other means.

Hereinafter, examples of the reference form will be added.
1. A layer made of a group III nitride semiconductor;
Present in the layer, formed by epitaxially growing a group III nitride semiconductor from the inside of the pit formed on the growth surface in the growth process of the group III nitride semiconductor, extending in the thickness direction of the layer, A pit embedding region having a higher impurity concentration than other regions;
Have
The density of the pit embedding region on the exposed surface of the layer is 0.9 free / cm ² or less.
2. In the self-supporting substrate according to 1,
The density of the pit embedding region on the exposed surface of the layer is a self-supporting substrate that is 1.0 × 10 ⁻² pieces / cm ² or more.
3. In the self-supporting substrate according to 1 or 2,
The density of pits having openings in the exposed surface of the layer is 0.1 / cm ² or less.
4). A first forming step of forming a laminated film made of a group III nitride semiconductor on a base substrate;
A second forming step of forming a group III nitride semiconductor layer on the laminated film;
After the second forming step, at least the base substrate is removed, and a processing step of obtaining a self-supporting substrate including the group III nitride semiconductor layer;
Have
In the first forming step,
After the group III nitride semiconductor layer is formed by growing a group III nitride semiconductor under the first growth condition, the group III nitride semiconductor is formed under a second growth condition different from the first growth condition. A process of obtaining a stacked structure in which a second group III nitride semiconductor layer is formed on the first group III nitride semiconductor layer by growing, and a third group nitride semiconductor by growing a group III nitride semiconductor. After the group III nitride semiconductor layer is formed, the growth of the group III nitride semiconductor is once stopped, and then the group III nitride semiconductor is again grown on the third group III nitride semiconductor layer. A method for manufacturing a self-supporting substrate, wherein the laminated film is formed by performing at least one of processes for obtaining a laminated structure in which a fourth group III nitride semiconductor layer is formed a predetermined number of times.

DESCRIPTION OF SYMBOLS 10 Self-supporting substrate 11 Pit embedding area | region 12 Through-hole 13 Pit embedding area | region 13 'Kubumi 14 Main layer 15 Other layer 16 Growth surface 17 Back surface 100 Laminated body 102 Base substrate 104 Laminated film 104a 1st III nitride semiconductor layer 104 b Second group III nitride semiconductor layer 106 Group III nitride semiconductor layer 108 n-type group III nitride semiconductor layer 200 Base 300 HVPE apparatus 302 Chamber 304 Stage 306 Heater 308 Cylinder 310 Cylinder 312 Cylinder 314 Gas line 316 Gas line 318 Gas line 320 Introduction path 322 Introduction path 324 Introduction path 326 Ga source 328 Discharge pipe

Claims (5)

A layer made of a group III nitride semiconductor;
Present in the layer, extending in the thickness direction before SL layer, and the pit buried region having an impurity concentration higher than the other regions,
Have
The density of the pit embedding region on the exposed surface of the layer is 0.9 free / cm ² or less. In the self-supporting substrate according to claim 1,
The density of the pit embedding region on the exposed surface of the layer is a self-supporting substrate that is 1.0 × 10 ⁻² pieces / cm ² or more. In the self-supporting substrate according to claim 1 or 2,
The density of pits having openings in the exposed surface of the layer is 0.1 / cm ² or less. A first forming step of forming a laminated film made of a group III nitride semiconductor on a base substrate;
A second forming step of forming a group III nitride semiconductor layer on the laminated film;
After the second forming step, at least the base substrate is removed, and a processing step of obtaining a self-supporting substrate including the group III nitride semiconductor layer;
Have
In the first forming step,
After the group III nitride semiconductor layer is formed by growing a group III nitride semiconductor under the first growth condition, the group III nitride semiconductor is formed under a second growth condition different from the first growth condition. By performing the process repeatedly to obtain a first stacked structure in which a second group III nitride semiconductor layer is formed on the first group III nitride semiconductor layer, the plurality of the first group nitride semiconductor layers are repeatedly performed. A method for manufacturing a self-supporting substrate, wherein the laminated film is formed by laminating one laminated structure. A first forming step of forming a laminated film made of a group III nitride semiconductor on a base substrate;
A second forming step of forming a group III nitride semiconductor layer on the laminated film;
After the second forming step, at least the base substrate is removed, and a processing step of obtaining a self-supporting substrate including the group III nitride semiconductor layer;
Have
In the first forming step,
After the third group III nitride semiconductor layer is formed by growing the group III nitride semiconductor, the growth of the group III nitride semiconductor is once stopped, and then the group III nitride semiconductor is grown again by the growth of the group III nitride semiconductor. A plurality of the second stacked structures are stacked by repeatedly performing a process of obtaining a second stacked structure in which the fourth group III nitride semiconductor layer is formed on the third group III nitride semiconductor layer a plurality of times. A method for manufacturing a self-supporting substrate for forming the laminated film.

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